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riscv-gcc-1
Commit 5aa58c13 by Richard Kenner
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(multiply/multiplu/mulm/mulmu insns): These clobber Q. 

From-SVN: r3885
parent cc5ae869
Showing with 24 additions and 13 deletions
gcc/config/a29k/a29k.md
......@@ -1115,7 +1115,8 @@
(define_insn "mulsi3"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(mult:SI (match_operand:SI 1 "gpc_reg_operand" "%r")
(match_operand:SI 2 "gpc_reg_operand" "r")))]
(match_operand:SI 2 "gpc_reg_operand" "r")))
(clobber (match_scratch:SI 3 "=&q"))]
""
"multiply %0,%1,%2")
......@@ -1124,7 +1125,8 @@
(subreg:SI
(mult:DI
(sign_extend:DI (match_operand:SI 1 "gpc_reg_operand" "%r"))
(sign_extend:DI (match_operand:SI 2 "gpc_reg_operand" "r"))) 0))]
(sign_extend:DI (match_operand:SI 2 "gpc_reg_operand" "r"))) 0))
(clobber (match_scratch:SI 3 "=&q"))]
""
"multm %0,%1,%2")
......@@ -1133,14 +1135,16 @@
(subreg:SI
(mult:DI
(zero_extend:DI (match_operand:SI 1 "gpc_reg_operand" "%r"))
(zero_extend:DI (match_operand:SI 2 "gpc_reg_operand" "r"))) 0))]
(zero_extend:DI (match_operand:SI 2 "gpc_reg_operand" "r"))) 0))
(clobber (match_scratch:SI 3 "=&q"))]
""
"multmu %0,%1,%2")
(define_insn "mulsidi3"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
(mult:DI (sign_extend:DI (match_operand:SI 1 "gpc_reg_operand" "r"))
(sign_extend:DI (match_operand:SI 2 "gpc_reg_operand" "r"))))]
(sign_extend:DI (match_operand:SI 2 "gpc_reg_operand" "r"))))
(clobber (match_scratch:SI 3 "=&q"))]
""
"multiply %L0,%1,%2\;multm %0,%1,%2"
[(set_attr "type" "multi")])
......@@ -1148,14 +1152,17 @@
(define_split
[(set (match_operand:DI 0 "gpc_reg_operand" "")
(mult:DI (sign_extend:DI (match_operand:SI 1 "gpc_reg_operand" ""))
(sign_extend:DI (match_operand:SI 2 "gpc_reg_operand" ""))))]
(sign_extend:DI (match_operand:SI 2 "gpc_reg_operand" ""))))
(clobber (reg:SI 180))]
"reload_completed"
[(set (match_dup 3)
[(parallel [(set (match_dup 3)
(mult:SI (match_dup 1) (match_dup 2)))
(set (match_dup 4)
(clobber (reg:SI 180))])
(parallel [(set (match_dup 4)
(subreg:SI (mult:DI
(sign_extend:DI (match_dup 1))
(sign_extend:DI (match_dup 2))) 0))]
(sign_extend:DI (match_dup 2))) 0))
(clobber (reg:SI 180))])]
"
{ operands[3] = operand_subword (operands[0], 1, 1, DImode);
operands[4] = operand_subword (operands[1], 0, 1, DImode); } ")
......@@ -1163,7 +1170,8 @@
(define_insn "umulsidi3"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
(mult:DI (zero_extend:DI (match_operand:SI 1 "gpc_reg_operand" "r"))
(zero_extend:DI (match_operand:SI 2 "gpc_reg_operand" "r"))))]
(zero_extend:DI (match_operand:SI 2 "gpc_reg_operand" "r"))))
(clobber (match_scratch:SI 3 "=&q"))]
""
"multiplu %L0,%1,%2\;multmu %0,%1,%2"
[(set_attr "type" "multi")])
......@@ -1171,13 +1179,16 @@
(define_split
[(set (match_operand:DI 0 "gpc_reg_operand" "")
(mult:DI (zero_extend:DI (match_operand:SI 1 "gpc_reg_operand" ""))
(zero_extend:DI (match_operand:SI 2 "gpc_reg_operand" ""))))]
(zero_extend:DI (match_operand:SI 2 "gpc_reg_operand" ""))))
(clobber (reg:SI 180))]
"reload_completed"
[(set (match_dup 3)
[(parallel [(set (match_dup 3)
(mult:SI (match_dup 1) (match_dup 2)))
(set (match_dup 4)
(clobber (reg:SI 180))])
(parallel [(set (match_dup 4)
(subreg:SI (mult:DI (zero_extend:DI (match_dup 1))
(zero_extend:DI (match_dup 2))) 0))]
(zero_extend:DI (match_dup 2))) 0))
(clobber (reg:SI 180))])]
"
{ operands[3] = operand_subword (operands[0], 1, 1, DImode);
operands[4] = operand_subword (operands[1], 0, 1, DImode); } ")
......
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