Commit 56daab84 by Nathan Sidwell Committed by Nathan Sidwell

alpha.c (tls_symbolic_operand_1): Use gcc_assert and gcc_unreachable as appropriate.

	* config/alpha/alpha.c (tls_symbolic_operand_1): Use gcc_assert
	and gcc_unreachable as appropriate.
	(get_aligned_mem, get_unaligned_address,
	alpha_emit_set_long_const, alpha_emit_conditional_branch,
	alpha_emit_setcc, alpha_emit_conditional_move,
	alpha_lookup_xfloating_lib_func, alpha_compute_xfloating_mode_arg,
	alpha_emit_xfloating_libcall, alpha_split_tfmode_pair,
	alpha_expand_unaligned_load, alpha_expand_block_move,
	alpha_expand_zap_mask, get_trap_mode_suffix,
	get_round_mode_suffix, get_some_local_dynamic_name,
	print_operand_address, function_arg, alpha_return_in_memory,
	function_value, alpha_expand_builtin,
	alpha_initial_elimination_offset, alpha_expand_epilogue,
	summarize_insn, alpha_handle_trap_shadows, alphaev5_insn_pipe,
	alphaev5_next_group, alpha_align_insns,
	unicosmk_initial_elimination_offset, unicosmk_unique_section,
	unicosmk_ssib_name): Likewise.
	* config/alpha/alpha.h (ASM_OUTPUT_ADDR_VEC_ELT): Likewise.
	* config/alpha/unicosmk.h (TRAMPOLINE_TEMPLATE,
	ASM_OUTPUT_ADDR_DIFF_ELT, ASM_OUTPUT_ADDR_DIFF_VEC): Likewise.
	* config/alpha/vms.h (INITIAL_ELIMINATION_OFFSET,
	ASM_OUTPUT_ADDR_DIFF_ELT): Likewise.
	* config/alpha/alpha.md (*divmodsi_internal_er,
	*divmoddi_internal_er, ashldi3, *insxl, sibcall, call_osf,
	call_nt, call_umk, call_vms, call_value, sibcall_value,
	call_value_osf, call_value_nt, call_value_vms, call_value_umk,
	*call_vms_1, *movmemdi_1, *clrmemdi_1, *call_value_vms_1): Likewise.
	* config/alpha/predicates.md (input_operand): Likewise.

Co-Authored-By: Falk Hueffner <falk@debian.org>

From-SVN: r99384
parent 44e91694
2005-05-08 Nathan Sidwell <nathan@codesourcery.com>
Falk Hueffner <falk@debian.org>
* config/alpha/alpha.c (tls_symbolic_operand_1): Use gcc_assert
and gcc_unreachable as appropriate.
(get_aligned_mem, get_unaligned_address,
alpha_emit_set_long_const, alpha_emit_conditional_branch,
alpha_emit_setcc, alpha_emit_conditional_move,
alpha_lookup_xfloating_lib_func, alpha_compute_xfloating_mode_arg,
alpha_emit_xfloating_libcall, alpha_split_tfmode_pair,
alpha_expand_unaligned_load, alpha_expand_block_move,
alpha_expand_zap_mask, get_trap_mode_suffix,
get_round_mode_suffix, get_some_local_dynamic_name,
print_operand_address, function_arg, alpha_return_in_memory,
function_value, alpha_expand_builtin,
alpha_initial_elimination_offset, alpha_expand_epilogue,
summarize_insn, alpha_handle_trap_shadows, alphaev5_insn_pipe,
alphaev5_next_group, alpha_align_insns,
unicosmk_initial_elimination_offset, unicosmk_unique_section,
unicosmk_ssib_name): Likewise.
* config/alpha/alpha.h (ASM_OUTPUT_ADDR_VEC_ELT): Likewise.
* config/alpha/unicosmk.h (TRAMPOLINE_TEMPLATE,
ASM_OUTPUT_ADDR_DIFF_ELT, ASM_OUTPUT_ADDR_DIFF_VEC): Likewise.
* config/alpha/vms.h (INITIAL_ELIMINATION_OFFSET,
ASM_OUTPUT_ADDR_DIFF_ELT): Likewise.
* config/alpha/alpha.md (*divmodsi_internal_er,
*divmoddi_internal_er, ashldi3, *insxl, sibcall, call_osf,
call_nt, call_umk, call_vms, call_value, sibcall_value,
call_value_osf, call_value_nt, call_value_vms, call_value_umk,
*call_vms_1, *movmemdi_1, *clrmemdi_1, *call_value_vms_1): Likewise.
* config/alpha/predicates.md (input_operand): Likewise.
2005-05-08 Nathan Sidwell <nathan@codesourcery.com>
* config/frv/frv.c (frv_default_flags_for_cpu): Use gcc_assert and
gcc_unreachable, as appropriate.
......
......@@ -596,7 +596,7 @@ tls_symbolic_operand_1 (rtx op, int size, int unspec)
case TLS_MODEL_LOCAL_EXEC:
return unspec == UNSPEC_TPREL;
default:
abort ();
gcc_unreachable ();
}
}
......@@ -1531,21 +1531,17 @@ get_aligned_mem (rtx ref, rtx *paligned_mem, rtx *pbitnum)
rtx base;
HOST_WIDE_INT offset = 0;
if (GET_CODE (ref) != MEM)
abort ();
gcc_assert (GET_CODE (ref) == MEM);
if (reload_in_progress
&& ! memory_address_p (GET_MODE (ref), XEXP (ref, 0)))
{
base = find_replacement (&XEXP (ref, 0));
if (! memory_address_p (GET_MODE (ref), base))
abort ();
gcc_assert (memory_address_p (GET_MODE (ref), base));
}
else
{
base = XEXP (ref, 0);
}
if (GET_CODE (base) == PLUS)
offset += INTVAL (XEXP (base, 1)), base = XEXP (base, 0);
......@@ -1569,21 +1565,17 @@ get_unaligned_address (rtx ref, int extra_offset)
rtx base;
HOST_WIDE_INT offset = 0;
if (GET_CODE (ref) != MEM)
abort ();
gcc_assert (GET_CODE (ref) == MEM);
if (reload_in_progress
&& ! memory_address_p (GET_MODE (ref), XEXP (ref, 0)))
{
base = find_replacement (&XEXP (ref, 0));
if (! memory_address_p (GET_MODE (ref), base))
abort ();
gcc_assert (memory_address_p (GET_MODE (ref), base));
}
else
{
base = XEXP (ref, 0);
}
if (GET_CODE (base) == PLUS)
offset += INTVAL (XEXP (base, 1)), base = XEXP (base, 0);
......@@ -2053,8 +2045,7 @@ alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1, HOST_WIDE_INT c2)
/* Decompose the entire word */
#if HOST_BITS_PER_WIDE_INT >= 64
if (c2 != -(c1 < 0))
abort ();
gcc_assert (c2 == -(c1 < 0));
d1 = ((c1 & 0xffff) ^ 0x8000) - 0x8000;
c1 -= d1;
d2 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000;
......@@ -2062,20 +2053,17 @@ alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1, HOST_WIDE_INT c2)
d3 = ((c1 & 0xffff) ^ 0x8000) - 0x8000;
c1 -= d3;
d4 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000;
if (c1 != d4)
abort ();
gcc_assert (c1 == d4);
#else
d1 = ((c1 & 0xffff) ^ 0x8000) - 0x8000;
c1 -= d1;
d2 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000;
if (c1 != d2)
abort ();
gcc_assert (c1 == d2);
c2 += (d2 < 0);
d3 = ((c2 & 0xffff) ^ 0x8000) - 0x8000;
c2 -= d3;
d4 = ((c2 & 0xffffffff) ^ 0x80000000) - 0x80000000;
if (c2 != d4)
abort ();
gcc_assert (c2 == d4);
#endif
/* Construct the high word */
......@@ -2513,8 +2501,7 @@ alpha_emit_conditional_branch (enum rtx_code code)
if (alpha_compare.fp_p && GET_MODE (op0) == TFmode)
{
if (! TARGET_HAS_XFLOATING_LIBS)
abort ();
gcc_assert (TARGET_HAS_XFLOATING_LIBS);
/* X_floating library comparison functions return
-1 unordered
......@@ -2579,7 +2566,7 @@ alpha_emit_conditional_branch (enum rtx_code code)
break;
default:
abort ();
gcc_unreachable ();
}
if (alpha_compare.fp_p)
......@@ -2678,8 +2665,7 @@ alpha_emit_setcc (enum rtx_code code)
if (fp_p && GET_MODE (op0) == TFmode)
{
if (! TARGET_HAS_XFLOATING_LIBS)
abort ();
gcc_assert (TARGET_HAS_XFLOATING_LIBS);
/* X_floating library comparison functions return
-1 unordered
......@@ -2742,7 +2728,7 @@ alpha_emit_setcc (enum rtx_code code)
break;
default:
abort ();
gcc_unreachable ();
}
if (!fp_p)
......@@ -2834,7 +2820,7 @@ alpha_emit_conditional_move (rtx cmp, enum machine_mode mode)
break;
default:
abort ();
gcc_unreachable ();
}
tem = gen_reg_rtx (cmp_op_mode);
......@@ -2886,7 +2872,7 @@ alpha_emit_conditional_move (rtx cmp, enum machine_mode mode)
break;
default:
abort ();
gcc_unreachable ();
}
if (!fp_p)
......@@ -3059,7 +3045,7 @@ alpha_lookup_xfloating_lib_func (enum rtx_code code)
return func;
}
abort();
gcc_unreachable ();
}
/* Most X_floating operations take the rounding mode as an argument.
......@@ -3086,7 +3072,7 @@ alpha_compute_xfloating_mode_arg (enum rtx_code code,
mode = 4;
break;
default:
abort ();
gcc_unreachable ();
/* XXX For reference, round to +inf is mode = 3. */
}
......@@ -3134,8 +3120,7 @@ alpha_emit_xfloating_libcall (rtx func, rtx target, rtx operands[],
break;
case VOIDmode:
if (GET_CODE (operands[i]) != CONST_INT)
abort ();
gcc_assert (GET_CODE (operands[i]) == CONST_INT);
/* FALLTHRU */
case DImode:
reg = gen_rtx_REG (DImode, regno);
......@@ -3143,7 +3128,7 @@ alpha_emit_xfloating_libcall (rtx func, rtx target, rtx operands[],
break;
default:
abort ();
gcc_unreachable ();
}
emit_move_insn (reg, operands[i]);
......@@ -3162,7 +3147,7 @@ alpha_emit_xfloating_libcall (rtx func, rtx target, rtx operands[],
reg = gen_rtx_REG (DImode, 0);
break;
default:
abort ();
gcc_unreachable ();
}
tmp = gen_rtx_MEM (QImode, func);
......@@ -3265,33 +3250,42 @@ alpha_emit_xfloating_cvt (enum rtx_code orig_code, rtx operands[])
void
alpha_split_tfmode_pair (rtx operands[4])
{
if (GET_CODE (operands[1]) == REG)
switch (GET_CODE (operands[1]))
{
case REG:
operands[3] = gen_rtx_REG (DImode, REGNO (operands[1]) + 1);
operands[2] = gen_rtx_REG (DImode, REGNO (operands[1]));
}
else if (GET_CODE (operands[1]) == MEM)
{
break;
case MEM:
operands[3] = adjust_address (operands[1], DImode, 8);
operands[2] = adjust_address (operands[1], DImode, 0);
}
else if (operands[1] == CONST0_RTX (TFmode))
break;
case CONST_FLOAT:
gcc_assert (operands[1] == CONST0_RTX (TFmode));
operands[2] = operands[3] = const0_rtx;
else
abort ();
break;
if (GET_CODE (operands[0]) == REG)
default:
gcc_unreachable ();
}
switch (GET_CODE (operands[0]))
{
case REG:
operands[1] = gen_rtx_REG (DImode, REGNO (operands[0]) + 1);
operands[0] = gen_rtx_REG (DImode, REGNO (operands[0]));
}
else if (GET_CODE (operands[0]) == MEM)
{
break;
case MEM:
operands[1] = adjust_address (operands[0], DImode, 8);
operands[0] = adjust_address (operands[0], DImode, 0);
break;
default:
gcc_unreachable ();
}
else
abort ();
}
/* Implement negtf2 or abstf2. Op0 is destination, op1 is source,
......@@ -3477,7 +3471,7 @@ alpha_expand_unaligned_load (rtx tgt, rtx mem, HOST_WIDE_INT size,
break;
default:
abort ();
gcc_unreachable ();
}
emit_insn (gen_extxl_be (exth, memh, GEN_INT (size*8), addr));
}
......@@ -3503,7 +3497,7 @@ alpha_expand_unaligned_load (rtx tgt, rtx mem, HOST_WIDE_INT size,
break;
default:
abort();
gcc_unreachable ();
}
}
......@@ -4029,8 +4023,7 @@ alpha_expand_block_move (rtx operands[])
ofs += 1;
}
if (nregs > ARRAY_SIZE (data_regs))
abort ();
gcc_assert (nregs <= ARRAY_SIZE (data_regs));
/* Now save it back out again. */
......@@ -4117,16 +4110,15 @@ alpha_expand_block_move (rtx operands[])
ofs += 2;
}
while (i < nregs && GET_MODE (data_regs[i]) == QImode)
/* The remainder must be byte copies. */
while (i < nregs)
{
gcc_assert (GET_MODE (data_regs[i]) == QImode);
emit_move_insn (adjust_address (orig_dst, QImode, ofs), data_regs[i]);
i++;
ofs += 1;
}
if (i != nregs)
abort ();
return 1;
}
......@@ -4424,10 +4416,12 @@ alpha_expand_zap_mask (HOST_WIDE_INT value)
result = gen_int_mode (mask, DImode);
}
else if (HOST_BITS_PER_WIDE_INT == 32)
else
{
HOST_WIDE_INT mask_lo = 0, mask_hi = 0;
gcc_assert (HOST_BITS_PER_WIDE_INT == 32);
for (i = 7; i >= 4; --i)
{
mask_hi <<= 8;
......@@ -4444,8 +4438,6 @@ alpha_expand_zap_mask (HOST_WIDE_INT value)
result = immed_double_const (mask_lo, mask_hi, DImode);
}
else
abort ();
return result;
}
......@@ -4699,8 +4691,9 @@ get_trap_mode_suffix (void)
case ALPHA_FPTM_SU:
case ALPHA_FPTM_SUI:
return "sv";
default:
gcc_unreachable ();
}
break;
case TRAP_SUFFIX_V_SV_SVI:
switch (alpha_fptm)
......@@ -4713,6 +4706,8 @@ get_trap_mode_suffix (void)
return "sv";
case ALPHA_FPTM_SUI:
return "svi";
default:
gcc_unreachable ();
}
break;
......@@ -4727,10 +4722,15 @@ get_trap_mode_suffix (void)
return "su";
case ALPHA_FPTM_SUI:
return "sui";
default:
gcc_unreachable ();
}
break;
default:
gcc_unreachable ();
}
abort ();
gcc_unreachable ();
}
/* Return the rounding mode suffix applicable to the current
......@@ -4756,13 +4756,18 @@ get_round_mode_suffix (void)
return "c";
case ALPHA_FPRM_DYN:
return "d";
default:
gcc_unreachable ();
}
break;
case ROUND_SUFFIX_C:
return "c";
default:
gcc_unreachable ();
}
abort ();
gcc_unreachable ();
}
/* Locate some local-dynamic symbol still in use by this function
......@@ -4796,7 +4801,7 @@ get_some_local_dynamic_name (void)
&& for_each_rtx (&PATTERN (insn), get_some_local_dynamic_name_1, 0))
return cfun->machine->some_ld_name;
abort ();
gcc_unreachable ();
}
/* Print an operand. Recognize special options, documented below. */
......@@ -5205,46 +5210,56 @@ print_operand_address (FILE *file, rtx addr)
fprintf (file, "+" HOST_WIDE_INT_PRINT_DEC, offset);
addr = XEXP (addr, 0);
if (GET_CODE (addr) == REG)
switch (GET_CODE (addr))
{
case REG:
basereg = REGNO (addr);
else if (GET_CODE (addr) == SUBREG
&& GET_CODE (SUBREG_REG (addr)) == REG)
break;
case SUBREG:
basereg = subreg_regno (addr);
else
abort ();
break;
default:
gcc_unreachable ();
}
fprintf (file, "($%d)\t\t!%s", basereg,
(basereg == 29 ? reloc16 : reloclo));
return;
}
if (GET_CODE (addr) == REG)
switch (GET_CODE (addr))
{
case REG:
basereg = REGNO (addr);
else if (GET_CODE (addr) == SUBREG
&& GET_CODE (SUBREG_REG (addr)) == REG)
break;
case SUBREG:
basereg = subreg_regno (addr);
else if (GET_CODE (addr) == CONST_INT)
break;
case CONST_INT:
offset = INTVAL (addr);
break;
#if TARGET_ABI_OPEN_VMS
else if (GET_CODE (addr) == SYMBOL_REF)
{
case SYMBOL_REF:
fprintf (file, "%s", XSTR (addr, 0));
return;
}
else if (GET_CODE (addr) == CONST
&& GET_CODE (XEXP (addr, 0)) == PLUS
&& GET_CODE (XEXP (XEXP (addr, 0), 0)) == SYMBOL_REF)
{
case CONST:
gcc_assert (GET_CODE (XEXP (addr, 0)) == PLUS
&& GET_CODE (XEXP (XEXP (addr, 0), 0)) == SYMBOL_REF);
fprintf (file, "%s+" HOST_WIDE_INT_PRINT_DEC,
XSTR (XEXP (XEXP (addr, 0), 0), 0),
INTVAL (XEXP (XEXP (addr, 0), 1)));
return;
}
#endif
else
abort ();
#endif
default:
gcc_unreachable ();
}
fprintf (file, HOST_WIDE_INT_PRINT_DEC "($%d)", offset, basereg);
}
......@@ -5343,8 +5358,7 @@ function_arg (CUMULATIVE_ARGS cum, enum machine_mode mode, tree type,
#ifdef ENABLE_CHECKING
/* With alpha_split_complex_arg, we shouldn't see any raw complex
values here. */
if (COMPLEX_MODE_P (mode))
abort ();
gcc_assert (!COMPLEX_MODE_P (mode));
#endif
/* Set up defaults for FP operands passed in FP registers, and
......@@ -5514,8 +5528,9 @@ alpha_return_in_memory (tree type, tree fndecl ATTRIBUTE_UNUSED)
default:
/* ??? We get called on all sorts of random stuff from
aggregate_value_p. We can't abort, but it's not clear
what's safe to return. Pretend it's a struct I guess. */
aggregate_value_p. We must return something, but it's not
clear what's safe to return. Pretend it's a struct I
guess. */
return true;
}
......@@ -5549,10 +5564,7 @@ function_value (tree valtype, tree func ATTRIBUTE_UNUSED,
unsigned int regnum, dummy;
enum mode_class class;
#ifdef ENABLE_CHECKING
if (valtype && alpha_return_in_memory (valtype, func))
abort ();
#endif
gcc_assert (!valtype || !alpha_return_in_memory (valtype, func));
if (valtype)
mode = TYPE_MODE (valtype);
......@@ -5587,7 +5599,7 @@ function_value (tree valtype, tree func ATTRIBUTE_UNUSED,
}
default:
abort ();
gcc_unreachable ();
}
return gen_rtx_REG (mode, regnum);
......@@ -6368,7 +6380,7 @@ alpha_expand_builtin (tree exp, rtx target,
pat = GEN_FCN (icode) (target, op[0], op[1]);
break;
default:
abort ();
gcc_unreachable ();
}
if (!pat)
return NULL_RTX;
......@@ -7052,14 +7064,20 @@ alpha_initial_elimination_offset (unsigned int from,
ret = alpha_sa_size ();
ret += ALPHA_ROUND (current_function_outgoing_args_size);
if (from == FRAME_POINTER_REGNUM)
;
else if (from == ARG_POINTER_REGNUM)
switch (from)
{
case FRAME_POINTER_REGNUM:
break;
case ARG_POINTER_REGNUM:
ret += (ALPHA_ROUND (get_frame_size ()
+ current_function_pretend_args_size)
- current_function_pretend_args_size);
else
abort ();
break;
default:
gcc_unreachable ();
}
return ret;
}
......@@ -7957,8 +7975,7 @@ alpha_expand_epilogue (void)
so build it up by pieces. */
FRP (sp_adj2 = alpha_emit_set_long_const (tmp, frame_size,
-(frame_size < 0)));
if (!sp_adj2)
abort ();
gcc_assert (sp_adj2);
}
}
......@@ -8334,7 +8351,7 @@ summarize_insn (rtx x, struct shadow_summary *sum, int set)
break;
default:
abort ();
gcc_unreachable ();
}
}
}
......@@ -8432,7 +8449,7 @@ alpha_handle_trap_shadows (void)
switch (GET_CODE (i))
{
case INSN:
/* Annoyingly, get_attr_trap will abort on these. */
/* Annoyingly, get_attr_trap will die on these. */
if (GET_CODE (PATTERN (i)) == USE
|| GET_CODE (PATTERN (i)) == CLOBBER)
break;
......@@ -8459,10 +8476,9 @@ alpha_handle_trap_shadows (void)
|| (sum.defd.mem & shadow.used.mem))
{
/* (a) would be violated (also takes care of (b)) */
if (get_attr_trap (i) == TRAP_YES
&& ((sum.defd.i & sum.used.i)
|| (sum.defd.fp & sum.used.fp)))
abort ();
gcc_assert (get_attr_trap (i) != TRAP_YES
|| (!(sum.defd.i & sum.used.i)
&& !(sum.defd.fp & sum.used.fp)));
goto close_shadow;
}
......@@ -8474,7 +8490,7 @@ alpha_handle_trap_shadows (void)
goto close_shadow;
default:
abort ();
gcc_unreachable ();
}
}
else
......@@ -8567,7 +8583,7 @@ alphaev4_insn_pipe (rtx insn)
return EV4_IB1;
default:
abort ();
gcc_unreachable ();
}
}
......@@ -8619,7 +8635,7 @@ alphaev5_insn_pipe (rtx insn)
return EV5_FM;
default:
abort();
gcc_unreachable ();
}
}
......@@ -8690,7 +8706,7 @@ alphaev4_next_group (rtx insn, int *pin_use, int *plen)
break;
default:
abort();
gcc_unreachable ();
}
len += 4;
......@@ -8760,11 +8776,11 @@ alphaev5_next_group (rtx insn, int *pin_use, int *plen)
len = get_attr_length (insn);
goto next_and_done;
/* ??? Most of the places below, we would like to abort, as
it would indicate an error either in Haifa, or in the
scheduling description. Unfortunately, Haifa never
schedules the last instruction of the BB, so we don't
have an accurate TI bit to go off. */
/* ??? Most of the places below, we would like to assert never
happen, as it would indicate an error either in Haifa, or
in the scheduling description. Unfortunately, Haifa never
schedules the last instruction of the BB, so we don't have
an accurate TI bit to go off. */
case EV5_E01:
if (in_use & EV5_E0)
{
......@@ -8819,7 +8835,7 @@ alphaev5_next_group (rtx insn, int *pin_use, int *plen)
break;
default:
abort();
gcc_unreachable ();
}
len += 4;
......@@ -8954,8 +8970,7 @@ alpha_align_insns (unsigned int max_align,
else if (ofs & (new_align-1))
ofs = (ofs | (new_align-1)) + 1;
if (len != 0)
abort();
gcc_assert (!len);
}
/* Handle complex instructions special. */
......@@ -9542,7 +9557,7 @@ unicosmk_initial_elimination_offset (int from, int to)
+ ALPHA_ROUND (get_frame_size()
+ current_function_outgoing_args_size));
else
abort ();
gcc_unreachable ();
}
/* Output the module name for .ident and .end directives. We have to strip
......@@ -9626,8 +9641,7 @@ unicosmk_unique_section (tree decl, int reloc ATTRIBUTE_UNUSED)
const char *name;
int len;
if (!decl)
abort ();
gcc_assert (decl);
name = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl));
name = default_strip_name_encoding (name);
......@@ -9777,11 +9791,9 @@ unicosmk_ssib_name (void)
int len;
x = DECL_RTL (cfun->decl);
if (GET_CODE (x) != MEM)
abort ();
gcc_assert (GET_CODE (x) == MEM);
x = XEXP (x, 0);
if (GET_CODE (x) != SYMBOL_REF)
abort ();
gcc_assert (GET_CODE (x) == SYMBOL_REF);
fnname = XSTR (x, 0);
len = strlen (fnname);
......
......@@ -1369,7 +1369,7 @@ do { \
/* This is how to output an element of a case-vector that is absolute.
(Alpha does not use such vectors, but we must define this macro anyway.) */
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) abort ()
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) gcc_unreachable ()
/* This is how to output an element of a case-vector that is relative. */
......
......@@ -1003,7 +1003,7 @@
str = "__remlu";
break;
default:
abort ();
gcc_unreachable ();
}
operands[4] = GEN_INT (alpha_next_sequence_number++);
emit_insn (gen_movdi_er_high_g (operands[0], pic_offset_table_rtx,
......@@ -1071,7 +1071,7 @@
str = "__remqu";
break;
default:
abort ();
gcc_unreachable ();
}
operands[4] = GEN_INT (alpha_next_sequence_number++);
emit_insn (gen_movdi_er_high_g (operands[0], pic_offset_table_rtx,
......@@ -1452,7 +1452,7 @@
case 1:
return "sll %r1,%2,%0";
default:
abort();
gcc_unreachable ();
}
}
[(set_attr "type" "iadd,shift")])
......@@ -2124,7 +2124,7 @@
== (unsigned HOST_WIDE_INT) INTVAL (operands[3]))
return "insll %1,%s2,%0";
#endif
abort();
gcc_unreachable ();
}
[(set_attr "type" "shift")])
......@@ -4497,8 +4497,7 @@
(unspec [(reg:DI 29)] UNSPEC_SIBCALL)])]
"TARGET_ABI_OSF"
{
if (GET_CODE (operands[0]) != MEM)
abort ();
gcc_assert (GET_CODE (operands[0]) == MEM);
operands[0] = XEXP (operands[0], 0);
})
......@@ -4509,8 +4508,7 @@
(clobber (reg:DI 26))])]
""
{
if (GET_CODE (operands[0]) != MEM)
abort ();
gcc_assert (GET_CODE (operands[0]) == MEM);
operands[0] = XEXP (operands[0], 0);
if (! call_operand (operands[0], Pmode))
......@@ -4523,8 +4521,7 @@
(clobber (reg:DI 26))])]
""
{
if (GET_CODE (operands[0]) != MEM)
abort ();
gcc_assert (GET_CODE (operands[0]) == MEM);
operands[0] = XEXP (operands[0], 0);
if (GET_CODE (operands[0]) != SYMBOL_REF && GET_CODE (operands[0]) != REG)
......@@ -4542,8 +4539,7 @@
(clobber (reg:DI 26))])]
""
{
if (GET_CODE (operands[0]) != MEM)
abort ();
gcc_assert (GET_CODE (operands[0]) == MEM);
/* Always load the address of the called function into a register;
load the CIW in $25. */
......@@ -4569,8 +4565,7 @@
(clobber (reg:DI 27))])]
""
{
if (GET_CODE (operands[0]) != MEM)
abort ();
gcc_assert (GET_CODE (operands[0]) == MEM);
operands[0] = XEXP (operands[0], 0);
......@@ -4623,8 +4618,7 @@
(unspec [(reg:DI 29)] UNSPEC_SIBCALL)])]
"TARGET_ABI_OSF"
{
if (GET_CODE (operands[1]) != MEM)
abort ();
gcc_assert (GET_CODE (operands[1]) == MEM);
operands[1] = XEXP (operands[1], 0);
})
......@@ -4636,8 +4630,7 @@
(clobber (reg:DI 26))])]
""
{
if (GET_CODE (operands[1]) != MEM)
abort ();
gcc_assert (GET_CODE (operands[1]) == MEM);
operands[1] = XEXP (operands[1], 0);
if (! call_operand (operands[1], Pmode))
......@@ -4651,8 +4644,7 @@
(clobber (reg:DI 26))])]
""
{
if (GET_CODE (operands[1]) != MEM)
abort ();
gcc_assert (GET_CODE (operands[1]) == MEM);
operands[1] = XEXP (operands[1], 0);
if (GET_CODE (operands[1]) != SYMBOL_REF && GET_CODE (operands[1]) != REG)
......@@ -4669,8 +4661,7 @@
(clobber (reg:DI 27))])]
""
{
if (GET_CODE (operands[1]) != MEM)
abort ();
gcc_assert (GET_CODE (operands[1]) == MEM);
operands[1] = XEXP (operands[1], 0);
......@@ -4701,8 +4692,7 @@
(clobber (reg:DI 26))])]
""
{
if (GET_CODE (operands[1]) != MEM)
abort ();
gcc_assert (GET_CODE (operands[1]) == MEM);
operands[1] = XEXP (operands[1], 0);
if (GET_CODE (operands[1]) != REG)
......@@ -4902,7 +4892,7 @@
operands [3] = alpha_use_linkage (operands [0], cfun->decl, 0, 0);
return "ldq $26,%3\;ldq $27,%2\;jsr $26,%0\;ldq $27,0($29)";
default:
abort();
gcc_unreachable ();
}
}
[(set_attr "type" "jsr")
......@@ -5639,7 +5629,7 @@
;; VMS needs to set up "vms_base_regno" for unwinding. This move
;; often appears dead to the life analysis code, at which point we
;; abort for emitting dead prologue instructions. Force this live.
;; die for emitting dead prologue instructions. Force this live.
(define_insn "force_movdi"
[(set (match_operand:DI 0 "register_operand" "=r")
......@@ -6556,7 +6546,7 @@
case 1:
return "lda $16,%0\;lda $17,%2($31)\;lda $18,%1\;ldq $26,%5\;lda $25,3($31)\;jsr $26,%4\;ldq $27,0($29)";
default:
abort();
gcc_unreachable ();
}
}
[(set_attr "type" "multi")
......@@ -6613,7 +6603,7 @@
case 1:
return "lda $16,%0\;lda $17,%1($31)\;ldq $26,%4\;lda $25,2($31)\;jsr $26,%3\;ldq $27,0($29)";
default:
abort();
gcc_unreachable ();
}
}
[(set_attr "type" "multi")
......@@ -8036,7 +8026,7 @@
operands [4] = alpha_use_linkage (operands [1], cfun->decl, 0, 0);
return "ldq $26,%4\;ldq $27,%3\;jsr $26,%1\;ldq $27,0($29)";
default:
abort();
gcc_unreachable ();
}
}
[(set_attr "type" "jsr")
......
......@@ -231,7 +231,7 @@
return add_operand (op, mode);
default:
abort ();
gcc_unreachable ();
}
return 0;
})
......@@ -506,7 +506,7 @@
;; Returns 1 if OP is not an eliminable register.
;;
;; This exists to cure a pathological abort in the s8addq (et al) patterns,
;; This exists to cure a pathological failure in the s8addq (et al) patterns,
;;
;; long foo () { long t; bar(); return (long) &t * 26107; }
;;
......
......@@ -230,7 +230,7 @@ do { fprintf (FILE, "\tbr $1,0\n"); \
/* We don't support nested functions (yet). */
#undef TRAMPOLINE_TEMPLATE
#define TRAMPOLINE_TEMPLATE(FILE) abort ()
#define TRAMPOLINE_TEMPLATE(FILE) gcc_unreachable ()
/* Specify the machine mode that this machine uses for the index in the
tablejump instruction. On Unicos/Mk, we don't support relative case
......@@ -374,7 +374,7 @@ ssib_section (void) \
(Unicos/Mk does not use such vectors yet). */
#undef ASM_OUTPUT_ADDR_DIFF_ELT
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) abort ()
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) gcc_unreachable ()
/* We can't output case vectors in the same section as the function code
because CAM doesn't allow data definitions in code sections. Thus, we
......@@ -384,7 +384,7 @@ ssib_section (void) \
#define ASM_OUTPUT_ADDR_VEC(LAB,VEC) \
unicosmk_defer_case_vector ((LAB),(VEC))
#define ASM_OUTPUT_ADDR_DIFF_VEC(LAB,VEC) abort ()
#define ASM_OUTPUT_ADDR_DIFF_VEC(LAB,VEC) gcc_unreachable ()
/* This is how to output an assembler line that says to advance the location
counter to a multiple of 2**LOG bytes. Annoyingly, CAM always uses zeroes
......
......@@ -136,15 +136,20 @@ Boston, MA 02111-1307, USA. */
#undef INITIAL_ELIMINATION_OFFSET
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
{ if ((FROM) == FRAME_POINTER_REGNUM) \
{ switch (FROM) \
{ \
case FRAME_POINTER_REGNUM: \
(OFFSET) = alpha_sa_size () + alpha_pv_save_size (); \
else if ((FROM) == ARG_POINTER_REGNUM) \
break; \
case ARG_POINTER_REGNUM: \
(OFFSET) = (ALPHA_ROUND (alpha_sa_size () + alpha_pv_save_size () \
+ get_frame_size () \
+ current_function_pretend_args_size) \
- current_function_pretend_args_size); \
else \
abort(); \
break; \
default: \
gcc_unreachable (); \
} \
if ((TO) == STACK_POINTER_REGNUM) \
(OFFSET) += ALPHA_ROUND (current_function_outgoing_args_size); \
}
......@@ -227,7 +232,7 @@ extern void link_section (void);
extern void literals_section (void);
#undef ASM_OUTPUT_ADDR_DIFF_ELT
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) abort ()
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) gcc_unreachable ()
#undef ASM_OUTPUT_ADDR_VEC_ELT
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
......
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