Commit 55310df7 by Michael Hayes Committed by Michael Hayes

c4x.c (call_address_operand, [...]): Rename from call_operand and symbolic_operand respectively.

	* config/c4x/c4x.c (call_address_operand, symbolic_address_operand):
 	Rename from call_operand and symbolic_operand respectively.  All
	callers changed.
	* config/c4x/c4x.md (call_address_operand, symbolic_address_operand):
	Likewise.
	* config/c4x/c4x.h (call_address_operand, symbolic_address_operand):
	Likewise.
	(PREDICATE_CODES): Allow CONST, LABEL_REF for call_address_operand.

From-SVN: r25089
parent 917acb0e
Tue Feb 9 11:08:41 1999 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
* config/c4x/c4x.c (call_address_operand, symbolic_address_operand):
Rename from call_operand and symbolic_operand respectively. All
callers changed.
* config/c4x/c4x.md (call_address_operand, symbolic_address_operand):
Likewise.
* config/c4x/c4x.h (call_address_operand, symbolic_address_operand):
Likewise.
(PREDICATE_CODES): Allow CONST, LABEL_REF for call_address_operand.
Tue Feb 9 10:52:27 1999 Michael Hayes <m.hayes@elec.canterbury.ac.nz> Tue Feb 9 10:52:27 1999 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
* config/c4x/c4x.c (c4x_legitimize_address): Don't generate a * config/c4x/c4x.c (c4x_legitimize_address): Don't generate a
......
...@@ -1037,7 +1037,7 @@ c4x_emit_move_sequence (operands, mode) ...@@ -1037,7 +1037,7 @@ c4x_emit_move_sequence (operands, mode)
address. */ address. */
op1 = XEXP (op1, 1); op1 = XEXP (op1, 1);
} }
else if (symbolic_operand (op1, mode)) else if (symbolic_address_operand (op1, mode))
{ {
if (TARGET_LOAD_ADDRESS) if (TARGET_LOAD_ADDRESS)
{ {
...@@ -1072,7 +1072,7 @@ c4x_emit_move_sequence (operands, mode) ...@@ -1072,7 +1072,7 @@ c4x_emit_move_sequence (operands, mode)
perhaps by calling validize_address. */ perhaps by calling validize_address. */
if (! (reload_in_progress || reload_completed) if (! (reload_in_progress || reload_completed)
&& GET_CODE (op1) == MEM && GET_CODE (op1) == MEM
&& symbolic_operand (XEXP (op1, 0), Pmode)) && symbolic_address_operand (XEXP (op1, 0), Pmode))
{ {
rtx dp_reg = gen_rtx_REG (Pmode, DP_REGNO); rtx dp_reg = gen_rtx_REG (Pmode, DP_REGNO);
if (! TARGET_SMALL) if (! TARGET_SMALL)
...@@ -1083,7 +1083,7 @@ c4x_emit_move_sequence (operands, mode) ...@@ -1083,7 +1083,7 @@ c4x_emit_move_sequence (operands, mode)
if (! (reload_in_progress || reload_completed) if (! (reload_in_progress || reload_completed)
&& GET_CODE (op0) == MEM && GET_CODE (op0) == MEM
&& symbolic_operand (XEXP (op0, 0), Pmode)) && symbolic_address_operand (XEXP (op0, 0), Pmode))
{ {
rtx dp_reg = gen_rtx_REG (Pmode, DP_REGNO); rtx dp_reg = gen_rtx_REG (Pmode, DP_REGNO);
if (! TARGET_SMALL) if (! TARGET_SMALL)
...@@ -2880,26 +2880,18 @@ rc_reg_operand (op, mode) ...@@ -2880,26 +2880,18 @@ rc_reg_operand (op, mode)
int int
call_operand (op, mode) call_address_operand (op, mode)
rtx op; rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED; enum machine_mode mode ATTRIBUTE_UNUSED;
{ {
op = XEXP (op, 0); return (REG_P (op) || symbolic_address_operand (op, mode));
switch (GET_CODE (op))
{
case SYMBOL_REF:
case REG:
return 1;
default:
}
return 0;
} }
/* Symbolic operand. */ /* Symbolic operand. */
int int
symbolic_operand (op, mode) symbolic_address_operand (op, mode)
register rtx op; register rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED; enum machine_mode mode ATTRIBUTE_UNUSED;
{ {
......
...@@ -340,6 +340,11 @@ extern void c4x_optimization_options (); ...@@ -340,6 +340,11 @@ extern void c4x_optimization_options ();
#define TARGET_FLOAT_FORMAT C4X_FLOAT_FORMAT #define TARGET_FLOAT_FORMAT C4X_FLOAT_FORMAT
#define MAX_FIXED_MODE_SIZE 64 /* HImode */ #define MAX_FIXED_MODE_SIZE 64 /* HImode */
/* Number of bits in the high and low parts of a two stage
load of an immediate constant. */
#define BITS_PER_HIGH 16
#define BITS_PER_LO_SUM 16
/* Use the internal floating point stuff in the compiler and not the /* Use the internal floating point stuff in the compiler and not the
host floating point stuff. */ host floating point stuff. */
...@@ -2529,7 +2534,7 @@ if (final_sequence != NULL_RTX) \ ...@@ -2529,7 +2534,7 @@ if (final_sequence != NULL_RTX) \
{"sp_reg_operand", {REG}}, \ {"sp_reg_operand", {REG}}, \
{"st_reg_operand", {REG}}, \ {"st_reg_operand", {REG}}, \
{"rc_reg_operand", {REG}}, \ {"rc_reg_operand", {REG}}, \
{"call_operand", {REG, SYMBOL_REF}}, \ {"call_address_operand", {REG, SYMBOL_REF, LABEL_REF, CONST}}, \
{"src_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE}}, \ {"src_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE}}, \
{"src_hi_operand", {SUBREG, REG, MEM, CONST_DOUBLE}}, \ {"src_hi_operand", {SUBREG, REG, MEM, CONST_DOUBLE}}, \
{"lsrc_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE}}, \ {"lsrc_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE}}, \
...@@ -2537,7 +2542,7 @@ if (final_sequence != NULL_RTX) \ ...@@ -2537,7 +2542,7 @@ if (final_sequence != NULL_RTX) \
{"any_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE}}, \ {"any_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE}}, \
{"par_ind_operand", {MEM}}, \ {"par_ind_operand", {MEM}}, \
{"parallel_operand", {SUBREG, REG, MEM}}, \ {"parallel_operand", {SUBREG, REG, MEM}}, \
{"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \ {"symbolic_address_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
{"mem_operand", {MEM}}, {"mem_operand", {MEM}},
...@@ -2628,7 +2633,7 @@ extern int rc_reg_operand (); ...@@ -2628,7 +2633,7 @@ extern int rc_reg_operand ();
extern int st_reg_operand (); extern int st_reg_operand ();
extern int symbolic_operand (); extern int symbolic_address_operand ();
extern int ar0_reg_operand (); extern int ar0_reg_operand ();
...@@ -2676,7 +2681,7 @@ extern int group1_mem_operand (); ...@@ -2676,7 +2681,7 @@ extern int group1_mem_operand ();
extern int arx_reg_operand (); extern int arx_reg_operand ();
extern int call_operand (); extern int call_address_operand ();
extern int par_ind_operand (); extern int par_ind_operand ();
......
...@@ -1104,7 +1104,7 @@ ...@@ -1104,7 +1104,7 @@
(define_insn "set_high" (define_insn "set_high"
[(set (match_operand:QI 0 "std_reg_operand" "=c") [(set (match_operand:QI 0 "std_reg_operand" "=c")
(high:QI (match_operand:QI 1 "symbolic_operand" "")))] (high:QI (match_operand:QI 1 "symbolic_address_operand" "")))]
"! TARGET_C3X " "! TARGET_C3X "
"ldhi\\t^%H1,%0" "ldhi\\t^%H1,%0"
[(set_attr "type" "unary")]) [(set_attr "type" "unary")])
...@@ -1112,14 +1112,14 @@ ...@@ -1112,14 +1112,14 @@
(define_insn "set_lo_sum" (define_insn "set_lo_sum"
[(set (match_operand:QI 0 "std_reg_operand" "=c") [(set (match_operand:QI 0 "std_reg_operand" "=c")
(lo_sum:QI (match_dup 0) (lo_sum:QI (match_dup 0)
(match_operand:QI 1 "symbolic_operand" "")))] (match_operand:QI 1 "symbolic_address_operand" "")))]
"" ""
"or\\t#%H1,%0" "or\\t#%H1,%0"
[(set_attr "type" "unary")]) [(set_attr "type" "unary")])
(define_split (define_split
[(set (match_operand:QI 0 "std_reg_operand" "") [(set (match_operand:QI 0 "std_reg_operand" "")
(match_operand:QI 1 "symbolic_operand" ""))] (match_operand:QI 1 "symbolic_address_operand" ""))]
"! TARGET_C3X" "! TARGET_C3X"
[(set (match_dup 0) (high:QI (match_dup 1))) [(set (match_dup 0) (high:QI (match_dup 1)))
(set (match_dup 0) (lo_sum:QI (match_dup 0) (match_dup 1)))] (set (match_dup 0) (lo_sum:QI (match_dup 0) (match_dup 1)))]
...@@ -1132,7 +1132,7 @@ ...@@ -1132,7 +1132,7 @@
; easily load symbolic addresses into a register. ; easily load symbolic addresses into a register.
(define_split (define_split
[(set (match_operand:QI 0 "reg_operand" "") [(set (match_operand:QI 0 "reg_operand" "")
(match_operand:QI 1 "symbolic_operand" ""))] (match_operand:QI 1 "symbolic_address_operand" ""))]
"! TARGET_SMALL "! TARGET_SMALL
&& (TARGET_C3X || (reload_completed && (TARGET_C3X || (reload_completed
&& ! std_reg_operand (operands[0], QImode)))" && ! std_reg_operand (operands[0], QImode)))"
...@@ -1154,7 +1154,7 @@ ...@@ -1154,7 +1154,7 @@
; for the small memory model. ; for the small memory model.
(define_split (define_split
[(set (match_operand:QI 0 "reg_operand" "") [(set (match_operand:QI 0 "reg_operand" "")
(match_operand:QI 1 "symbolic_operand" ""))] (match_operand:QI 1 "symbolic_address_operand" ""))]
"TARGET_SMALL "TARGET_SMALL
&& (TARGET_C3X || (reload_completed && (TARGET_C3X || (reload_completed
&& ! std_reg_operand (operands[0], QImode)))" && ! std_reg_operand (operands[0], QImode)))"
...@@ -1170,7 +1170,7 @@ ...@@ -1170,7 +1170,7 @@
(define_insn "load_immed_address" (define_insn "load_immed_address"
[(set (match_operand:QI 0 "reg_operand" "=a?x?c*r") [(set (match_operand:QI 0 "reg_operand" "=a?x?c*r")
(match_operand:QI 1 "symbolic_operand" ""))] (match_operand:QI 1 "symbolic_address_operand" ""))]
"TARGET_LOAD_ADDRESS" "TARGET_LOAD_ADDRESS"
"#" "#"
[(set_attr "type" "multi")]) [(set_attr "type" "multi")])
...@@ -1197,7 +1197,7 @@ ...@@ -1197,7 +1197,7 @@
"(REG_P (operands[0]) || REG_P (operands[1]) "(REG_P (operands[0]) || REG_P (operands[1])
|| GET_CODE (operands[0]) == SUBREG || GET_CODE (operands[0]) == SUBREG
|| GET_CODE (operands[1]) == SUBREG) || GET_CODE (operands[1]) == SUBREG)
&& ! symbolic_operand (operands[1], QImode)" && ! symbolic_address_operand (operands[1], QImode)"
"* "*
if (which_alternative == 2) if (which_alternative == 2)
return \"sti\\t%1,%0\"; return \"sti\\t%1,%0\";
...@@ -4355,7 +4355,7 @@ ...@@ -4355,7 +4355,7 @@
; CALL ; CALL
; ;
(define_insn "*call_c3x" (define_insn "*call_c3x"
[(call (mem:QI (match_operand:QI 0 "call_operand" "")) [(call (mem:QI (match_operand:QI 0 "call_address_operand" ""))
(match_operand:QI 1 "general_operand" "")) (match_operand:QI 1 "general_operand" ""))
(clobber (reg:QI 31))] (clobber (reg:QI 31))]
;; Operand 1 not really used on the C4x. The C30 doesn't have reg 31. ;; Operand 1 not really used on the C4x. The C30 doesn't have reg 31.
...@@ -4366,7 +4366,7 @@ ...@@ -4366,7 +4366,7 @@
; LAJ requires R11 (31) for the return address ; LAJ requires R11 (31) for the return address
(define_insn "*laj" (define_insn "*laj"
[(call (mem:QI (match_operand:QI 0 "call_operand" "")) [(call (mem:QI (match_operand:QI 0 "call_address_operand" ""))
(match_operand:QI 1 "general_operand" "")) (match_operand:QI 1 "general_operand" ""))
(clobber (reg:QI 31))] (clobber (reg:QI 31))]
;; Operand 1 not really used on the C4x. ;; Operand 1 not really used on the C4x.
...@@ -4380,7 +4380,7 @@ ...@@ -4380,7 +4380,7 @@
[(set_attr "type" "laj")]) [(set_attr "type" "laj")])
(define_expand "call" (define_expand "call"
[(parallel [(call (mem:QI (match_operand:QI 0 "call_operand" "")) [(parallel [(call (mem:QI (match_operand:QI 0 "call_address_operand" ""))
(match_operand:QI 1 "general_operand" "")) (match_operand:QI 1 "general_operand" ""))
(clobber (reg:QI 31))])] (clobber (reg:QI 31))])]
"" ""
...@@ -4388,7 +4388,7 @@ ...@@ -4388,7 +4388,7 @@
(define_insn "*callv_c3x" (define_insn "*callv_c3x"
[(set (match_operand 0 "" "=r") [(set (match_operand 0 "" "=r")
(call (mem:QI (match_operand:QI 1 "call_operand" "")) (call (mem:QI (match_operand:QI 1 "call_address_operand" ""))
(match_operand:QI 2 "general_operand" ""))) (match_operand:QI 2 "general_operand" "")))
(clobber (reg:QI 31))] (clobber (reg:QI 31))]
;; Operand 0 and 2 not really used for the C4x. ;; Operand 0 and 2 not really used for the C4x.
...@@ -4401,7 +4401,7 @@ ...@@ -4401,7 +4401,7 @@
; LAJ requires R11 (31) for the return address ; LAJ requires R11 (31) for the return address
(define_insn "*lajv" (define_insn "*lajv"
[(set (match_operand 0 "" "=r") [(set (match_operand 0 "" "=r")
(call (mem:QI (match_operand:QI 1 "call_operand" "")) (call (mem:QI (match_operand:QI 1 "call_address_operand" ""))
(match_operand:QI 2 "general_operand" ""))) (match_operand:QI 2 "general_operand" "")))
(clobber (reg:QI 31))] (clobber (reg:QI 31))]
;; Operand 0 and 2 not really used in the C30 instruction. ;; Operand 0 and 2 not really used in the C30 instruction.
...@@ -4416,7 +4416,7 @@ ...@@ -4416,7 +4416,7 @@
(define_expand "call_value" (define_expand "call_value"
[(parallel [(set (match_operand 0 "" "") [(parallel [(set (match_operand 0 "" "")
(call (mem:QI (match_operand:QI 1 "call_operand" "")) (call (mem:QI (match_operand:QI 1 "call_address_operand" ""))
(match_operand:QI 2 "general_operand" ""))) (match_operand:QI 2 "general_operand" "")))
(clobber (reg:QI 31))])] (clobber (reg:QI 31))])]
"" ""
...@@ -6223,7 +6223,7 @@ ...@@ -6223,7 +6223,7 @@
; Peepholes to convert 'call label; rets' into jump label ; Peepholes to convert 'call label; rets' into jump label
; ;
(define_peephole (define_peephole
[(parallel [(call (mem:QI (match_operand:QI 0 "call_operand" "")) [(parallel [(call (mem:QI (match_operand:QI 0 "call_address_operand" ""))
(match_operand:QI 1 "general_operand" "")) (match_operand:QI 1 "general_operand" ""))
(clobber (reg:QI 31))]) (clobber (reg:QI 31))])
(return)] (return)]
...@@ -6237,7 +6237,7 @@ ...@@ -6237,7 +6237,7 @@
(define_peephole (define_peephole
[(parallel [(set (match_operand 0 "" "") [(parallel [(set (match_operand 0 "" "")
(call (mem:QI (match_operand:QI 1 "call_operand" "")) (call (mem:QI (match_operand:QI 1 "call_address_operand" ""))
(match_operand:QI 2 "general_operand" ""))) (match_operand:QI 2 "general_operand" "")))
(clobber (reg:QI 31))]) (clobber (reg:QI 31))])
(return)] (return)]
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment