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Commit 54d7c70c by Christophe Lyon Committed by Christophe Lyon
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[ARM,AArch64][testsuite] Fix format string in AdvSIMD tests. 

2017-01-23  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (CHECK_POLY): New.
	(CHECK_RESULTS_NAMED_NO_FP16): Call CHECK_POLY instead of CHECK
	for poly*_t types.
	* gcc.target/aarch64/advsimd-intrinsics/vcnt.c (FNNAME): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcombine.c (void
	exec_vcombine): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcreate.c (FNNAME): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vget_high.c (void exec_vget_high): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vget_low.c (void exec_vget_low): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vldX.c (void exec_vldX): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vldX_dup.c (void exec_vldX_dup): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vldX_lane.c (void exec_vldX_lane): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vmul.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vmvn.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vqtbX.c (void exec_vqtbX): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrev.c (void exec_vrev): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vsXi_n.inc: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vshuffle.inc: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vsli_n.c (void vsli_extra): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vsri_n.c (void vsri_extra): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c (void exec_vstX_lane): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vtbX.c (void exec_vtbX): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/p64_p128.c (int main):
	Likewise.
	(TEST_VGET_LANE): Cast to uint to avoid warning.
	* gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc (void
	FNNAME): Fix PRIx format for int16_t, int32_t, uint16_t, uint32_t.
	* gcc.target/aarch64/advsimd-intrinsics/vfms_vfma_n.c (void
	exec_vfma_vfms_n): Fix PRIx format for float64_t.
	* gcc.target/aarch64/advsimd-intrinsics/vmovn.c (void exec_vmovn):
	Fix PRIx format for int8_t, int16_t, uint8_t, uint16_t.
	* gcc.target/aarch64/advsimd-intrinsics/vmul_lane.c (void
	exec_vmul_lane): Fix PRIx format for int16_t, uint16_t.
	* gcc.target/aarch64/advsimd-intrinsics/vmul_n.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vmull.c (void exec_vmull):
	Fix PRIx format for int16_t, int64_t, uint16_t, uint64_t. Call
	CHECK_POLY instead of CHECK for poly64_t types.
	* gcc.target/aarch64/advsimd-intrinsics/vmull_lane.c (void
	exec_vmull_lane): Fix PRIx format for int64_t, uint64_t.
	* gcc.target/aarch64/advsimd-intrinsics/vpXXX.inc:
	Fix PRIx format for int8_t, int16_t, uint8_t, uint16_t.
	* gcc.target/aarch64/advsimd-intrinsics/vqabs.c (void
	vqabs_extra): Fix PRIx format for int16_t, int32_t, uint16_t,
	uint32_t.
	* gcc.target/aarch64/advsimd-intrinsics/vqdmull.c: Fix PRIx format
	for int32_t, int64_t.
	* gcc.target/aarch64/advsimd-intrinsics/vqneg.c (void
	vqneg_extra): Fix PRIx format for int16_t, int32_t.
	* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c
	(TEST_VREINTERPRET_TO_POLY): New. (main): Call
	TEST_VREINTERPRET_TO_POLY instead of TEST_VREINTERPRET where
	needed.

From-SVN: r244772
parent f9e37186
Showing with 355 additions and 263 deletions
gcc/testsuite/ChangeLog
2017-01-23 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (CHECK_POLY): New.
(CHECK_RESULTS_NAMED_NO_FP16): Call CHECK_POLY instead of CHECK
for poly*_t types.
* gcc.target/aarch64/advsimd-intrinsics/vcnt.c (FNNAME): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcombine.c (void
exec_vcombine): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcreate.c (FNNAME): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vget_high.c (void exec_vget_high): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vget_low.c (void exec_vget_low): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vldX.c (void exec_vldX): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vldX_dup.c (void exec_vldX_dup): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vldX_lane.c (void exec_vldX_lane): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vmul.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vmvn.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vqtbX.c (void exec_vqtbX): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrev.c (void exec_vrev): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vsXi_n.inc: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vshuffle.inc: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vsli_n.c (void vsli_extra): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vsri_n.c (void vsri_extra): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c (void exec_vstX_lane): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vtbX.c (void exec_vtbX): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/p64_p128.c (int main):
Likewise.
(TEST_VGET_LANE): Cast to uint to avoid warning.
* gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc (void
FNNAME): Fix PRIx format for int16_t, int32_t, uint16_t, uint32_t.
* gcc.target/aarch64/advsimd-intrinsics/vfms_vfma_n.c (void
exec_vfma_vfms_n): Fix PRIx format for float64_t.
* gcc.target/aarch64/advsimd-intrinsics/vmovn.c (void exec_vmovn):
Fix PRIx format for int8_t, int16_t, uint8_t, uint16_t.
* gcc.target/aarch64/advsimd-intrinsics/vmul_lane.c (void
exec_vmul_lane): Fix PRIx format for int16_t, uint16_t.
* gcc.target/aarch64/advsimd-intrinsics/vmul_n.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vmull.c (void exec_vmull):
Fix PRIx format for int16_t, int64_t, uint16_t, uint64_t. Call
CHECK_POLY instead of CHECK for poly64_t types.
* gcc.target/aarch64/advsimd-intrinsics/vmull_lane.c (void
exec_vmull_lane): Fix PRIx format for int64_t, uint64_t.
* gcc.target/aarch64/advsimd-intrinsics/vpXXX.inc:
Fix PRIx format for int8_t, int16_t, uint8_t, uint16_t.
* gcc.target/aarch64/advsimd-intrinsics/vqabs.c (void
vqabs_extra): Fix PRIx format for int16_t, int32_t, uint16_t,
uint32_t.
* gcc.target/aarch64/advsimd-intrinsics/vqdmull.c: Fix PRIx format
for int32_t, int64_t.
* gcc.target/aarch64/advsimd-intrinsics/vqneg.c (void
vqneg_extra): Fix PRIx format for int16_t, int32_t.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c
(TEST_VREINTERPRET_TO_POLY): New. (main): Call
TEST_VREINTERPRET_TO_POLY instead of TEST_VREINTERPRET where
needed.
2017-01-22 Jakub Jelinek <jakub@redhat.com> 2017-01-22 Jakub Jelinek <jakub@redhat.com>
PR fortran/79154 PR fortran/79154
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
...@@ -128,6 +128,35 @@ extern size_t strlen(const char *); ...@@ -128,6 +128,35 @@ extern size_t strlen(const char *);
fprintf(stderr, "CHECKED %s %s\n", STR(VECT_TYPE(T, W, N)), MSG); \ fprintf(stderr, "CHECKED %s %s\n", STR(VECT_TYPE(T, W, N)), MSG); \
} }
/* poly variant. */
#define CHECK_POLY(MSG,T,W,N,FMT,EXPECTED,COMMENT) \
{ \
int i; \
for(i=0; i<N ; i++) \
{ \
union poly_operand { \
uint##W##_t i; \
poly##W##_t p; \
} tmp_res, tmp_exp; \
tmp_res.p = VECT_VAR(result, T, W, N)[i]; \
tmp_exp.i = VECT_VAR(EXPECTED, T, W, N)[i]; \
if (tmp_res.i != tmp_exp.i) { \
fprintf(stderr, \
"ERROR in %s (%s line %d in buffer '%s') at type %s " \
"index %d: got 0x%" FMT " != 0x%" FMT " %s\n", \
MSG, __FILE__, __LINE__, \
STR(EXPECTED), \
STR(VECT_NAME(T, W, N)), \
i, \
tmp_res.i, \
tmp_exp.i, \
strlen(COMMENT) > 0 ? COMMENT : ""); \
abort(); \
} \
} \
fprintf(stderr, "CHECKED %s %s\n", STR(VECT_TYPE(T, W, N)), MSG); \
}
/* Clean buffer with a non-zero pattern to help diagnose buffer /* Clean buffer with a non-zero pattern to help diagnose buffer
overflows. */ overflows. */
#define CLEAN_PATTERN_8 0x33 #define CLEAN_PATTERN_8 0x33
...@@ -218,8 +247,8 @@ extern ARRAY(expected, hfloat, 64, 2); ...@@ -218,8 +247,8 @@ extern ARRAY(expected, hfloat, 64, 2);
CHECK(test_name, uint, 16, 4, PRIx16, EXPECTED, comment); \ CHECK(test_name, uint, 16, 4, PRIx16, EXPECTED, comment); \
CHECK(test_name, uint, 32, 2, PRIx32, EXPECTED, comment); \ CHECK(test_name, uint, 32, 2, PRIx32, EXPECTED, comment); \
CHECK(test_name, uint, 64, 1, PRIx64, EXPECTED, comment); \ CHECK(test_name, uint, 64, 1, PRIx64, EXPECTED, comment); \
CHECK(test_name, poly, 8, 8, PRIx8, EXPECTED, comment); \ CHECK_POLY(test_name, poly, 8, 8, PRIx8, EXPECTED, comment); \
CHECK(test_name, poly, 16, 4, PRIx16, EXPECTED, comment); \ CHECK_POLY(test_name, poly, 16, 4, PRIx16, EXPECTED, comment); \
CHECK_FP(test_name, float, 32, 2, PRIx32, EXPECTED, comment); \ CHECK_FP(test_name, float, 32, 2, PRIx32, EXPECTED, comment); \
\ \
CHECK(test_name, int, 8, 16, PRIx8, EXPECTED, comment); \ CHECK(test_name, int, 8, 16, PRIx8, EXPECTED, comment); \
...@@ -230,8 +259,8 @@ extern ARRAY(expected, hfloat, 64, 2); ...@@ -230,8 +259,8 @@ extern ARRAY(expected, hfloat, 64, 2);
CHECK(test_name, uint, 16, 8, PRIx16, EXPECTED, comment); \ CHECK(test_name, uint, 16, 8, PRIx16, EXPECTED, comment); \
CHECK(test_name, uint, 32, 4, PRIx32, EXPECTED, comment); \ CHECK(test_name, uint, 32, 4, PRIx32, EXPECTED, comment); \
CHECK(test_name, uint, 64, 2, PRIx64, EXPECTED, comment); \ CHECK(test_name, uint, 64, 2, PRIx64, EXPECTED, comment); \
CHECK(test_name, poly, 8, 16, PRIx8, EXPECTED, comment); \ CHECK_POLY(test_name, poly, 8, 16, PRIx8, EXPECTED, comment); \
CHECK(test_name, poly, 16, 8, PRIx16, EXPECTED, comment); \ CHECK_POLY(test_name, poly, 16, 8, PRIx16, EXPECTED, comment); \
CHECK_FP(test_name, float, 32, 4, PRIx32, EXPECTED, comment); \ CHECK_FP(test_name, float, 32, 4, PRIx32, EXPECTED, comment); \
} \ } \
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/p64_p128.c
...@@ -196,8 +196,8 @@ int main (void) ...@@ -196,8 +196,8 @@ int main (void)
TEST_VBSL(uint, , poly, p, 64, 1); TEST_VBSL(uint, , poly, p, 64, 1);
TEST_VBSL(uint, q, poly, p, 64, 2); TEST_VBSL(uint, q, poly, p, 64, 2);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vbsl_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vbsl_expected, "");
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vbsl_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vbsl_expected, "");
/* vceq_p64 tests. */ /* vceq_p64 tests. */
#undef TEST_MSG #undef TEST_MSG
...@@ -248,7 +248,7 @@ int main (void) ...@@ -248,7 +248,7 @@ int main (void)
TEST_VCOMBINE(poly, p, 64, 1, 2); TEST_VCOMBINE(poly, p, 64, 1, 2);
CHECK(TEST_MSG, poly, 64, 2, PRIx16, vcombine_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vcombine_expected, "");
/* vcreate_p64 tests. */ /* vcreate_p64 tests. */
#undef TEST_MSG #undef TEST_MSG
...@@ -271,7 +271,7 @@ int main (void) ...@@ -271,7 +271,7 @@ int main (void)
TEST_VCREATE(poly, p, 64, 1); TEST_VCREATE(poly, p, 64, 1);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vcreate_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vcreate_expected, "");
/* vdup_lane_p64 tests. */ /* vdup_lane_p64 tests. */
#undef TEST_MSG #undef TEST_MSG
...@@ -295,8 +295,8 @@ int main (void) ...@@ -295,8 +295,8 @@ int main (void)
TEST_VDUP_LANE(, poly, p, 64, 1, 1, 0); TEST_VDUP_LANE(, poly, p, 64, 1, 1, 0);
TEST_VDUP_LANE(q, poly, p, 64, 2, 1, 0); TEST_VDUP_LANE(q, poly, p, 64, 2, 1, 0);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vdup_lane_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vdup_lane_expected, "");
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vdup_lane_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vdup_lane_expected, "");
/* vdup_n_p64 tests. */ /* vdup_n_p64 tests. */
#undef TEST_MSG #undef TEST_MSG
...@@ -320,16 +320,16 @@ int main (void) ...@@ -320,16 +320,16 @@ int main (void)
switch (i) { switch (i) {
case 0: case 0:
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vdup_n_expected0, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vdup_n_expected0, "");
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vdup_n_expected0, ""); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vdup_n_expected0, "");
break; break;
case 1: case 1:
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vdup_n_expected1, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vdup_n_expected1, "");
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vdup_n_expected1, ""); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vdup_n_expected1, "");
break; break;
case 2: case 2:
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vdup_n_expected2, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vdup_n_expected2, "");
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vdup_n_expected2, ""); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vdup_n_expected2, "");
break; break;
default: default:
abort(); abort();
...@@ -366,8 +366,8 @@ int main (void) ...@@ -366,8 +366,8 @@ int main (void)
TEST_VEXT(, poly, p, 64, 1, 0); TEST_VEXT(, poly, p, 64, 1, 0);
TEST_VEXT(q, poly, p, 64, 2, 1); TEST_VEXT(q, poly, p, 64, 2, 1);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vext_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vext_expected, "");
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vext_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vext_expected, "");
/* vget_low_p64 tests. */ /* vget_low_p64 tests. */
#undef TEST_MSG #undef TEST_MSG
...@@ -387,7 +387,7 @@ int main (void) ...@@ -387,7 +387,7 @@ int main (void)
TEST_VGET_LOW(poly, p, 64, 1, 2); TEST_VGET_LOW(poly, p, 64, 1, 2);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vget_low_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vget_low_expected, "");
/* vget_high_p64 tests. */ /* vget_high_p64 tests. */
#undef TEST_MSG #undef TEST_MSG
...@@ -407,7 +407,7 @@ int main (void) ...@@ -407,7 +407,7 @@ int main (void)
TEST_VGET_HIGH(poly, p, 64, 1, 2); TEST_VGET_HIGH(poly, p, 64, 1, 2);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vget_high_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vget_high_expected, "");
/* vld1_p64 tests. */ /* vld1_p64 tests. */
#undef TEST_MSG #undef TEST_MSG
...@@ -429,8 +429,8 @@ int main (void) ...@@ -429,8 +429,8 @@ int main (void)
TEST_VLD1(vld1_vector, buffer, , poly, p, 64, 1); TEST_VLD1(vld1_vector, buffer, , poly, p, 64, 1);
TEST_VLD1(vld1_vector, buffer, q, poly, p, 64, 2); TEST_VLD1(vld1_vector, buffer, q, poly, p, 64, 2);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld1_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld1_expected, "");
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vld1_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vld1_expected, "");
/* vld1_dup_p64 tests. */ /* vld1_dup_p64 tests. */
#undef TEST_MSG #undef TEST_MSG
...@@ -454,16 +454,16 @@ int main (void) ...@@ -454,16 +454,16 @@ int main (void)
switch (i) { switch (i) {
case 0: case 0:
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld1_dup_expected0, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld1_dup_expected0, "");
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vld1_dup_expected0, ""); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vld1_dup_expected0, "");
break; break;
case 1: case 1:
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld1_dup_expected1, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld1_dup_expected1, "");
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vld1_dup_expected1, ""); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vld1_dup_expected1, "");
break; break;
case 2: case 2:
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld1_dup_expected2, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld1_dup_expected2, "");
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vld1_dup_expected2, ""); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vld1_dup_expected2, "");
break; break;
default: default:
abort(); abort();
...@@ -497,8 +497,8 @@ int main (void) ...@@ -497,8 +497,8 @@ int main (void)
TEST_VLD1_LANE(, poly, p, 64, 1, 0); TEST_VLD1_LANE(, poly, p, 64, 1, 0);
TEST_VLD1_LANE(q, poly, p, 64, 2, 0); TEST_VLD1_LANE(q, poly, p, 64, 2, 0);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld1_lane_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld1_lane_expected, "");
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vld1_lane_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vld1_lane_expected, "");
/* vldX_p64 tests. */ /* vldX_p64 tests. */
#define DECL_VLDX(T1, W, N, X) \ #define DECL_VLDX(T1, W, N, X) \
...@@ -535,37 +535,37 @@ int main (void) ...@@ -535,37 +535,37 @@ int main (void)
#define TEST_MSG "VLD2/VLD2Q" #define TEST_MSG "VLD2/VLD2Q"
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
TEST_VLDX(, poly, p, 64, 1, 2); TEST_VLDX(, poly, p, 64, 1, 2);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld2_expected_0, "chunk 0"); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld2_expected_0, "chunk 0");
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
TEST_EXTRA_CHUNK(poly, 64, 1, 2, 1); TEST_EXTRA_CHUNK(poly, 64, 1, 2, 1);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld2_expected_1, "chunk 1"); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld2_expected_1, "chunk 1");
#undef TEST_MSG #undef TEST_MSG
#define TEST_MSG "VLD3/VLD3Q" #define TEST_MSG "VLD3/VLD3Q"
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
TEST_VLDX(, poly, p, 64, 1, 3); TEST_VLDX(, poly, p, 64, 1, 3);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld3_expected_0, "chunk 0"); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld3_expected_0, "chunk 0");
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
TEST_EXTRA_CHUNK(poly, 64, 1, 3, 1); TEST_EXTRA_CHUNK(poly, 64, 1, 3, 1);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld3_expected_1, "chunk 1"); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld3_expected_1, "chunk 1");
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
TEST_EXTRA_CHUNK(poly, 64, 1, 3, 2); TEST_EXTRA_CHUNK(poly, 64, 1, 3, 2);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld3_expected_2, "chunk 2"); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld3_expected_2, "chunk 2");
#undef TEST_MSG #undef TEST_MSG
#define TEST_MSG "VLD4/VLD4Q" #define TEST_MSG "VLD4/VLD4Q"
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
TEST_VLDX(, poly, p, 64, 1, 4); TEST_VLDX(, poly, p, 64, 1, 4);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld4_expected_0, "chunk 0"); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld4_expected_0, "chunk 0");
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
TEST_EXTRA_CHUNK(poly, 64, 1, 4, 1); TEST_EXTRA_CHUNK(poly, 64, 1, 4, 1);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld4_expected_1, "chunk 1"); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld4_expected_1, "chunk 1");
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
TEST_EXTRA_CHUNK(poly, 64, 1, 4, 2); TEST_EXTRA_CHUNK(poly, 64, 1, 4, 2);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld4_expected_2, "chunk 2"); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld4_expected_2, "chunk 2");
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
TEST_EXTRA_CHUNK(poly, 64, 1, 4, 3); TEST_EXTRA_CHUNK(poly, 64, 1, 4, 3);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld4_expected_3, "chunk 3"); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld4_expected_3, "chunk 3");
/* vldX_dup_p64 tests. */ /* vldX_dup_p64 tests. */
#define DECL_VLDX_DUP(T1, W, N, X) \ #define DECL_VLDX_DUP(T1, W, N, X) \
...@@ -596,37 +596,37 @@ int main (void) ...@@ -596,37 +596,37 @@ int main (void)
#define TEST_MSG "VLD2_DUP/VLD2Q_DUP" #define TEST_MSG "VLD2_DUP/VLD2Q_DUP"
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
TEST_VLDX_DUP(, poly, p, 64, 1, 2); TEST_VLDX_DUP(, poly, p, 64, 1, 2);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld2_dup_expected_0, "chunk 0"); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld2_dup_expected_0, "chunk 0");
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
TEST_VLDX_DUP_EXTRA_CHUNK(poly, 64, 1, 2, 1); TEST_VLDX_DUP_EXTRA_CHUNK(poly, 64, 1, 2, 1);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld2_dup_expected_1, "chunk 1"); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld2_dup_expected_1, "chunk 1");
#undef TEST_MSG #undef TEST_MSG
#define TEST_MSG "VLD3_DUP/VLD3Q_DUP" #define TEST_MSG "VLD3_DUP/VLD3Q_DUP"
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
TEST_VLDX_DUP(, poly, p, 64, 1, 3); TEST_VLDX_DUP(, poly, p, 64, 1, 3);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld3_dup_expected_0, "chunk 0"); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld3_dup_expected_0, "chunk 0");
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
TEST_VLDX_DUP_EXTRA_CHUNK(poly, 64, 1, 3, 1); TEST_VLDX_DUP_EXTRA_CHUNK(poly, 64, 1, 3, 1);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld3_dup_expected_1, "chunk 1"); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld3_dup_expected_1, "chunk 1");
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
TEST_VLDX_DUP_EXTRA_CHUNK(poly, 64, 1, 3, 2); TEST_VLDX_DUP_EXTRA_CHUNK(poly, 64, 1, 3, 2);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld3_dup_expected_2, "chunk 2"); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld3_dup_expected_2, "chunk 2");
#undef TEST_MSG #undef TEST_MSG
#define TEST_MSG "VLD4_DUP/VLD4Q_DUP" #define TEST_MSG "VLD4_DUP/VLD4Q_DUP"
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
TEST_VLDX_DUP(, poly, p, 64, 1, 4); TEST_VLDX_DUP(, poly, p, 64, 1, 4);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld4_dup_expected_0, "chunk 0"); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld4_dup_expected_0, "chunk 0");
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
TEST_VLDX_DUP_EXTRA_CHUNK(poly, 64, 1, 4, 1); TEST_VLDX_DUP_EXTRA_CHUNK(poly, 64, 1, 4, 1);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld4_dup_expected_1, "chunk 1"); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld4_dup_expected_1, "chunk 1");
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
TEST_VLDX_DUP_EXTRA_CHUNK(poly, 64, 1, 4, 2); TEST_VLDX_DUP_EXTRA_CHUNK(poly, 64, 1, 4, 2);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld4_dup_expected_2, "chunk 2"); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld4_dup_expected_2, "chunk 2");
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
TEST_VLDX_DUP_EXTRA_CHUNK(poly, 64, 1, 4, 3); TEST_VLDX_DUP_EXTRA_CHUNK(poly, 64, 1, 4, 3);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld4_dup_expected_3, "chunk 3"); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vld4_dup_expected_3, "chunk 3");
/* vsli_p64 tests. */ /* vsli_p64 tests. */
#undef TEST_MSG #undef TEST_MSG
...@@ -661,8 +661,8 @@ int main (void) ...@@ -661,8 +661,8 @@ int main (void)
TEST_VSXI(vsli, , poly, p, 64, 1, 3); TEST_VSXI(vsli, , poly, p, 64, 1, 3);
TEST_VSXI(vsli, q, poly, p, 64, 2, 53); TEST_VSXI(vsli, q, poly, p, 64, 2, 53);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vsli_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vsli_expected, "");
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vsli_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vsli_expected, "");
/* Test cases with maximum shift amount. */ /* Test cases with maximum shift amount. */
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
...@@ -672,8 +672,8 @@ int main (void) ...@@ -672,8 +672,8 @@ int main (void)
TEST_VSXI(vsli, q, poly, p, 64, 2, 63); TEST_VSXI(vsli, q, poly, p, 64, 2, 63);
#define COMMENT "(max shift amount)" #define COMMENT "(max shift amount)"
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vsli_expected_max_shift, COMMENT); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vsli_expected_max_shift, COMMENT);
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vsli_expected_max_shift, COMMENT); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vsli_expected_max_shift, COMMENT);
/* vsri_p64 tests. */ /* vsri_p64 tests. */
#undef TEST_MSG #undef TEST_MSG
...@@ -691,8 +691,8 @@ int main (void) ...@@ -691,8 +691,8 @@ int main (void)
TEST_VSXI(vsri, , poly, p, 64, 1, 3); TEST_VSXI(vsri, , poly, p, 64, 1, 3);
TEST_VSXI(vsri, q, poly, p, 64, 2, 53); TEST_VSXI(vsri, q, poly, p, 64, 2, 53);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vsri_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vsri_expected, "");
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vsri_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vsri_expected, "");
/* Test cases with maximum shift amount. */ /* Test cases with maximum shift amount. */
CLEAN(result, poly, 64, 1); CLEAN(result, poly, 64, 1);
...@@ -702,8 +702,8 @@ int main (void) ...@@ -702,8 +702,8 @@ int main (void)
TEST_VSXI(vsri, q, poly, p, 64, 2, 64); TEST_VSXI(vsri, q, poly, p, 64, 2, 64);
#define COMMENT "(max shift amount)" #define COMMENT "(max shift amount)"
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vsri_expected_max_shift, COMMENT); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vsri_expected_max_shift, COMMENT);
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vsri_expected_max_shift, COMMENT); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vsri_expected_max_shift, COMMENT);
/* vst1_lane_p64 tests. */ /* vst1_lane_p64 tests. */
#undef TEST_MSG #undef TEST_MSG
...@@ -724,8 +724,8 @@ int main (void) ...@@ -724,8 +724,8 @@ int main (void)
TEST_VST1_LANE(, poly, p, 64, 1, 0); TEST_VST1_LANE(, poly, p, 64, 1, 0);
TEST_VST1_LANE(q, poly, p, 64, 2, 0); TEST_VST1_LANE(q, poly, p, 64, 2, 0);
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vst1_lane_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vst1_lane_expected, "");
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vst1_lane_expected, ""); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vst1_lane_expected, "");
#ifdef __aarch64__ #ifdef __aarch64__
...@@ -751,16 +751,16 @@ int main (void) ...@@ -751,16 +751,16 @@ int main (void)
switch (i) { switch (i) {
case 0: case 0:
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vmov_n_expected0, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vmov_n_expected0, "");
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vmov_n_expected0, ""); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vmov_n_expected0, "");
break; break;
case 1: case 1:
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vmov_n_expected1, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vmov_n_expected1, "");
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vmov_n_expected1, ""); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vmov_n_expected1, "");
break; break;
case 2: case 2:
CHECK(TEST_MSG, poly, 64, 1, PRIx64, vmov_n_expected2, ""); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, vmov_n_expected2, "");
CHECK(TEST_MSG, poly, 64, 2, PRIx64, vmov_n_expected2, ""); CHECK_POLY(TEST_MSG, poly, 64, 2, PRIx64, vmov_n_expected2, "");
break; break;
default: default:
abort(); abort();
...@@ -780,8 +780,8 @@ int main (void) ...@@ -780,8 +780,8 @@ int main (void)
TEST_MSG, __FILE__, __LINE__, \ TEST_MSG, __FILE__, __LINE__, \
STR(VECT_VAR(vget_lane_expected, T1, W, N)), \ STR(VECT_VAR(vget_lane_expected, T1, W, N)), \
STR(VECT_NAME(T1, W, N)), \ STR(VECT_NAME(T1, W, N)), \
VECT_VAR(vget_lane_vector, T1, W, N), \ (uint##W##_t)VECT_VAR(vget_lane_vector, T1, W, N), \
VECT_VAR(vget_lane_expected, T1, W, N)); \ (uint##W##_t)VECT_VAR(vget_lane_expected, T1, W, N)); \
abort (); \ abort (); \
} }
...@@ -864,9 +864,9 @@ VECT_VAR_DECL_INIT(buffer_vld4_lane, poly, 64, 4); ...@@ -864,9 +864,9 @@ VECT_VAR_DECL_INIT(buffer_vld4_lane, poly, 64, 4);
TEST_EXTRA_CHUNK(poly, 64, 1, X, Y) \ TEST_EXTRA_CHUNK(poly, 64, 1, X, Y) \
TEST_EXTRA_CHUNK(poly, 64, 2, X, Y) TEST_EXTRA_CHUNK(poly, 64, 2, X, Y)
#define CHECK_RESULTS_VLD_STX_LANE(test_name,EXPECTED,comment) \ #define CHECK_RESULTS_VLD_STX_LANE(test_name,EXPECTED,comment) \
CHECK(test_name, poly, 64, 1, PRIx64, EXPECTED, comment); \ CHECK_POLY(test_name, poly, 64, 1, PRIx64, EXPECTED, comment); \
CHECK(test_name, poly, 64, 2, PRIx64, EXPECTED, comment); CHECK_POLY(test_name, poly, 64, 2, PRIx64, EXPECTED, comment);
/* Declare the temporary buffers / variables. */ /* Declare the temporary buffers / variables. */
DECL_ALL_VLD_STX_LANE(2); DECL_ALL_VLD_STX_LANE(2);
...@@ -908,8 +908,8 @@ VECT_VAR_DECL_INIT(buffer_vld4_lane, poly, 64, 4); ...@@ -908,8 +908,8 @@ VECT_VAR_DECL_INIT(buffer_vld4_lane, poly, 64, 4);
TEST_ALL_EXTRA_CHUNKS(4, 1); TEST_ALL_EXTRA_CHUNKS(4, 1);
CHECK_RESULTS_VLD_STX_LANE (TEST_MSG, expected_vld_st4_1, " chunk 1"); CHECK_RESULTS_VLD_STX_LANE (TEST_MSG, expected_vld_st4_1, " chunk 1");
TEST_ALL_EXTRA_CHUNKS(4, 2);
TEST_ALL_EXTRA_CHUNKS(4, 2);
CHECK_RESULTS_VLD_STX_LANE (TEST_MSG, expected_vld_st4_2, " chunk 2"); CHECK_RESULTS_VLD_STX_LANE (TEST_MSG, expected_vld_st4_2, " chunk 2");
TEST_ALL_EXTRA_CHUNKS(4, 3); TEST_ALL_EXTRA_CHUNKS(4, 3);
...@@ -961,12 +961,12 @@ VECT_VAR_DECL_INIT(buffer_vld4_lane, poly, 64, 4); ...@@ -961,12 +961,12 @@ VECT_VAR_DECL_INIT(buffer_vld4_lane, poly, 64, 4);
TEST_ALL_VSTX_LANE(2); TEST_ALL_VSTX_LANE(2);
#define CMT " (chunk 0)" #define CMT " (chunk 0)"
CHECK(TEST_MSG, poly, 64, 1, PRIx64, expected_vld_st2_0, CMT); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, expected_vld_st2_0, CMT);
TEST_ALL_EXTRA_CHUNKS(2, 1); TEST_ALL_EXTRA_CHUNKS(2, 1);
#undef CMT #undef CMT
#define CMT " chunk 1" #define CMT " chunk 1"
CHECK(TEST_MSG, poly, 64, 1, PRIx64, expected_vld_st2_1, CMT); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, expected_vld_st2_1, CMT);
/* Check vst3_lane/vst3q_lane. */ /* Check vst3_lane/vst3q_lane. */
clean_results (); clean_results ();
...@@ -976,19 +976,19 @@ VECT_VAR_DECL_INIT(buffer_vld4_lane, poly, 64, 4); ...@@ -976,19 +976,19 @@ VECT_VAR_DECL_INIT(buffer_vld4_lane, poly, 64, 4);
#undef CMT #undef CMT
#define CMT " (chunk 0)" #define CMT " (chunk 0)"
CHECK(TEST_MSG, poly, 64, 1, PRIx64, expected_vld_st3_0, CMT); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, expected_vld_st3_0, CMT);
TEST_ALL_EXTRA_CHUNKS(3, 1); TEST_ALL_EXTRA_CHUNKS(3, 1);
#undef CMT #undef CMT
#define CMT " (chunk 1)" #define CMT " (chunk 1)"
CHECK(TEST_MSG, poly, 64, 1, PRIx64, expected_vld_st3_1, CMT); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, expected_vld_st3_1, CMT);
TEST_ALL_EXTRA_CHUNKS(3, 2); TEST_ALL_EXTRA_CHUNKS(3, 2);
#undef CMT #undef CMT
#define CMT " (chunk 2)" #define CMT " (chunk 2)"
CHECK(TEST_MSG, poly, 64, 1, PRIx64, expected_vld_st3_2, CMT); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, expected_vld_st3_2, CMT);
/* Check vst4_lane/vst4q_lane. */ /* Check vst4_lane/vst4q_lane. */
clean_results (); clean_results ();
...@@ -998,25 +998,25 @@ VECT_VAR_DECL_INIT(buffer_vld4_lane, poly, 64, 4); ...@@ -998,25 +998,25 @@ VECT_VAR_DECL_INIT(buffer_vld4_lane, poly, 64, 4);
#undef CMT #undef CMT
#define CMT " (chunk 0)" #define CMT " (chunk 0)"
CHECK(TEST_MSG, poly, 64, 1, PRIx64, expected_vld_st4_0, CMT); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, expected_vld_st4_0, CMT);
TEST_ALL_EXTRA_CHUNKS(4, 1); TEST_ALL_EXTRA_CHUNKS(4, 1);
#undef CMT #undef CMT
#define CMT " (chunk 1)" #define CMT " (chunk 1)"
CHECK(TEST_MSG, poly, 64, 1, PRIx64, expected_vld_st4_1, CMT); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, expected_vld_st4_1, CMT);
TEST_ALL_EXTRA_CHUNKS(4, 2); TEST_ALL_EXTRA_CHUNKS(4, 2);
#undef CMT #undef CMT
#define CMT " (chunk 2)" #define CMT " (chunk 2)"
CHECK(TEST_MSG, poly, 64, 1, PRIx64, expected_vld_st4_2, CMT); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, expected_vld_st4_2, CMT);
TEST_ALL_EXTRA_CHUNKS(4, 3); TEST_ALL_EXTRA_CHUNKS(4, 3);
#undef CMT #undef CMT
#define CMT " (chunk 3)" #define CMT " (chunk 3)"
CHECK(TEST_MSG, poly, 64, 1, PRIx64, expected_vld_st4_3, CMT); CHECK_POLY(TEST_MSG, poly, 64, 1, PRIx64, expected_vld_st4_3, CMT);
#endif /* __aarch64__. */ #endif /* __aarch64__. */
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc
...@@ -61,11 +61,11 @@ void FNNAME (INSN_NAME) (void) ...@@ -61,11 +61,11 @@ void FNNAME (INSN_NAME) (void)
TEST_UNARY_SAT_OP(INSN_NAME, q, int, s, 32, 4, expected_cumulative_sat, ""); TEST_UNARY_SAT_OP(INSN_NAME, q, int, s, 32, 4, expected_cumulative_sat, "");
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, int, 16, 4, PRIx8, expected, ""); CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, int, 32, 2, PRIx8, expected, ""); CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, ""); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
CHECK(TEST_MSG, int, 16, 8, PRIx8, expected, ""); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, int, 32, 4, PRIx8, expected, ""); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
#ifdef EXTRA_TESTS #ifdef EXTRA_TESTS
EXTRA_TESTS(); EXTRA_TESTS();
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcnt.c
...@@ -65,10 +65,10 @@ FNNAME (INSN_NAME) ...@@ -65,10 +65,10 @@ FNNAME (INSN_NAME)
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, ""); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, ""); CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected, ""); CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected, "");
} }
int main (void) int main (void)
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcombine.c
...@@ -93,8 +93,8 @@ void exec_vcombine (void) ...@@ -93,8 +93,8 @@ void exec_vcombine (void)
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, ""); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, ""); CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, "");
CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected, ""); CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected, "");
CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected, ""); CHECK_POLY(TEST_MSG, poly, 16, 8, PRIx16, expected, "");
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
CHECK_FP(TEST_MSG, float, 16, 8, PRIx16, expected, ""); CHECK_FP(TEST_MSG, float, 16, 8, PRIx16, expected, "");
#endif #endif
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcreate.c
...@@ -106,8 +106,8 @@ FNNAME (INSN_NAME) ...@@ -106,8 +106,8 @@ FNNAME (INSN_NAME)
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, ""); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, ""); CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected, ""); CHECK_POLY(TEST_MSG, poly, 16, 4, PRIx16, expected, "");
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected, ""); CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected, "");
#endif #endif
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfms_vfma_n.c
...@@ -345,13 +345,13 @@ void exec_vfma_vfms_n (void) ...@@ -345,13 +345,13 @@ void exec_vfma_vfms_n (void)
VECT_VAR (vsrc_2, float, 64, 2), delem0); VECT_VAR (vsrc_2, float, 64, 2), delem0);
vst1q_f64 (VECT_VAR (result, float, 64, 2), vst1q_f64 (VECT_VAR (result, float, 64, 2),
VECT_VAR (vector_res, float, 64, 2)); VECT_VAR (vector_res, float, 64, 2));
CHECK_FP (TEST_MSG, float, 64, 2, PRIx16, expectedfms0_static, ""); CHECK_FP (TEST_MSG, float, 64, 2, PRIx64, expectedfms0_static, "");
VECT_VAR (vector_res, float, 64, 2) = VECT_VAR (vector_res, float, 64, 2) =
vfmaq_n_f64 (VECT_VAR (vsrc_1, float, 64, 2), vfmaq_n_f64 (VECT_VAR (vsrc_1, float, 64, 2),
VECT_VAR (vsrc_2, float, 64, 2), delem0); VECT_VAR (vsrc_2, float, 64, 2), delem0);
vst1q_f64 (VECT_VAR (result, float, 64, 2), vst1q_f64 (VECT_VAR (result, float, 64, 2),
VECT_VAR (vector_res, float, 64, 2)); VECT_VAR (vector_res, float, 64, 2));
CHECK_FP (TEST_MSG, float, 64, 2, PRIx16, expectedfma0_static, ""); CHECK_FP (TEST_MSG, float, 64, 2, PRIx64, expectedfma0_static, "");
VECT_VAR_DECL (buf_src_3, float, 64, 2) [] = {DA2, DA3}; VECT_VAR_DECL (buf_src_3, float, 64, 2) [] = {DA2, DA3};
VECT_VAR_DECL (buf_src_4, float, 64, 2) [] = {DB2, DB3}; VECT_VAR_DECL (buf_src_4, float, 64, 2) [] = {DB2, DB3};
...@@ -362,13 +362,13 @@ void exec_vfma_vfms_n (void) ...@@ -362,13 +362,13 @@ void exec_vfma_vfms_n (void)
VECT_VAR (vsrc_2, float, 64, 2), delem1); VECT_VAR (vsrc_2, float, 64, 2), delem1);
vst1q_f64 (VECT_VAR (result, float, 64, 2), vst1q_f64 (VECT_VAR (result, float, 64, 2),
VECT_VAR (vector_res, float, 64, 2)); VECT_VAR (vector_res, float, 64, 2));
CHECK_FP (TEST_MSG, float, 64, 2, PRIx16, expectedfms1_static, ""); CHECK_FP (TEST_MSG, float, 64, 2, PRIx64, expectedfms1_static, "");
VECT_VAR (vector_res, float, 64, 2) = VECT_VAR (vector_res, float, 64, 2) =
vfmaq_n_f64 (VECT_VAR (vsrc_1, float, 64, 2), vfmaq_n_f64 (VECT_VAR (vsrc_1, float, 64, 2),
VECT_VAR (vsrc_2, float, 64, 2), delem1); VECT_VAR (vsrc_2, float, 64, 2), delem1);
vst1q_f64 (VECT_VAR (result, float, 64, 2), vst1q_f64 (VECT_VAR (result, float, 64, 2),
VECT_VAR (vector_res, float, 64, 2)); VECT_VAR (vector_res, float, 64, 2));
CHECK_FP (TEST_MSG, float, 64, 2, PRIx16, expectedfma1_static, ""); CHECK_FP (TEST_MSG, float, 64, 2, PRIx64, expectedfma1_static, "");
VECT_VAR_DECL (buf_src_5, float, 64, 2) [] = {DA4, DA5}; VECT_VAR_DECL (buf_src_5, float, 64, 2) [] = {DA4, DA5};
VECT_VAR_DECL (buf_src_6, float, 64, 2) [] = {DB4, DB5}; VECT_VAR_DECL (buf_src_6, float, 64, 2) [] = {DB4, DB5};
...@@ -379,13 +379,13 @@ void exec_vfma_vfms_n (void) ...@@ -379,13 +379,13 @@ void exec_vfma_vfms_n (void)
VECT_VAR (vsrc_2, float, 64, 2), delem2); VECT_VAR (vsrc_2, float, 64, 2), delem2);
vst1q_f64 (VECT_VAR (result, float, 64, 2), vst1q_f64 (VECT_VAR (result, float, 64, 2),
VECT_VAR (vector_res, float, 64, 2)); VECT_VAR (vector_res, float, 64, 2));
CHECK_FP (TEST_MSG, float, 64, 2, PRIx16, expectedfms2_static, ""); CHECK_FP (TEST_MSG, float, 64, 2, PRIx64, expectedfms2_static, "");
VECT_VAR (vector_res, float, 64, 2) = VECT_VAR (vector_res, float, 64, 2) =
vfmaq_n_f64 (VECT_VAR (vsrc_1, float, 64, 2), vfmaq_n_f64 (VECT_VAR (vsrc_1, float, 64, 2),
VECT_VAR (vsrc_2, float, 64, 2), delem2); VECT_VAR (vsrc_2, float, 64, 2), delem2);
vst1q_f64 (VECT_VAR (result, float, 64, 2), vst1q_f64 (VECT_VAR (result, float, 64, 2),
VECT_VAR (vector_res, float, 64, 2)); VECT_VAR (vector_res, float, 64, 2));
CHECK_FP (TEST_MSG, float, 64, 2, PRIx16, expectedfma2_static, ""); CHECK_FP (TEST_MSG, float, 64, 2, PRIx64, expectedfma2_static, "");
VECT_VAR_DECL (buf_src_7, float, 64, 2) [] = {DA6, DA7}; VECT_VAR_DECL (buf_src_7, float, 64, 2) [] = {DA6, DA7};
VECT_VAR_DECL (buf_src_8, float, 64, 2) [] = {DB6, DB7}; VECT_VAR_DECL (buf_src_8, float, 64, 2) [] = {DB6, DB7};
...@@ -396,13 +396,13 @@ void exec_vfma_vfms_n (void) ...@@ -396,13 +396,13 @@ void exec_vfma_vfms_n (void)
VECT_VAR (vsrc_2, float, 64, 2), delem3); VECT_VAR (vsrc_2, float, 64, 2), delem3);
vst1q_f64 (VECT_VAR (result, float, 64, 2), vst1q_f64 (VECT_VAR (result, float, 64, 2),
VECT_VAR (vector_res, float, 64, 2)); VECT_VAR (vector_res, float, 64, 2));
CHECK_FP (TEST_MSG, float, 64, 2, PRIx16, expectedfms3_static, ""); CHECK_FP (TEST_MSG, float, 64, 2, PRIx64, expectedfms3_static, "");
VECT_VAR (vector_res, float, 64, 2) = VECT_VAR (vector_res, float, 64, 2) =
vfmaq_n_f64 (VECT_VAR (vsrc_1, float, 64, 2), vfmaq_n_f64 (VECT_VAR (vsrc_1, float, 64, 2),
VECT_VAR (vsrc_2, float, 64, 2), delem3); VECT_VAR (vsrc_2, float, 64, 2), delem3);
vst1q_f64 (VECT_VAR (result, float, 64, 2), vst1q_f64 (VECT_VAR (result, float, 64, 2),
VECT_VAR (vector_res, float, 64, 2)); VECT_VAR (vector_res, float, 64, 2));
CHECK_FP (TEST_MSG, float, 64, 2, PRIx16, expectedfma3_static, ""); CHECK_FP (TEST_MSG, float, 64, 2, PRIx64, expectedfma3_static, "");
#undef TEST_MSG #undef TEST_MSG
#define TEST_MSG "VFMS_VFMA_N (FP64)" #define TEST_MSG "VFMS_VFMA_N (FP64)"
...@@ -419,13 +419,13 @@ void exec_vfma_vfms_n (void) ...@@ -419,13 +419,13 @@ void exec_vfma_vfms_n (void)
VECT_VAR (vsrc_2, float, 64, 1), delem0); VECT_VAR (vsrc_2, float, 64, 1), delem0);
vst1_f64 (VECT_VAR (result, float, 64, 1), vst1_f64 (VECT_VAR (result, float, 64, 1),
VECT_VAR (vector_res, float, 64, 1)); VECT_VAR (vector_res, float, 64, 1));
CHECK_FP (TEST_MSG, float, 64, 1, PRIx16, expectedfms0_static, ""); CHECK_FP (TEST_MSG, float, 64, 1, PRIx64, expectedfms0_static, "");
VECT_VAR (vector_res, float, 64, 1) = VECT_VAR (vector_res, float, 64, 1) =
vfma_n_f64 (VECT_VAR (vsrc_1, float, 64, 1), vfma_n_f64 (VECT_VAR (vsrc_1, float, 64, 1),
VECT_VAR (vsrc_2, float, 64, 1), delem0); VECT_VAR (vsrc_2, float, 64, 1), delem0);
vst1_f64 (VECT_VAR (result, float, 64, 1), vst1_f64 (VECT_VAR (result, float, 64, 1),
VECT_VAR (vector_res, float, 64, 1)); VECT_VAR (vector_res, float, 64, 1));
CHECK_FP (TEST_MSG, float, 64, 1, PRIx16, expectedfma0_static, ""); CHECK_FP (TEST_MSG, float, 64, 1, PRIx64, expectedfma0_static, "");
VECT_VAR_DECL (buf_src_3, float, 64, 1) [] = {DA2}; VECT_VAR_DECL (buf_src_3, float, 64, 1) [] = {DA2};
VECT_VAR_DECL (buf_src_4, float, 64, 1) [] = {DB2}; VECT_VAR_DECL (buf_src_4, float, 64, 1) [] = {DB2};
...@@ -436,13 +436,13 @@ void exec_vfma_vfms_n (void) ...@@ -436,13 +436,13 @@ void exec_vfma_vfms_n (void)
VECT_VAR (vsrc_2, float, 64, 1), delem1); VECT_VAR (vsrc_2, float, 64, 1), delem1);
vst1_f64 (VECT_VAR (result, float, 64, 1), vst1_f64 (VECT_VAR (result, float, 64, 1),
VECT_VAR (vector_res, float, 64, 1)); VECT_VAR (vector_res, float, 64, 1));
CHECK_FP (TEST_MSG, float, 64, 1, PRIx16, expectedfms1_static, ""); CHECK_FP (TEST_MSG, float, 64, 1, PRIx64, expectedfms1_static, "");
VECT_VAR (vector_res, float, 64, 1) = VECT_VAR (vector_res, float, 64, 1) =
vfma_n_f64 (VECT_VAR (vsrc_1, float, 64, 1), vfma_n_f64 (VECT_VAR (vsrc_1, float, 64, 1),
VECT_VAR (vsrc_2, float, 64, 1), delem1); VECT_VAR (vsrc_2, float, 64, 1), delem1);
vst1_f64 (VECT_VAR (result, float, 64, 1), vst1_f64 (VECT_VAR (result, float, 64, 1),
VECT_VAR (vector_res, float, 64, 1)); VECT_VAR (vector_res, float, 64, 1));
CHECK_FP (TEST_MSG, float, 64, 1, PRIx16, expectedfma1_static, ""); CHECK_FP (TEST_MSG, float, 64, 1, PRIx64, expectedfma1_static, "");
VECT_VAR_DECL (buf_src_5, float, 64, 1) [] = {DA4}; VECT_VAR_DECL (buf_src_5, float, 64, 1) [] = {DA4};
VECT_VAR_DECL (buf_src_6, float, 64, 1) [] = {DB4}; VECT_VAR_DECL (buf_src_6, float, 64, 1) [] = {DB4};
...@@ -453,13 +453,13 @@ void exec_vfma_vfms_n (void) ...@@ -453,13 +453,13 @@ void exec_vfma_vfms_n (void)
VECT_VAR (vsrc_2, float, 64, 1), delem2); VECT_VAR (vsrc_2, float, 64, 1), delem2);
vst1_f64 (VECT_VAR (result, float, 64, 1), vst1_f64 (VECT_VAR (result, float, 64, 1),
VECT_VAR (vector_res, float, 64, 1)); VECT_VAR (vector_res, float, 64, 1));
CHECK_FP (TEST_MSG, float, 64, 1, PRIx16, expectedfms2_static, ""); CHECK_FP (TEST_MSG, float, 64, 1, PRIx64, expectedfms2_static, "");
VECT_VAR (vector_res, float, 64, 1) = VECT_VAR (vector_res, float, 64, 1) =
vfma_n_f64 (VECT_VAR (vsrc_1, float, 64, 1), vfma_n_f64 (VECT_VAR (vsrc_1, float, 64, 1),
VECT_VAR (vsrc_2, float, 64, 1), delem2); VECT_VAR (vsrc_2, float, 64, 1), delem2);
vst1_f64 (VECT_VAR (result, float, 64, 1), vst1_f64 (VECT_VAR (result, float, 64, 1),
VECT_VAR (vector_res, float, 64, 1)); VECT_VAR (vector_res, float, 64, 1));
CHECK_FP (TEST_MSG, float, 64, 1, PRIx16, expectedfma2_static, ""); CHECK_FP (TEST_MSG, float, 64, 1, PRIx64, expectedfma2_static, "");
VECT_VAR_DECL (buf_src_7, float, 64, 1) [] = {DA6}; VECT_VAR_DECL (buf_src_7, float, 64, 1) [] = {DA6};
VECT_VAR_DECL (buf_src_8, float, 64, 1) [] = {DB6}; VECT_VAR_DECL (buf_src_8, float, 64, 1) [] = {DB6};
...@@ -470,13 +470,13 @@ void exec_vfma_vfms_n (void) ...@@ -470,13 +470,13 @@ void exec_vfma_vfms_n (void)
VECT_VAR (vsrc_2, float, 64, 1), delem3); VECT_VAR (vsrc_2, float, 64, 1), delem3);
vst1_f64 (VECT_VAR (result, float, 64, 1), vst1_f64 (VECT_VAR (result, float, 64, 1),
VECT_VAR (vector_res, float, 64, 1)); VECT_VAR (vector_res, float, 64, 1));
CHECK_FP (TEST_MSG, float, 64, 1, PRIx16, expectedfms3_static, ""); CHECK_FP (TEST_MSG, float, 64, 1, PRIx64, expectedfms3_static, "");
VECT_VAR (vector_res, float, 64, 1) = VECT_VAR (vector_res, float, 64, 1) =
vfma_n_f64 (VECT_VAR (vsrc_1, float, 64, 1), vfma_n_f64 (VECT_VAR (vsrc_1, float, 64, 1),
VECT_VAR (vsrc_2, float, 64, 1), delem3); VECT_VAR (vsrc_2, float, 64, 1), delem3);
vst1_f64 (VECT_VAR (result, float, 64, 1), vst1_f64 (VECT_VAR (result, float, 64, 1),
VECT_VAR (vector_res, float, 64, 1)); VECT_VAR (vector_res, float, 64, 1));
CHECK_FP (TEST_MSG, float, 64, 1, PRIx16, expectedfma3_static, ""); CHECK_FP (TEST_MSG, float, 64, 1, PRIx64, expectedfma3_static, "");
} }
#endif #endif
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vget_high.c
...@@ -63,8 +63,8 @@ void exec_vget_high (void) ...@@ -63,8 +63,8 @@ void exec_vget_high (void)
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, ""); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, ""); CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected, ""); CHECK_POLY(TEST_MSG, poly, 16, 4, PRIx16, expected, "");
CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected, ""); CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected, "");
} }
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vget_low.c
...@@ -63,8 +63,8 @@ void exec_vget_low (void) ...@@ -63,8 +63,8 @@ void exec_vget_low (void)
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, ""); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, ""); CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected, ""); CHECK_POLY(TEST_MSG, poly, 16, 4, PRIx16, expected, "");
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected, ""); CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected, "");
#endif #endif
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vldX.c
...@@ -528,8 +528,8 @@ void exec_vldX (void) ...@@ -528,8 +528,8 @@ void exec_vldX (void)
CHECK(test_name, uint, 16, 4, PRIx16, EXPECTED, comment); \ CHECK(test_name, uint, 16, 4, PRIx16, EXPECTED, comment); \
CHECK(test_name, uint, 32, 2, PRIx32, EXPECTED, comment); \ CHECK(test_name, uint, 32, 2, PRIx32, EXPECTED, comment); \
CHECK(test_name, uint, 64, 1, PRIx64, EXPECTED, comment); \ CHECK(test_name, uint, 64, 1, PRIx64, EXPECTED, comment); \
CHECK(test_name, poly, 8, 8, PRIx8, EXPECTED, comment); \ CHECK_POLY(test_name, poly, 8, 8, PRIx8, EXPECTED, comment); \
CHECK(test_name, poly, 16, 4, PRIx16, EXPECTED, comment); \ CHECK_POLY(test_name, poly, 16, 4, PRIx16, EXPECTED, comment); \
CHECK_FP(test_name, float, 32, 2, PRIx32, EXPECTED, comment); \ CHECK_FP(test_name, float, 32, 2, PRIx32, EXPECTED, comment); \
\ \
CHECK(test_name, int, 8, 16, PRIx8, EXPECTED, comment); \ CHECK(test_name, int, 8, 16, PRIx8, EXPECTED, comment); \
...@@ -538,8 +538,8 @@ void exec_vldX (void) ...@@ -538,8 +538,8 @@ void exec_vldX (void)
CHECK(test_name, uint, 8, 16, PRIx8, EXPECTED, comment); \ CHECK(test_name, uint, 8, 16, PRIx8, EXPECTED, comment); \
CHECK(test_name, uint, 16, 8, PRIx16, EXPECTED, comment); \ CHECK(test_name, uint, 16, 8, PRIx16, EXPECTED, comment); \
CHECK(test_name, uint, 32, 4, PRIx32, EXPECTED, comment); \ CHECK(test_name, uint, 32, 4, PRIx32, EXPECTED, comment); \
CHECK(test_name, poly, 8, 16, PRIx8, EXPECTED, comment); \ CHECK_POLY(test_name, poly, 8, 16, PRIx8, EXPECTED, comment); \
CHECK(test_name, poly, 16, 8, PRIx16, EXPECTED, comment); \ CHECK_POLY(test_name, poly, 16, 8, PRIx16, EXPECTED, comment); \
CHECK_FP(test_name, float, 32, 4, PRIx32, EXPECTED, comment) CHECK_FP(test_name, float, 32, 4, PRIx32, EXPECTED, comment)
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vldX_dup.c
...@@ -270,8 +270,8 @@ void exec_vldX_dup (void) ...@@ -270,8 +270,8 @@ void exec_vldX_dup (void)
CHECK(test_name, uint, 16, 4, PRIx16, EXPECTED, comment); \ CHECK(test_name, uint, 16, 4, PRIx16, EXPECTED, comment); \
CHECK(test_name, uint, 32, 2, PRIx32, EXPECTED, comment); \ CHECK(test_name, uint, 32, 2, PRIx32, EXPECTED, comment); \
CHECK(test_name, uint, 64, 1, PRIx64, EXPECTED, comment); \ CHECK(test_name, uint, 64, 1, PRIx64, EXPECTED, comment); \
CHECK(test_name, poly, 8, 8, PRIx8, EXPECTED, comment); \ CHECK_POLY(test_name, poly, 8, 8, PRIx8, EXPECTED, comment); \
CHECK(test_name, poly, 16, 4, PRIx16, EXPECTED, comment); \ CHECK_POLY(test_name, poly, 16, 4, PRIx16, EXPECTED, comment); \
CHECK_FP(test_name, float, 32, 2, PRIx32, EXPECTED, comment) CHECK_FP(test_name, float, 32, 2, PRIx32, EXPECTED, comment)
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vldX_lane.c
...@@ -451,14 +451,14 @@ void exec_vldX_lane (void) ...@@ -451,14 +451,14 @@ void exec_vldX_lane (void)
CHECK(test_name, uint, 8, 8, PRIx8, EXPECTED, comment); \ CHECK(test_name, uint, 8, 8, PRIx8, EXPECTED, comment); \
CHECK(test_name, uint, 16, 4, PRIx16, EXPECTED, comment); \ CHECK(test_name, uint, 16, 4, PRIx16, EXPECTED, comment); \
CHECK(test_name, uint, 32, 2, PRIx32, EXPECTED, comment); \ CHECK(test_name, uint, 32, 2, PRIx32, EXPECTED, comment); \
CHECK(test_name, poly, 8, 8, PRIx8, EXPECTED, comment); \ CHECK_POLY(test_name, poly, 8, 8, PRIx8, EXPECTED, comment); \
CHECK(test_name, poly, 16, 4, PRIx16, EXPECTED, comment); \ CHECK_POLY(test_name, poly, 16, 4, PRIx16, EXPECTED, comment); \
CHECK_FP(test_name, float, 32, 2, PRIx32, EXPECTED, comment); \ CHECK_FP(test_name, float, 32, 2, PRIx32, EXPECTED, comment); \
CHECK(test_name, int, 16, 8, PRIx16, EXPECTED, comment); \ CHECK(test_name, int, 16, 8, PRIx16, EXPECTED, comment); \
CHECK(test_name, int, 32, 4, PRIx32, EXPECTED, comment); \ CHECK(test_name, int, 32, 4, PRIx32, EXPECTED, comment); \
CHECK(test_name, uint, 16, 8, PRIx16, EXPECTED, comment); \ CHECK(test_name, uint, 16, 8, PRIx16, EXPECTED, comment); \
CHECK(test_name, uint, 32, 4, PRIx32, EXPECTED, comment); \ CHECK(test_name, uint, 32, 4, PRIx32, EXPECTED, comment); \
CHECK(test_name, poly, 16, 8, PRIx16, EXPECTED, comment); \ CHECK_POLY(test_name, poly, 16, 8, PRIx16, EXPECTED, comment); \
CHECK_FP(test_name, float, 32, 4, PRIx32, EXPECTED, comment) CHECK_FP(test_name, float, 32, 4, PRIx32, EXPECTED, comment)
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmovn.c
...@@ -35,11 +35,11 @@ void exec_vmovn (void) ...@@ -35,11 +35,11 @@ void exec_vmovn (void)
TEST_VMOVN(uint, u, 32, 16, 4); TEST_VMOVN(uint, u, 32, 16, 4);
TEST_VMOVN(uint, u, 64, 32, 2); TEST_VMOVN(uint, u, 64, 32, 2);
CHECK(TEST_MSG, int, 8, 8, PRIx32, expected, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, int, 16, 4, PRIx64, expected, ""); CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, ""); CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, uint, 16, 4, PRIx64, expected, ""); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
} }
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul.c
...@@ -171,7 +171,7 @@ void FNNAME (INSN_NAME) (void) ...@@ -171,7 +171,7 @@ void FNNAME (INSN_NAME) (void)
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, ""); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected, "");
CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected, ""); CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, ""); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, ""); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
...@@ -179,7 +179,7 @@ void FNNAME (INSN_NAME) (void) ...@@ -179,7 +179,7 @@ void FNNAME (INSN_NAME) (void)
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, ""); CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, ""); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected, ""); CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected, "");
CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected, ""); CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected, "");
#if defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) #if defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected, ""); CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected, "");
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane.c
...@@ -116,17 +116,17 @@ void exec_vmul_lane (void) ...@@ -116,17 +116,17 @@ void exec_vmul_lane (void)
#endif #endif
TEST_VMUL_LANE(q, float, f, 32, 4, 2, 0); TEST_VMUL_LANE(q, float, f, 32, 4, 2, 0);
CHECK(TEST_MSG, int, 16, 4, PRIx64, expected, ""); CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, ""); CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 16, 4, PRIx64, expected, ""); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
#if defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) #if defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected, ""); CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected, "");
#endif #endif
CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected, ""); CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, int, 16, 8, PRIx64, expected, ""); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, ""); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 16, 8, PRIx64, expected, ""); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
#if defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) #if defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
CHECK_FP(TEST_MSG, float, 16, 8, PRIx16, expected, ""); CHECK_FP(TEST_MSG, float, 16, 8, PRIx16, expected, "");
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_n.c
...@@ -102,17 +102,17 @@ void FNNAME (INSN_NAME) (void) ...@@ -102,17 +102,17 @@ void FNNAME (INSN_NAME) (void)
#endif #endif
TEST_VMUL_N(q, float, f, 32, 4, 88.9f); TEST_VMUL_N(q, float, f, 32, 4, 88.9f);
CHECK(TEST_MSG, int, 16, 4, PRIx64, expected, ""); CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, ""); CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 16, 4, PRIx64, expected, ""); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
#if defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) #if defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected, ""); CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected, "");
#endif #endif
CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected, ""); CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, int, 16, 8, PRIx64, expected, ""); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, ""); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 16, 8, PRIx64, expected, ""); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
#if defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) #if defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
CHECK_FP(TEST_MSG, float, 16, 8, PRIx16, expected, ""); CHECK_FP(TEST_MSG, float, 16, 8, PRIx16, expected, "");
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmull.c
...@@ -59,13 +59,13 @@ void exec_vmull (void) ...@@ -59,13 +59,13 @@ void exec_vmull (void)
TEST_VMULL(uint, u, 32, 64, 2); TEST_VMULL(uint, u, 32, 64, 2);
TEST_VMULL(poly, p, 8, 16, 8); TEST_VMULL(poly, p, 8, 16, 8);
CHECK(TEST_MSG, int, 16, 8, PRIx64, expected, ""); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, ""); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, int, 64, 2, PRIx32, expected, ""); CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, "");
CHECK(TEST_MSG, uint, 16, 8, PRIx64, expected, ""); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 64, 2, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, "");
CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected, ""); CHECK_POLY(TEST_MSG, poly, 16, 8, PRIx16, expected, "");
} }
int main (void) int main (void)
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmull_lane.c
...@@ -54,9 +54,9 @@ void exec_vmull_lane (void) ...@@ -54,9 +54,9 @@ void exec_vmull_lane (void)
TEST_VMULL_LANE(uint, u, 32, 64, 2, 1); TEST_VMULL_LANE(uint, u, 32, 64, 2, 1);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, ""); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, int, 64, 2, PRIx32, expected, ""); CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, "");
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 64, 2, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, "");
} }
int main (void) int main (void)
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmvn.c
...@@ -120,14 +120,14 @@ FNNAME (INSN_NAME) ...@@ -120,14 +120,14 @@ FNNAME (INSN_NAME)
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, ""); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, ""); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, ""); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, ""); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, ""); CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, ""); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected, ""); CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected, "");
} }
int main (void) int main (void)
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpXXX.inc
...@@ -63,11 +63,11 @@ void FNNAME (INSN_NAME) (void) ...@@ -63,11 +63,11 @@ void FNNAME (INSN_NAME) (void)
#endif #endif
TEST_VPXXX(INSN_NAME, float, f, 32, 2); TEST_VPXXX(INSN_NAME, float, f, 32, 2);
CHECK(TEST_MSG, int, 8, 8, PRIx32, expected, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, int, 16, 4, PRIx64, expected, ""); CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, ""); CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, uint, 16, 4, PRIx64, expected, ""); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
#if defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) #if defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected, ""); CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected, "");
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqabs.c
...@@ -90,9 +90,9 @@ void vqabs_extra() ...@@ -90,9 +90,9 @@ void vqabs_extra()
TEST_UNARY_SAT_OP(INSN_NAME, q, int, s, 32, 4, expected_cumulative_sat_min_neg, MSG); TEST_UNARY_SAT_OP(INSN_NAME, q, int, s, 32, 4, expected_cumulative_sat_min_neg, MSG);
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_min_neg, MSG); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_min_neg, MSG);
CHECK(TEST_MSG, int, 16, 4, PRIx8, expected_min_neg, MSG); CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_min_neg, MSG);
CHECK(TEST_MSG, int, 32, 2, PRIx8, expected_min_neg, MSG); CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_min_neg, MSG);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_min_neg, MSG); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_min_neg, MSG);
CHECK(TEST_MSG, int, 16, 8, PRIx8, expected_min_neg, MSG); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_min_neg, MSG);
CHECK(TEST_MSG, int, 32, 4, PRIx8, expected_min_neg, MSG); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_min_neg, MSG);
} }
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmull.c
...@@ -63,8 +63,8 @@ void FNNAME (INSN_NAME) (void) ...@@ -63,8 +63,8 @@ void FNNAME (INSN_NAME) (void)
TEST_VQDMULL(int, s, 16, 32, 4, expected_cumulative_sat, ""); TEST_VQDMULL(int, s, 16, 32, 4, expected_cumulative_sat, "");
TEST_VQDMULL(int, s, 32, 64, 2, expected_cumulative_sat, ""); TEST_VQDMULL(int, s, 32, 64, 2, expected_cumulative_sat, "");
CHECK (TEST_MSG, int, 32, 4, PRIx16, expected, ""); CHECK (TEST_MSG, int, 32, 4, PRIx32, expected, "");
CHECK (TEST_MSG, int, 64, 2, PRIx32, expected, ""); CHECK (TEST_MSG, int, 64, 2, PRIx64, expected, "");
VDUP(vector, , int, s, 16, 4, 0x8000); VDUP(vector, , int, s, 16, 4, 0x8000);
VDUP(vector2, , int, s, 16, 4, 0x8000); VDUP(vector2, , int, s, 16, 4, 0x8000);
...@@ -75,8 +75,8 @@ void FNNAME (INSN_NAME) (void) ...@@ -75,8 +75,8 @@ void FNNAME (INSN_NAME) (void)
TEST_VQDMULL(int, s, 16, 32, 4, expected_cumulative_sat2, TEST_MSG2); TEST_VQDMULL(int, s, 16, 32, 4, expected_cumulative_sat2, TEST_MSG2);
TEST_VQDMULL(int, s, 32, 64, 2, expected_cumulative_sat2, TEST_MSG2); TEST_VQDMULL(int, s, 32, 64, 2, expected_cumulative_sat2, TEST_MSG2);
CHECK (TEST_MSG, int, 32, 4, PRIx16, expected2, TEST_MSG2); CHECK (TEST_MSG, int, 32, 4, PRIx32, expected2, TEST_MSG2);
CHECK (TEST_MSG, int, 64, 2, PRIx32, expected2, TEST_MSG2); CHECK (TEST_MSG, int, 64, 2, PRIx64, expected2, TEST_MSG2);
} }
int main (void) int main (void)
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqneg.c
...@@ -90,9 +90,9 @@ void vqneg_extra() ...@@ -90,9 +90,9 @@ void vqneg_extra()
TEST_UNARY_SAT_OP(INSN_NAME, q, int, s, 32, 4, expected_cumulative_sat_min_neg, MSG); TEST_UNARY_SAT_OP(INSN_NAME, q, int, s, 32, 4, expected_cumulative_sat_min_neg, MSG);
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_min_neg, MSG); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_min_neg, MSG);
CHECK(TEST_MSG, int, 16, 4, PRIx8, expected_min_neg, MSG); CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_min_neg, MSG);
CHECK(TEST_MSG, int, 32, 2, PRIx8, expected_min_neg, MSG); CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_min_neg, MSG);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_min_neg, MSG); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_min_neg, MSG);
CHECK(TEST_MSG, int, 16, 8, PRIx8, expected_min_neg, MSG); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_min_neg, MSG);
CHECK(TEST_MSG, int, 32, 4, PRIx8, expected_min_neg, MSG); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_min_neg, MSG);
} }
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqtbX.c
...@@ -318,13 +318,13 @@ void exec_vqtbX (void) ...@@ -318,13 +318,13 @@ void exec_vqtbX (void)
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vqtbl1, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vqtbl1, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vqtbl1, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vqtbl1, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vqtbl1, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vqtbl1, "");
#undef TEST_MSG #undef TEST_MSG
#define TEST_MSG "VQTBL1Q" #define TEST_MSG "VQTBL1Q"
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vqtbl1q, ""); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vqtbl1q, "");
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vqtbl1q, ""); CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vqtbl1q, "");
CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_vqtbl1q, ""); CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected_vqtbl1q, "");
/* Check vqtbl2. */ /* Check vqtbl2. */
clean_results (); clean_results ();
...@@ -334,13 +334,13 @@ void exec_vqtbX (void) ...@@ -334,13 +334,13 @@ void exec_vqtbX (void)
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vqtbl2, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vqtbl2, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vqtbl2, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vqtbl2, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vqtbl2, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vqtbl2, "");
#undef TEST_MSG #undef TEST_MSG
#define TEST_MSG "VQTBL2Q" #define TEST_MSG "VQTBL2Q"
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vqtbl2q, ""); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vqtbl2q, "");
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vqtbl2q, ""); CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vqtbl2q, "");
CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_vqtbl2q, ""); CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected_vqtbl2q, "");
/* Check vqtbl3. */ /* Check vqtbl3. */
clean_results (); clean_results ();
...@@ -350,13 +350,13 @@ void exec_vqtbX (void) ...@@ -350,13 +350,13 @@ void exec_vqtbX (void)
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vqtbl3, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vqtbl3, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vqtbl3, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vqtbl3, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vqtbl3, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vqtbl3, "");
#undef TEST_MSG #undef TEST_MSG
#define TEST_MSG "VQTBL3Q" #define TEST_MSG "VQTBL3Q"
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vqtbl3q, ""); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vqtbl3q, "");
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vqtbl3q, ""); CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vqtbl3q, "");
CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_vqtbl3q, ""); CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected_vqtbl3q, "");
/* Check vqtbl4. */ /* Check vqtbl4. */
clean_results (); clean_results ();
...@@ -366,13 +366,13 @@ void exec_vqtbX (void) ...@@ -366,13 +366,13 @@ void exec_vqtbX (void)
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vqtbl4, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vqtbl4, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vqtbl4, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vqtbl4, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vqtbl4, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vqtbl4, "");
#undef TEST_MSG #undef TEST_MSG
#define TEST_MSG "VQTBL4Q" #define TEST_MSG "VQTBL4Q"
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vqtbl4q, ""); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vqtbl4q, "");
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vqtbl4q, ""); CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vqtbl4q, "");
CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_vqtbl4q, ""); CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected_vqtbl4q, "");
/* Now test VQTBX. */ /* Now test VQTBX. */
...@@ -455,13 +455,13 @@ void exec_vqtbX (void) ...@@ -455,13 +455,13 @@ void exec_vqtbX (void)
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vqtbx1, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vqtbx1, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vqtbx1, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vqtbx1, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vqtbx1, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vqtbx1, "");
#undef TEST_MSG #undef TEST_MSG
#define TEST_MSG "VQTBX1Q" #define TEST_MSG "VQTBX1Q"
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vqtbx1q, ""); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vqtbx1q, "");
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vqtbx1q, ""); CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vqtbx1q, "");
CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_vqtbx1q, ""); CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected_vqtbx1q, "");
/* Check vqtbx2. */ /* Check vqtbx2. */
clean_results (); clean_results ();
...@@ -471,13 +471,13 @@ void exec_vqtbX (void) ...@@ -471,13 +471,13 @@ void exec_vqtbX (void)
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vqtbx2, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vqtbx2, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vqtbx2, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vqtbx2, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vqtbx2, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vqtbx2, "");
#undef TEST_MSG #undef TEST_MSG
#define TEST_MSG "VQTBX2Q" #define TEST_MSG "VQTBX2Q"
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vqtbx2q, ""); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vqtbx2q, "");
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vqtbx2q, ""); CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vqtbx2q, "");
CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_vqtbx2q, ""); CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected_vqtbx2q, "");
/* Check vqtbx3. */ /* Check vqtbx3. */
clean_results (); clean_results ();
...@@ -487,13 +487,13 @@ void exec_vqtbX (void) ...@@ -487,13 +487,13 @@ void exec_vqtbX (void)
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vqtbx3, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vqtbx3, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vqtbx3, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vqtbx3, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vqtbx3, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vqtbx3, "");
#undef TEST_MSG #undef TEST_MSG
#define TEST_MSG "VQTBX3Q" #define TEST_MSG "VQTBX3Q"
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vqtbx3q, ""); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vqtbx3q, "");
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vqtbx3q, ""); CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vqtbx3q, "");
CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_vqtbx3q, ""); CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected_vqtbx3q, "");
/* Check vqtbx4. */ /* Check vqtbx4. */
clean_results (); clean_results ();
...@@ -503,13 +503,13 @@ void exec_vqtbX (void) ...@@ -503,13 +503,13 @@ void exec_vqtbX (void)
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vqtbx4, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vqtbx4, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vqtbx4, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vqtbx4, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vqtbx4, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vqtbx4, "");
#undef TEST_MSG #undef TEST_MSG
#define TEST_MSG "VQTBX4Q" #define TEST_MSG "VQTBX4Q"
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vqtbx4q, ""); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vqtbx4q, "");
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vqtbx4q, ""); CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vqtbx4q, "");
CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_vqtbx4q, ""); CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected_vqtbx4q, "");
} }
int main (void) int main (void)
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c
...@@ -104,7 +104,7 @@ int main (void) ...@@ -104,7 +104,7 @@ int main (void)
vreinterpret##Q##_##T2##W##_##TS2##WS(VECT_VAR(vreint_vector, TS1, WS, NS))); \ vreinterpret##Q##_##T2##W##_##TS2##WS(VECT_VAR(vreint_vector, TS1, WS, NS))); \
vst1##Q##_##T2##64(VECT_VAR(result, poly, 64, 2), \ vst1##Q##_##T2##64(VECT_VAR(result, poly, 64, 2), \
VECT_VAR(vreint_vector_res, poly, 64, 2)); \ VECT_VAR(vreint_vector_res, poly, 64, 2)); \
CHECK(TEST_MSG, T1, 64, 2, PRIx##64, EXPECTED, ""); CHECK_POLY(TEST_MSG, T1, 64, 2, PRIx##64, EXPECTED, "");
TEST_VREINTERPRET128(q, poly, p, 128, 1, int, s, 8, 16, vreint_expected_q_p128_s8); TEST_VREINTERPRET128(q, poly, p, 128, 1, int, s, 8, 16, vreint_expected_q_p128_s8);
TEST_VREINTERPRET128(q, poly, p, 128, 1, int, s, 16, 8, vreint_expected_q_p128_s16); TEST_VREINTERPRET128(q, poly, p, 128, 1, int, s, 16, 8, vreint_expected_q_p128_s16);
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c
...@@ -114,6 +114,13 @@ int main (void) ...@@ -114,6 +114,13 @@ int main (void)
VECT_VAR(vreint_vector_res, T1, W, N)); \ VECT_VAR(vreint_vector_res, T1, W, N)); \
CHECK(TEST_MSG, T1, W, N, PRIx##W, EXPECTED, ""); CHECK(TEST_MSG, T1, W, N, PRIx##W, EXPECTED, "");
#define TEST_VREINTERPRET_TO_POLY(Q, T1, T2, W, N, TS1, TS2, WS, NS, EXPECTED) \
VECT_VAR(vreint_vector_res, T1, W, N) = \
vreinterpret##Q##_##T2##W##_##TS2##WS(VECT_VAR(vreint_vector, TS1, WS, NS)); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), \
VECT_VAR(vreint_vector_res, T1, W, N)); \
CHECK_POLY(TEST_MSG, T1, W, N, PRIx##W, EXPECTED, "");
#define TEST_VREINTERPRET_FP(Q, T1, T2, W, N, TS1, TS2, WS, NS, EXPECTED) \ #define TEST_VREINTERPRET_FP(Q, T1, T2, W, N, TS1, TS2, WS, NS, EXPECTED) \
VECT_VAR(vreint_vector_res, T1, W, N) = \ VECT_VAR(vreint_vector_res, T1, W, N) = \
vreinterpret##Q##_##T2##W##_##TS2##WS(VECT_VAR(vreint_vector, TS1, WS, NS)); \ vreinterpret##Q##_##T2##W##_##TS2##WS(VECT_VAR(vreint_vector, TS1, WS, NS)); \
...@@ -139,38 +146,38 @@ int main (void) ...@@ -139,38 +146,38 @@ int main (void)
/* vreinterpret_p64_* tests. */ /* vreinterpret_p64_* tests. */
#undef TEST_MSG #undef TEST_MSG
#define TEST_MSG "VREINTERPRET_P64_*" #define TEST_MSG "VREINTERPRET_P64_*"
TEST_VREINTERPRET(, poly, p, 64, 1, int, s, 8, 8, vreint_expected_p64_s8); TEST_VREINTERPRET_TO_POLY(, poly, p, 64, 1, int, s, 8, 8, vreint_expected_p64_s8);
TEST_VREINTERPRET(, poly, p, 64, 1, int, s, 16, 4, vreint_expected_p64_s16); TEST_VREINTERPRET_TO_POLY(, poly, p, 64, 1, int, s, 16, 4, vreint_expected_p64_s16);
TEST_VREINTERPRET(, poly, p, 64, 1, int, s, 32, 2, vreint_expected_p64_s32); TEST_VREINTERPRET_TO_POLY(, poly, p, 64, 1, int, s, 32, 2, vreint_expected_p64_s32);
TEST_VREINTERPRET(, poly, p, 64, 1, int, s, 64, 1, vreint_expected_p64_s64); TEST_VREINTERPRET_TO_POLY(, poly, p, 64, 1, int, s, 64, 1, vreint_expected_p64_s64);
TEST_VREINTERPRET(, poly, p, 64, 1, uint, u, 8, 8, vreint_expected_p64_u8); TEST_VREINTERPRET_TO_POLY(, poly, p, 64, 1, uint, u, 8, 8, vreint_expected_p64_u8);
TEST_VREINTERPRET(, poly, p, 64, 1, uint, u, 16, 4, vreint_expected_p64_u16); TEST_VREINTERPRET_TO_POLY(, poly, p, 64, 1, uint, u, 16, 4, vreint_expected_p64_u16);
TEST_VREINTERPRET(, poly, p, 64, 1, uint, u, 32, 2, vreint_expected_p64_u32); TEST_VREINTERPRET_TO_POLY(, poly, p, 64, 1, uint, u, 32, 2, vreint_expected_p64_u32);
TEST_VREINTERPRET(, poly, p, 64, 1, uint, u, 64, 1, vreint_expected_p64_u64); TEST_VREINTERPRET_TO_POLY(, poly, p, 64, 1, uint, u, 64, 1, vreint_expected_p64_u64);
TEST_VREINTERPRET(, poly, p, 64, 1, poly, p, 8, 8, vreint_expected_p64_p8); TEST_VREINTERPRET_TO_POLY(, poly, p, 64, 1, poly, p, 8, 8, vreint_expected_p64_p8);
TEST_VREINTERPRET(, poly, p, 64, 1, poly, p, 16, 4, vreint_expected_p64_p16); TEST_VREINTERPRET_TO_POLY(, poly, p, 64, 1, poly, p, 16, 4, vreint_expected_p64_p16);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
TEST_VREINTERPRET(, poly, p, 64, 1, float, f, 16, 4, vreint_expected_p64_f16); TEST_VREINTERPRET_TO_POLY(, poly, p, 64, 1, float, f, 16, 4, vreint_expected_p64_f16);
#endif #endif
TEST_VREINTERPRET(, poly, p, 64, 1, float, f, 32, 2, vreint_expected_p64_f32); TEST_VREINTERPRET_TO_POLY(, poly, p, 64, 1, float, f, 32, 2, vreint_expected_p64_f32);
/* vreinterpretq_p64_* tests. */ /* vreinterpretq_p64_* tests. */
#undef TEST_MSG #undef TEST_MSG
#define TEST_MSG "VREINTERPRETQ_P64_*" #define TEST_MSG "VREINTERPRETQ_P64_*"
TEST_VREINTERPRET(q, poly, p, 64, 2, int, s, 8, 16, vreint_expected_q_p64_s8); TEST_VREINTERPRET_TO_POLY(q, poly, p, 64, 2, int, s, 8, 16, vreint_expected_q_p64_s8);
TEST_VREINTERPRET(q, poly, p, 64, 2, int, s, 16, 8, vreint_expected_q_p64_s16); TEST_VREINTERPRET_TO_POLY(q, poly, p, 64, 2, int, s, 16, 8, vreint_expected_q_p64_s16);
TEST_VREINTERPRET(q, poly, p, 64, 2, int, s, 32, 4, vreint_expected_q_p64_s32); TEST_VREINTERPRET_TO_POLY(q, poly, p, 64, 2, int, s, 32, 4, vreint_expected_q_p64_s32);
TEST_VREINTERPRET(q, poly, p, 64, 2, int, s, 64, 2, vreint_expected_q_p64_s64); TEST_VREINTERPRET_TO_POLY(q, poly, p, 64, 2, int, s, 64, 2, vreint_expected_q_p64_s64);
TEST_VREINTERPRET(q, poly, p, 64, 2, uint, u, 8, 16, vreint_expected_q_p64_u8); TEST_VREINTERPRET_TO_POLY(q, poly, p, 64, 2, uint, u, 8, 16, vreint_expected_q_p64_u8);
TEST_VREINTERPRET(q, poly, p, 64, 2, uint, u, 16, 8, vreint_expected_q_p64_u16); TEST_VREINTERPRET_TO_POLY(q, poly, p, 64, 2, uint, u, 16, 8, vreint_expected_q_p64_u16);
TEST_VREINTERPRET(q, poly, p, 64, 2, uint, u, 32, 4, vreint_expected_q_p64_u32); TEST_VREINTERPRET_TO_POLY(q, poly, p, 64, 2, uint, u, 32, 4, vreint_expected_q_p64_u32);
TEST_VREINTERPRET(q, poly, p, 64, 2, uint, u, 64, 2, vreint_expected_q_p64_u64); TEST_VREINTERPRET_TO_POLY(q, poly, p, 64, 2, uint, u, 64, 2, vreint_expected_q_p64_u64);
TEST_VREINTERPRET(q, poly, p, 64, 2, poly, p, 8, 16, vreint_expected_q_p64_p8); TEST_VREINTERPRET_TO_POLY(q, poly, p, 64, 2, poly, p, 8, 16, vreint_expected_q_p64_p8);
TEST_VREINTERPRET(q, poly, p, 64, 2, poly, p, 16, 8, vreint_expected_q_p64_p16); TEST_VREINTERPRET_TO_POLY(q, poly, p, 64, 2, poly, p, 16, 8, vreint_expected_q_p64_p16);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
TEST_VREINTERPRET(q, poly, p, 64, 2, float, f, 16, 8, vreint_expected_q_p64_f16); TEST_VREINTERPRET_TO_POLY(q, poly, p, 64, 2, float, f, 16, 8, vreint_expected_q_p64_f16);
#endif #endif
TEST_VREINTERPRET(q, poly, p, 64, 2, float, f, 32, 4, vreint_expected_q_p64_f32); TEST_VREINTERPRET_TO_POLY(q, poly, p, 64, 2, float, f, 32, 4, vreint_expected_q_p64_f32);
/* vreinterpret_*_p64 tests. */ /* vreinterpret_*_p64 tests. */
#undef TEST_MSG #undef TEST_MSG
...@@ -184,8 +191,8 @@ int main (void) ...@@ -184,8 +191,8 @@ int main (void)
TEST_VREINTERPRET(, uint, u, 16, 4, poly, p, 64, 1, vreint_expected_u16_p64); TEST_VREINTERPRET(, uint, u, 16, 4, poly, p, 64, 1, vreint_expected_u16_p64);
TEST_VREINTERPRET(, uint, u, 32, 2, poly, p, 64, 1, vreint_expected_u32_p64); TEST_VREINTERPRET(, uint, u, 32, 2, poly, p, 64, 1, vreint_expected_u32_p64);
TEST_VREINTERPRET(, uint, u, 64, 1, poly, p, 64, 1, vreint_expected_u64_p64); TEST_VREINTERPRET(, uint, u, 64, 1, poly, p, 64, 1, vreint_expected_u64_p64);
TEST_VREINTERPRET(, poly, p, 8, 8, poly, p, 64, 1, vreint_expected_p8_p64); TEST_VREINTERPRET_TO_POLY(, poly, p, 8, 8, poly, p, 64, 1, vreint_expected_p8_p64);
TEST_VREINTERPRET(, poly, p, 16, 4, poly, p, 64, 1, vreint_expected_p16_p64); TEST_VREINTERPRET_TO_POLY(, poly, p, 16, 4, poly, p, 64, 1, vreint_expected_p16_p64);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
TEST_VREINTERPRET_FP(, float, f, 16, 4, poly, p, 64, 1, vreint_expected_f16_p64); TEST_VREINTERPRET_FP(, float, f, 16, 4, poly, p, 64, 1, vreint_expected_f16_p64);
#endif #endif
...@@ -198,8 +205,8 @@ int main (void) ...@@ -198,8 +205,8 @@ int main (void)
TEST_VREINTERPRET(q, uint, u, 16, 8, poly, p, 64, 2, vreint_expected_q_u16_p64); TEST_VREINTERPRET(q, uint, u, 16, 8, poly, p, 64, 2, vreint_expected_q_u16_p64);
TEST_VREINTERPRET(q, uint, u, 32, 4, poly, p, 64, 2, vreint_expected_q_u32_p64); TEST_VREINTERPRET(q, uint, u, 32, 4, poly, p, 64, 2, vreint_expected_q_u32_p64);
TEST_VREINTERPRET(q, uint, u, 64, 2, poly, p, 64, 2, vreint_expected_q_u64_p64); TEST_VREINTERPRET(q, uint, u, 64, 2, poly, p, 64, 2, vreint_expected_q_u64_p64);
TEST_VREINTERPRET(q, poly, p, 8, 16, poly, p, 64, 2, vreint_expected_q_p8_p64); TEST_VREINTERPRET_TO_POLY(q, poly, p, 8, 16, poly, p, 64, 2, vreint_expected_q_p8_p64);
TEST_VREINTERPRET(q, poly, p, 16, 8, poly, p, 64, 2, vreint_expected_q_p16_p64); TEST_VREINTERPRET_TO_POLY(q, poly, p, 16, 8, poly, p, 64, 2, vreint_expected_q_p16_p64);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
TEST_VREINTERPRET_FP(q, float, f, 16, 8, poly, p, 64, 2, vreint_expected_q_f16_p64); TEST_VREINTERPRET_FP(q, float, f, 16, 8, poly, p, 64, 2, vreint_expected_q_f16_p64);
#endif #endif
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrev.c
...@@ -132,10 +132,10 @@ void exec_vrev (void) ...@@ -132,10 +132,10 @@ void exec_vrev (void)
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vrev16, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vrev16, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vrev16, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vrev16, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vrev16, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vrev16, "");
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vrev16, ""); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vrev16, "");
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vrev16, ""); CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vrev16, "");
CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_vrev16, ""); CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected_vrev16, "");
#undef TEST_MSG #undef TEST_MSG
#define TEST_MSG "VREV32" #define TEST_MSG "VREV32"
...@@ -156,14 +156,14 @@ void exec_vrev (void) ...@@ -156,14 +156,14 @@ void exec_vrev (void)
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_vrev32, ""); CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_vrev32, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vrev32, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vrev32, "");
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_vrev32, ""); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_vrev32, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vrev32, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vrev32, "");
CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_vrev32, ""); CHECK_POLY(TEST_MSG, poly, 16, 4, PRIx16, expected_vrev32, "");
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vrev32, ""); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vrev32, "");
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_vrev32, ""); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_vrev32, "");
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vrev32, ""); CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vrev32, "");
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_vrev32, ""); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_vrev32, "");
CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_vrev32, ""); CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected_vrev32, "");
CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_vrev32, ""); CHECK_POLY(TEST_MSG, poly, 16, 8, PRIx16, expected_vrev32, "");
#undef TEST_MSG #undef TEST_MSG
#define TEST_MSG "VREV64" #define TEST_MSG "VREV64"
...@@ -190,16 +190,16 @@ void exec_vrev (void) ...@@ -190,16 +190,16 @@ void exec_vrev (void)
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vrev64, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vrev64, "");
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_vrev64, ""); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_vrev64, "");
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_vrev64, ""); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_vrev64, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vrev64, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vrev64, "");
CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_vrev64, ""); CHECK_POLY(TEST_MSG, poly, 16, 4, PRIx16, expected_vrev64, "");
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vrev64, ""); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vrev64, "");
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_vrev64, ""); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_vrev64, "");
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_vrev64, ""); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_vrev64, "");
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vrev64, ""); CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vrev64, "");
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_vrev64, ""); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_vrev64, "");
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_vrev64, ""); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_vrev64, "");
CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_vrev64, ""); CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected_vrev64, "");
CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_vrev64, ""); CHECK_POLY(TEST_MSG, poly, 16, 8, PRIx16, expected_vrev64, "");
#if defined (FP16_SUPPORTED) #if defined (FP16_SUPPORTED)
TEST_VREV (, float, f, 16, 4, 64); TEST_VREV (, float, f, 16, 4, 64);
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsXi_n.inc
...@@ -76,16 +76,16 @@ void FNNAME (INSN_NAME) (void) ...@@ -76,16 +76,16 @@ void FNNAME (INSN_NAME) (void)
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, ""); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, ""); CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected, ""); CHECK_POLY(TEST_MSG, poly, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, ""); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, ""); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, ""); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, ""); CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, ""); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, ""); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected, ""); CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected, "");
CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected, ""); CHECK_POLY(TEST_MSG, poly, 16, 8, PRIx16, expected, "");
#ifdef EXTRA_TESTS #ifdef EXTRA_TESTS
EXTRA_TESTS(); EXTRA_TESTS();
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshuffle.inc
...@@ -148,8 +148,8 @@ void FNNAME (INSN_NAME) (void) ...@@ -148,8 +148,8 @@ void FNNAME (INSN_NAME) (void)
CHECK(test_name, uint, 8, 8, PRIx8, EXPECTED, comment); \ CHECK(test_name, uint, 8, 8, PRIx8, EXPECTED, comment); \
CHECK(test_name, uint, 16, 4, PRIx16, EXPECTED, comment); \ CHECK(test_name, uint, 16, 4, PRIx16, EXPECTED, comment); \
CHECK(test_name, uint, 32, 2, PRIx32, EXPECTED, comment); \ CHECK(test_name, uint, 32, 2, PRIx32, EXPECTED, comment); \
CHECK(test_name, poly, 8, 8, PRIx8, EXPECTED, comment); \ CHECK_POLY(test_name, poly, 8, 8, PRIx8, EXPECTED, comment); \
CHECK(test_name, poly, 16, 4, PRIx16, EXPECTED, comment); \ CHECK_POLY(test_name, poly, 16, 4, PRIx16, EXPECTED, comment); \
CHECK_FP(test_name, float, 32, 2, PRIx32, EXPECTED, comment); \ CHECK_FP(test_name, float, 32, 2, PRIx32, EXPECTED, comment); \
\ \
CHECK(test_name, int, 8, 16, PRIx8, EXPECTED, comment); \ CHECK(test_name, int, 8, 16, PRIx8, EXPECTED, comment); \
...@@ -158,8 +158,8 @@ void FNNAME (INSN_NAME) (void) ...@@ -158,8 +158,8 @@ void FNNAME (INSN_NAME) (void)
CHECK(test_name, uint, 8, 16, PRIx8, EXPECTED, comment); \ CHECK(test_name, uint, 8, 16, PRIx8, EXPECTED, comment); \
CHECK(test_name, uint, 16, 8, PRIx16, EXPECTED, comment); \ CHECK(test_name, uint, 16, 8, PRIx16, EXPECTED, comment); \
CHECK(test_name, uint, 32, 4, PRIx32, EXPECTED, comment); \ CHECK(test_name, uint, 32, 4, PRIx32, EXPECTED, comment); \
CHECK(test_name, poly, 8, 16, PRIx8, EXPECTED, comment); \ CHECK_POLY(test_name, poly, 8, 16, PRIx8, EXPECTED, comment); \
CHECK(test_name, poly, 16, 8, PRIx16, EXPECTED, comment); \ CHECK_POLY(test_name, poly, 16, 8, PRIx16, EXPECTED, comment); \
CHECK_FP(test_name, float, 32, 4, PRIx32, EXPECTED, comment); \ CHECK_FP(test_name, float, 32, 4, PRIx32, EXPECTED, comment); \
} }
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsli_n.c
...@@ -161,8 +161,8 @@ void vsli_extra(void) ...@@ -161,8 +161,8 @@ void vsli_extra(void)
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_shift, COMMENT); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_shift, COMMENT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_shift, COMMENT); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_shift, COMMENT);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_shift, COMMENT); CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_shift, COMMENT);
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_max_shift, COMMENT); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_max_shift, COMMENT);
CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_max_shift, COMMENT); CHECK_POLY(TEST_MSG, poly, 16, 4, PRIx16, expected_max_shift, COMMENT);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_shift, COMMENT); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_shift, COMMENT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_shift, COMMENT); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_shift, COMMENT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_shift, COMMENT); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_shift, COMMENT);
...@@ -171,6 +171,6 @@ void vsli_extra(void) ...@@ -171,6 +171,6 @@ void vsli_extra(void)
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_shift, COMMENT); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_shift, COMMENT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_shift, COMMENT); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_shift, COMMENT);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_shift, COMMENT); CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_shift, COMMENT);
CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_max_shift, COMMENT); CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected_max_shift, COMMENT);
CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_max_shift, COMMENT); CHECK_POLY(TEST_MSG, poly, 16, 8, PRIx16, expected_max_shift, COMMENT);
} }
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsri_n.c
...@@ -163,14 +163,14 @@ void vsri_extra(void) ...@@ -163,14 +163,14 @@ void vsri_extra(void)
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_shift, COMMENT); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_shift, COMMENT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_shift, COMMENT); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_shift, COMMENT);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_shift, COMMENT); CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_shift, COMMENT);
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_max_shift, COMMENT); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_max_shift, COMMENT);
CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_max_shift, COMMENT); CHECK_POLY(TEST_MSG, poly, 16, 4, PRIx16, expected_max_shift, COMMENT);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_shift, COMMENT); CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_shift, COMMENT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_shift, COMMENT); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_shift, COMMENT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_shift, COMMENT); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_shift, COMMENT);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_shift, COMMENT); CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_shift, COMMENT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_shift, COMMENT); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_shift, COMMENT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_shift, COMMENT); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_shift, COMMENT);
CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_max_shift, COMMENT); CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected_max_shift, COMMENT);
CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_max_shift, COMMENT); CHECK_POLY(TEST_MSG, poly, 16, 8, PRIx16, expected_max_shift, COMMENT);
} }
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c
...@@ -460,14 +460,14 @@ void exec_vstX_lane (void) ...@@ -460,14 +460,14 @@ void exec_vstX_lane (void)
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st2_0, CMT); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st2_0, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st2_0, CMT); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st2_0, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st2_0, CMT); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st2_0, CMT);
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_st2_0, CMT); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_st2_0, CMT);
CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_st2_0, CMT); CHECK_POLY(TEST_MSG, poly, 16, 4, PRIx16, expected_st2_0, CMT);
CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st2_0, CMT); CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st2_0, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st2_0, CMT); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st2_0, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st2_0, CMT); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st2_0, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st2_0, CMT); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st2_0, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st2_0, CMT); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st2_0, CMT);
CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_st2_0, CMT); CHECK_POLY(TEST_MSG, poly, 16, 8, PRIx16, expected_st2_0, CMT);
CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st2_0, CMT); CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st2_0, CMT);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected_st2_0, CMT); CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected_st2_0, CMT);
...@@ -483,14 +483,14 @@ void exec_vstX_lane (void) ...@@ -483,14 +483,14 @@ void exec_vstX_lane (void)
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st2_1, CMT); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st2_1, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st2_1, CMT); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st2_1, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st2_1, CMT); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st2_1, CMT);
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_st2_1, CMT); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_st2_1, CMT);
CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_st2_1, CMT); CHECK_POLY(TEST_MSG, poly, 16, 4, PRIx16, expected_st2_1, CMT);
CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st2_1, CMT); CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st2_1, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st2_1, CMT); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st2_1, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st2_1, CMT); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st2_1, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st2_1, CMT); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st2_1, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st2_1, CMT); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st2_1, CMT);
CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_st2_1, CMT); CHECK_POLY(TEST_MSG, poly, 16, 8, PRIx16, expected_st2_1, CMT);
CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st2_1, CMT); CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st2_1, CMT);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected_st2_1, CMT); CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected_st2_1, CMT);
...@@ -512,14 +512,14 @@ void exec_vstX_lane (void) ...@@ -512,14 +512,14 @@ void exec_vstX_lane (void)
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st3_0, CMT); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st3_0, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st3_0, CMT); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st3_0, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st3_0, CMT); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st3_0, CMT);
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_st3_0, CMT); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_st3_0, CMT);
CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_st3_0, CMT); CHECK_POLY(TEST_MSG, poly, 16, 4, PRIx16, expected_st3_0, CMT);
CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st3_0, CMT); CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st3_0, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st3_0, CMT); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st3_0, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st3_0, CMT); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st3_0, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st3_0, CMT); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st3_0, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st3_0, CMT); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st3_0, CMT);
CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_st3_0, CMT); CHECK_POLY(TEST_MSG, poly, 16, 8, PRIx16, expected_st3_0, CMT);
CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st3_0, CMT); CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st3_0, CMT);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected_st3_0, CMT); CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected_st3_0, CMT);
...@@ -536,14 +536,14 @@ void exec_vstX_lane (void) ...@@ -536,14 +536,14 @@ void exec_vstX_lane (void)
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st3_1, CMT); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st3_1, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st3_1, CMT); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st3_1, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st3_1, CMT); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st3_1, CMT);
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_st3_1, CMT); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_st3_1, CMT);
CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_st3_1, CMT); CHECK_POLY(TEST_MSG, poly, 16, 4, PRIx16, expected_st3_1, CMT);
CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st3_1, CMT); CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st3_1, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st3_1, CMT); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st3_1, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st3_1, CMT); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st3_1, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st3_1, CMT); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st3_1, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st3_1, CMT); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st3_1, CMT);
CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_st3_1, CMT); CHECK_POLY(TEST_MSG, poly, 16, 8, PRIx16, expected_st3_1, CMT);
CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st3_1, CMT); CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st3_1, CMT);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected_st3_1, CMT); CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected_st3_1, CMT);
...@@ -560,14 +560,14 @@ void exec_vstX_lane (void) ...@@ -560,14 +560,14 @@ void exec_vstX_lane (void)
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st3_2, CMT); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st3_2, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st3_2, CMT); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st3_2, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st3_2, CMT); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st3_2, CMT);
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_st3_2, CMT); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_st3_2, CMT);
CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_st3_2, CMT); CHECK_POLY(TEST_MSG, poly, 16, 4, PRIx16, expected_st3_2, CMT);
CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st3_2, CMT); CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st3_2, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st3_2, CMT); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st3_2, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st3_2, CMT); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st3_2, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st3_2, CMT); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st3_2, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st3_2, CMT); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st3_2, CMT);
CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_st3_2, CMT); CHECK_POLY(TEST_MSG, poly, 16, 8, PRIx16, expected_st3_2, CMT);
CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st3_2, CMT); CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st3_2, CMT);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected_st3_2, CMT); CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected_st3_2, CMT);
...@@ -589,14 +589,14 @@ void exec_vstX_lane (void) ...@@ -589,14 +589,14 @@ void exec_vstX_lane (void)
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st4_0, CMT); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st4_0, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st4_0, CMT); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st4_0, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st4_0, CMT); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st4_0, CMT);
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_st4_0, CMT); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_st4_0, CMT);
CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_st4_0, CMT); CHECK_POLY(TEST_MSG, poly, 16, 4, PRIx16, expected_st4_0, CMT);
CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st4_0, CMT); CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st4_0, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st4_0, CMT); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st4_0, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st4_0, CMT); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st4_0, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st4_0, CMT); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st4_0, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st4_0, CMT); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st4_0, CMT);
CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_st4_0, CMT); CHECK_POLY(TEST_MSG, poly, 16, 8, PRIx16, expected_st4_0, CMT);
CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st4_0, CMT); CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st4_0, CMT);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected_st4_0, CMT); CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected_st4_0, CMT);
...@@ -613,14 +613,14 @@ void exec_vstX_lane (void) ...@@ -613,14 +613,14 @@ void exec_vstX_lane (void)
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st4_1, CMT); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st4_1, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st4_1, CMT); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st4_1, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st4_1, CMT); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st4_1, CMT);
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_st4_1, CMT); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_st4_1, CMT);
CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_st4_1, CMT); CHECK_POLY(TEST_MSG, poly, 16, 4, PRIx16, expected_st4_1, CMT);
CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st4_1, CMT); CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st4_1, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st4_1, CMT); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st4_1, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st4_1, CMT); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st4_1, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st4_1, CMT); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st4_1, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st4_1, CMT); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st4_1, CMT);
CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_st4_1, CMT); CHECK_POLY(TEST_MSG, poly, 16, 8, PRIx16, expected_st4_1, CMT);
CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st4_1, CMT); CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st4_1, CMT);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected_st4_1, CMT); CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected_st4_1, CMT);
...@@ -637,14 +637,14 @@ void exec_vstX_lane (void) ...@@ -637,14 +637,14 @@ void exec_vstX_lane (void)
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st4_2, CMT); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st4_2, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st4_2, CMT); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st4_2, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st4_2, CMT); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st4_2, CMT);
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_st4_2, CMT); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_st4_2, CMT);
CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_st4_2, CMT); CHECK_POLY(TEST_MSG, poly, 16, 4, PRIx16, expected_st4_2, CMT);
CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st4_2, CMT); CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st4_2, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st4_2, CMT); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st4_2, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st4_2, CMT); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st4_2, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st4_2, CMT); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st4_2, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st4_2, CMT); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st4_2, CMT);
CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_st4_2, CMT); CHECK_POLY(TEST_MSG, poly, 16, 8, PRIx16, expected_st4_2, CMT);
CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st4_2, CMT); CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st4_2, CMT);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected_st4_2, CMT); CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected_st4_2, CMT);
...@@ -661,14 +661,14 @@ void exec_vstX_lane (void) ...@@ -661,14 +661,14 @@ void exec_vstX_lane (void)
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st4_3, CMT); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st4_3, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st4_3, CMT); CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st4_3, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st4_3, CMT); CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st4_3, CMT);
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_st4_3, CMT); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_st4_3, CMT);
CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_st4_3, CMT); CHECK_POLY(TEST_MSG, poly, 16, 4, PRIx16, expected_st4_3, CMT);
CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st4_3, CMT); CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st4_3, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st4_3, CMT); CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st4_3, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st4_3, CMT); CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st4_3, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st4_3, CMT); CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st4_3, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st4_3, CMT); CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st4_3, CMT);
CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_st4_3, CMT); CHECK_POLY(TEST_MSG, poly, 16, 8, PRIx16, expected_st4_3, CMT);
CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st4_3, CMT); CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st4_3, CMT);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected_st4_3, CMT); CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected_st4_3, CMT);
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtbX.c
...@@ -167,7 +167,7 @@ void exec_vtbX (void) ...@@ -167,7 +167,7 @@ void exec_vtbX (void)
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbl1, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbl1, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbl1, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbl1, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbl1, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbl1, "");
/* Check vtbl2. */ /* Check vtbl2. */
clean_results (); clean_results ();
...@@ -177,7 +177,7 @@ void exec_vtbX (void) ...@@ -177,7 +177,7 @@ void exec_vtbX (void)
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbl2, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbl2, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbl2, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbl2, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbl2, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbl2, "");
/* Check vtbl3. */ /* Check vtbl3. */
clean_results (); clean_results ();
...@@ -187,7 +187,7 @@ void exec_vtbX (void) ...@@ -187,7 +187,7 @@ void exec_vtbX (void)
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbl3, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbl3, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbl3, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbl3, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbl3, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbl3, "");
/* Check vtbl4. */ /* Check vtbl4. */
clean_results (); clean_results ();
...@@ -197,7 +197,7 @@ void exec_vtbX (void) ...@@ -197,7 +197,7 @@ void exec_vtbX (void)
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbl4, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbl4, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbl4, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbl4, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbl4, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbl4, "");
/* Now test VTBX. */ /* Now test VTBX. */
...@@ -249,7 +249,7 @@ void exec_vtbX (void) ...@@ -249,7 +249,7 @@ void exec_vtbX (void)
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbx1, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbx1, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbx1, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbx1, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbx1, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbx1, "");
/* Check vtbx2. */ /* Check vtbx2. */
clean_results (); clean_results ();
...@@ -259,7 +259,7 @@ void exec_vtbX (void) ...@@ -259,7 +259,7 @@ void exec_vtbX (void)
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbx2, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbx2, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbx2, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbx2, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbx2, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbx2, "");
/* Check vtbx3. */ /* Check vtbx3. */
clean_results (); clean_results ();
...@@ -269,7 +269,7 @@ void exec_vtbX (void) ...@@ -269,7 +269,7 @@ void exec_vtbX (void)
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbx3, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbx3, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbx3, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbx3, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbx3, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbx3, "");
/* Check vtbx4. */ /* Check vtbx4. */
clean_results (); clean_results ();
...@@ -279,7 +279,7 @@ void exec_vtbX (void) ...@@ -279,7 +279,7 @@ void exec_vtbX (void)
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbx4, ""); CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbx4, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbx4, ""); CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbx4, "");
CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbx4, ""); CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbx4, "");
} }
int main (void) int main (void)
......
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