Commit 54723b46 by H.J. Lu Committed by H.J. Lu

i386.c (initial_ix86_tune_features): Add X86_TUNE_USE_VECTOR_FP_CONVERTS.

2008-10-08  H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/i386.c (initial_ix86_tune_features): Add
	X86_TUNE_USE_VECTOR_FP_CONVERTS.
	* config/i386/i386.h (ix86_tune_indices): Likewise.
	(TARGET_USE_VECTOR_FP_CONVERTS): New.

	* config/i386/i386.md: Check TARGET_USE_VECTOR_FP_CONVERTS
	instead of (TARGET_USE_VECTOR_CONVERTS || TARGET_GENERIC)
	for FP to FP splitters.

From-SVN: r140972
parent ddd5eeb1
2008-10-08 H.J. Lu <hongjiu.lu@intel.com> 2008-10-08 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/i386.c (initial_ix86_tune_features): Add
X86_TUNE_USE_VECTOR_FP_CONVERTS.
* config/i386/i386.h (ix86_tune_indices): Likewise.
(TARGET_USE_VECTOR_FP_CONVERTS): New.
* config/i386/i386.md: Check TARGET_USE_VECTOR_FP_CONVERTS
instead of (TARGET_USE_VECTOR_CONVERTS || TARGET_GENERIC)
for FP to FP splitters.
2008-10-08 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/i386.md: Add missing gen_sse2_cvtdq2p to convert * config/i386/i386.md: Add missing gen_sse2_cvtdq2p to convert
splitter. splitter.
......
...@@ -1434,6 +1434,10 @@ static unsigned int initial_ix86_tune_features[X86_TUNE_LAST] = { ...@@ -1434,6 +1434,10 @@ static unsigned int initial_ix86_tune_features[X86_TUNE_LAST] = {
replacement is long decoded, so this split helps here as well. */ replacement is long decoded, so this split helps here as well. */
m_K6, m_K6,
/* X86_TUNE_USE_VECTOR_FP_CONVERTS: Prefer vector packed SSE conversion
from FP to FP. */
m_AMDFAM10 | m_GENERIC,
/* X86_TUNE_USE_VECTOR_CONVERTS: Prefer vector packed SSE conversion /* X86_TUNE_USE_VECTOR_CONVERTS: Prefer vector packed SSE conversion
from integer to FP. */ from integer to FP. */
m_AMDFAM10, m_AMDFAM10,
......
...@@ -292,6 +292,7 @@ enum ix86_tune_indices { ...@@ -292,6 +292,7 @@ enum ix86_tune_indices {
X86_TUNE_MOVE_M1_VIA_OR, X86_TUNE_MOVE_M1_VIA_OR,
X86_TUNE_NOT_UNPAIRABLE, X86_TUNE_NOT_UNPAIRABLE,
X86_TUNE_NOT_VECTORMODE, X86_TUNE_NOT_VECTORMODE,
X86_TUNE_USE_VECTOR_FP_CONVERTS,
X86_TUNE_USE_VECTOR_CONVERTS, X86_TUNE_USE_VECTOR_CONVERTS,
X86_TUNE_FUSE_CMP_AND_BRANCH, X86_TUNE_FUSE_CMP_AND_BRANCH,
...@@ -375,6 +376,8 @@ extern unsigned char ix86_tune_features[X86_TUNE_LAST]; ...@@ -375,6 +376,8 @@ extern unsigned char ix86_tune_features[X86_TUNE_LAST];
#define TARGET_MOVE_M1_VIA_OR ix86_tune_features[X86_TUNE_MOVE_M1_VIA_OR] #define TARGET_MOVE_M1_VIA_OR ix86_tune_features[X86_TUNE_MOVE_M1_VIA_OR]
#define TARGET_NOT_UNPAIRABLE ix86_tune_features[X86_TUNE_NOT_UNPAIRABLE] #define TARGET_NOT_UNPAIRABLE ix86_tune_features[X86_TUNE_NOT_UNPAIRABLE]
#define TARGET_NOT_VECTORMODE ix86_tune_features[X86_TUNE_NOT_VECTORMODE] #define TARGET_NOT_VECTORMODE ix86_tune_features[X86_TUNE_NOT_VECTORMODE]
#define TARGET_USE_VECTOR_FP_CONVERTS \
ix86_tune_features[X86_TUNE_USE_VECTOR_FP_CONVERTS]
#define TARGET_USE_VECTOR_CONVERTS \ #define TARGET_USE_VECTOR_CONVERTS \
ix86_tune_features[X86_TUNE_USE_VECTOR_CONVERTS] ix86_tune_features[X86_TUNE_USE_VECTOR_CONVERTS]
#define TARGET_FUSE_CMP_AND_BRANCH \ #define TARGET_FUSE_CMP_AND_BRANCH \
......
...@@ -4216,7 +4216,7 @@ ...@@ -4216,7 +4216,7 @@
[(set (match_operand:DF 0 "register_operand" "") [(set (match_operand:DF 0 "register_operand" "")
(float_extend:DF (float_extend:DF
(match_operand:SF 1 "nonimmediate_operand" "")))] (match_operand:SF 1 "nonimmediate_operand" "")))]
"(TARGET_USE_VECTOR_CONVERTS || TARGET_GENERIC) "TARGET_USE_VECTOR_FP_CONVERTS
&& optimize_insn_for_speed_p () && optimize_insn_for_speed_p ()
&& reload_completed && SSE_REG_P (operands[0])" && reload_completed && SSE_REG_P (operands[0])"
[(set (match_dup 2) [(set (match_dup 2)
...@@ -4356,7 +4356,7 @@ ...@@ -4356,7 +4356,7 @@
[(set (match_operand:SF 0 "register_operand" "") [(set (match_operand:SF 0 "register_operand" "")
(float_truncate:SF (float_truncate:SF
(match_operand:DF 1 "nonimmediate_operand" "")))] (match_operand:DF 1 "nonimmediate_operand" "")))]
"(TARGET_USE_VECTOR_CONVERTS || TARGET_GENERIC) "TARGET_USE_VECTOR_FP_CONVERTS
&& optimize_insn_for_speed_p () && optimize_insn_for_speed_p ()
&& reload_completed && SSE_REG_P (operands[0])" && reload_completed && SSE_REG_P (operands[0])"
[(set (match_dup 2) [(set (match_dup 2)
......
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