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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
4b5cc2b3
Commit
4b5cc2b3
authored
Jul 08, 2003
by
Kazu Hirata
Committed by
Kazu Hirata
Jul 08, 2003
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* doc/md.texi: Fix the description of addmodecc.
From-SVN: r69073
parent
56694dd9
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gcc/ChangeLog
View file @
4b5cc2b3
2003-07-08 Kazu Hirata <kazu@cs.umass.edu>
* doc/md.texi: Fix the description of addmodecc.
2003-07-07 Zack Weinberg <zack@codesourcery.com>
* Makefile.in (top_builddir): Set to "..", not ".".
...
...
gcc/doc/md.texi
View file @
4b5cc2b3
...
...
@@ -2923,11 +2923,11 @@ If the machine does not have conditional move instructions, do not
define
these
patterns
.
@
cindex
@
code
{
add
@
var
{
mode
}
cc
}
instruction
pattern
@
item
@
samp
{
mov
@
var
{
mode
}
cc
}
@
item
@
samp
{
add
@
var
{
mode
}
cc
}
Similar
to
@
samp
{
mov
@
var
{
mode
}
cc
}
but
for
conditional
addition
.
Conditionally
move
operand
2
or
(
operands
2
+
operand
3
)
into
operand
0
according
to
the
comparison
in
operand
1.
If
the
comparison
is
true
,
operand
2
is
moved
into
operand
0
,
otherwise
operand
3
is
moved
.
operand
0
,
otherwise
(
operand
2
+
operand
3
)
is
moved
.
@
cindex
@
code
{
s
@
var
{
cond
}}
instruction
pattern
@
item
@
samp
{
s
@
var
{
cond
}}
...
...
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