Commit 4b23af6d by Monk Chiang Committed by Chung-Ju Wu

[NDS32] Refine register dwarf span.

gcc/
	* config/nds32/nds32.c (nds32_dwarf_register_span): Refine register
	dwarf span.

From-SVN: r268739
parent 93c75052
2019-02-10 Monk Chiang <sh.chiang04@gmail.com>
* config/nds32/nds32.c (nds32_dwarf_register_span): Refine register
dwarf span.
2019-02-10 Chung-Ju Wu <jasonwucj@gmail.com> 2019-02-10 Chung-Ju Wu <jasonwucj@gmail.com>
* config/nds32/nds32-md-auxiliary.c (nds32_spilt_doubleword): Support * config/nds32/nds32-md-auxiliary.c (nds32_spilt_doubleword): Support
......
...@@ -3867,11 +3867,9 @@ nds32_dwarf_register_span (rtx reg) ...@@ -3867,11 +3867,9 @@ nds32_dwarf_register_span (rtx reg)
gen_rtvec (4, dwarf_low_re, dwarf_high_re, gen_rtvec (4, dwarf_low_re, dwarf_high_re,
dwarf_high_im, dwarf_low_im)); dwarf_high_im, dwarf_low_im));
} }
else if (mode == SFmode || mode == SImode) else if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
{ {
/* Create new dwarf information with adjusted register number. */ return NULL_RTX;
dwarf_single = gen_rtx_REG (word_mode, regno);
return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, dwarf_single));
} }
else else
{ {
......
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