Commit 4925d0d5 by Wei Guozhi Committed by Wei Guozhi

arm.md (arm_cmpsi_insn): Compute attr "length".

	* config/arm/arm.md (arm_cmpsi_insn): Compute attr "length".
	(arm_cond_branch): Likewise.
	(arm_cond_branch_reversed): Likewise.
	(arm_jump): Likewise.
	(push_multi): Likewise.
	* config/arm/constraints.md (Py): New constraint.

From-SVN: r172017
parent f55dfa2f
2011-04-06 Wei Guozhi <carrot@google.com>
PR target/47855
* config/arm/arm.md (arm_cmpsi_insn): Compute attr "length".
(arm_cond_branch): Likewise.
(arm_cond_branch_reversed): Likewise.
(arm_jump): Likewise.
(push_multi): Likewise.
* config/arm/constraints.md (Py): New constraint.
2011-04-05 Nathan Froyd <froydnj@codesourcery.com> 2011-04-05 Nathan Froyd <froydnj@codesourcery.com>
PR bootstrap/48471 PR bootstrap/48471
......
...@@ -7115,13 +7115,17 @@ ...@@ -7115,13 +7115,17 @@
(define_insn "*arm_cmpsi_insn" (define_insn "*arm_cmpsi_insn"
[(set (reg:CC CC_REGNUM) [(set (reg:CC CC_REGNUM)
(compare:CC (match_operand:SI 0 "s_register_operand" "r,r") (compare:CC (match_operand:SI 0 "s_register_operand" "l,r,r,r")
(match_operand:SI 1 "arm_add_operand" "rI,L")))] (match_operand:SI 1 "arm_add_operand" "Py,r,rI,L")))]
"TARGET_32BIT" "TARGET_32BIT"
"@ "@
cmp%?\\t%0, %1 cmp%?\\t%0, %1
cmp%?\\t%0, %1
cmp%?\\t%0, %1
cmn%?\\t%0, #%n1" cmn%?\\t%0, #%n1"
[(set_attr "conds" "set")] [(set_attr "conds" "set")
(set_attr "arch" "t2,t2,any,any")
(set_attr "length" "2,2,4,4")]
) )
(define_insn "*cmpsi_shiftsi" (define_insn "*cmpsi_shiftsi"
...@@ -7292,7 +7296,14 @@ ...@@ -7292,7 +7296,14 @@
return \"b%d1\\t%l0\"; return \"b%d1\\t%l0\";
" "
[(set_attr "conds" "use") [(set_attr "conds" "use")
(set_attr "type" "branch")] (set_attr "type" "branch")
(set (attr "length")
(if_then_else
(and (ne (symbol_ref "TARGET_THUMB2") (const_int 0))
(and (ge (minus (match_dup 0) (pc)) (const_int -250))
(le (minus (match_dup 0) (pc)) (const_int 256))))
(const_int 2)
(const_int 4)))]
) )
(define_insn "*arm_cond_branch_reversed" (define_insn "*arm_cond_branch_reversed"
...@@ -7311,7 +7322,14 @@ ...@@ -7311,7 +7322,14 @@
return \"b%D1\\t%l0\"; return \"b%D1\\t%l0\";
" "
[(set_attr "conds" "use") [(set_attr "conds" "use")
(set_attr "type" "branch")] (set_attr "type" "branch")
(set (attr "length")
(if_then_else
(and (ne (symbol_ref "TARGET_THUMB2") (const_int 0))
(and (ge (minus (match_dup 0) (pc)) (const_int -250))
(le (minus (match_dup 0) (pc)) (const_int 256))))
(const_int 2)
(const_int 4)))]
) )
...@@ -7763,7 +7781,14 @@ ...@@ -7763,7 +7781,14 @@
return \"b%?\\t%l0\"; return \"b%?\\t%l0\";
} }
" "
[(set_attr "predicable" "yes")] [(set_attr "predicable" "yes")
(set (attr "length")
(if_then_else
(and (ne (symbol_ref "TARGET_THUMB2") (const_int 0))
(and (ge (minus (match_dup 0) (pc)) (const_int -2044))
(le (minus (match_dup 0) (pc)) (const_int 2048))))
(const_int 2)
(const_int 4)))]
) )
(define_insn "*thumb_jump" (define_insn "*thumb_jump"
...@@ -10263,7 +10288,29 @@ ...@@ -10263,7 +10288,29 @@
return \"\"; return \"\";
}" }"
[(set_attr "type" "store4")] [(set_attr "type" "store4")
(set (attr "length")
(if_then_else
(and (ne (symbol_ref "TARGET_THUMB2") (const_int 0))
(ne (symbol_ref "{
/* Check if there are any high register (except lr)
references in the list. KEEP the following iteration
in sync with the template above. */
int i, regno, hi_reg;
int num_saves = XVECLEN (operands[2], 0);
regno = REGNO (operands[1]);
hi_reg = (REGNO_REG_CLASS (regno) == HI_REGS)
&& (regno != LR_REGNUM);
for (i = 1; i < num_saves && !hi_reg; i++)
{
regno = REGNO (XEXP (XVECEXP (operands[2], 0, i), 0));
hi_reg |= (REGNO_REG_CLASS (regno) == HI_REGS)
&& (regno != LR_REGNUM);
}
!hi_reg; }")
(const_int 0)))
(const_int 2)
(const_int 4)))]
) )
(define_insn "stack_tie" (define_insn "stack_tie"
......
...@@ -31,7 +31,7 @@ ...@@ -31,7 +31,7 @@
;; The following multi-letter normal constraints have been used: ;; The following multi-letter normal constraints have been used:
;; in ARM/Thumb-2 state: Da, Db, Dc, Dn, Dl, DL, Dv, Dy, Di, Dz ;; in ARM/Thumb-2 state: Da, Db, Dc, Dn, Dl, DL, Dv, Dy, Di, Dz
;; in Thumb-1 state: Pa, Pb, Pc, Pd ;; in Thumb-1 state: Pa, Pb, Pc, Pd
;; in Thumb-2 state: Ps, Pt, Pu, Pv, Pw, Px ;; in Thumb-2 state: Ps, Pt, Pu, Pv, Pw, Px, Py
;; The following memory constraints have been used: ;; The following memory constraints have been used:
;; in ARM/Thumb-2 state: Q, Ut, Uv, Uy, Un, Um, Us ;; in ARM/Thumb-2 state: Q, Ut, Uv, Uy, Un, Um, Us
...@@ -189,6 +189,11 @@ ...@@ -189,6 +189,11 @@
(and (match_code "const_int") (and (match_code "const_int")
(match_test "TARGET_THUMB2 && ival >= -7 && ival <= -1"))) (match_test "TARGET_THUMB2 && ival >= -7 && ival <= -1")))
(define_constraint "Py"
"@internal In Thumb-2 state a constant in the range 0 to 255"
(and (match_code "const_int")
(match_test "TARGET_THUMB2 && ival >= 0 && ival <= 255")))
(define_constraint "G" (define_constraint "G"
"In ARM/Thumb-2 state a valid FPA immediate constant." "In ARM/Thumb-2 state a valid FPA immediate constant."
(and (match_code "const_double") (and (match_code "const_double")
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment