S/390: Fix mode iterators vmal, vmah, and vmalh.

gcc/ChangeLog:

2015-09-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/vx-builtins.md ("vec_vmal<mode>", "vec_vmah<mode>")
	("vec_vmalh<mode>"): Change mode iterator from VI_HW to VI_HW_QHS.

From-SVN: r227636

gcc/ChangeLog

 2015-09-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 
+	* config/s390/vx-builtins.md ("vec_vmal<mode>", "vec_vmah<mode>")
+	("vec_vmalh<mode>"): Change mode iterator from VI_HW to VI_HW_QHS.
+
+2015-09-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
 	* config/s390/s390.c: Add V1TImode to constant pool modes.
 
 2015-09-10  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

gcc/config/s390/vx-builtins.md

@@ -870,10 +870,10 @@
 ; vec_mladd -> vec_vmal
 ; vmalb, vmalh, vmalf, vmalg
 (define_insn "vec_vmal<mode>"
-  [(set (match_operand:VI_HW 0 "register_operand" "=v")
-	(unspec:VI_HW [(match_operand:VI_HW 1 "register_operand" "v")
-		       (match_operand:VI_HW 2 "register_operand" "v")
-		       (match_operand:VI_HW 3 "register_operand" "v")]
+  [(set (match_operand:VI_HW_QHS 0 "register_operand" "=v")
+	(unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "v")
+			   (match_operand:VI_HW_QHS 2 "register_operand" "v")
+			   (match_operand:VI_HW_QHS 3 "register_operand" "v")]
 			  UNSPEC_VEC_VMAL))]
   "TARGET_VX"
   "vmal<bhfgq><w>\t%v0,%v1,%v2,%v3"
@@ -883,10 +883,10 @@
 
 ; vmahb; vmahh, vmahf, vmahg
 (define_insn "vec_vmah<mode>"
-  [(set (match_operand:VI_HW 0 "register_operand" "=v")
-	(unspec:VI_HW [(match_operand:VI_HW 1 "register_operand" "v")
-		       (match_operand:VI_HW 2 "register_operand" "v")
-		       (match_operand:VI_HW 3 "register_operand" "v")]
+  [(set (match_operand:VI_HW_QHS 0 "register_operand" "=v")
+	(unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "v")
+			   (match_operand:VI_HW_QHS 2 "register_operand" "v")
+			   (match_operand:VI_HW_QHS 3 "register_operand" "v")]
 			  UNSPEC_VEC_VMAH))]
   "TARGET_VX"
   "vmah<bhfgq>\t%v0,%v1,%v2,%v3"
@@ -894,10 +894,10 @@
 
 ; vmalhb; vmalhh, vmalhf, vmalhg
 (define_insn "vec_vmalh<mode>"
-  [(set (match_operand:VI_HW 0 "register_operand" "=v")
-	(unspec:VI_HW [(match_operand:VI_HW 1 "register_operand" "v")
-		       (match_operand:VI_HW 2 "register_operand" "v")
-		       (match_operand:VI_HW 3 "register_operand" "v")]
+  [(set (match_operand:VI_HW_QHS 0 "register_operand" "=v")
+	(unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "v")
+			   (match_operand:VI_HW_QHS 2 "register_operand" "v")
+			   (match_operand:VI_HW_QHS 3 "register_operand" "v")]
 			  UNSPEC_VEC_VMALH))]
   "TARGET_VX"
   "vmalh<bhfgq>\t%v0,%v1,%v2,%v3"