Commit 46c9550f by Bernd Schmidt Committed by Bernd Schmidt

machmode.h (HWI_COMPUTABLE_MODE_P): New macro.

	* machmode.h (HWI_COMPUTABLE_MODE_P): New macro.
	* combine.c (set_nonzero_bits_and_sign_copies): Use it.
	(find_split-point, combine_simplify_rtx, simplify_if_then_else,
	simplify_set, simplify_logical, expand_compound_operation,
	make_extraction, force_to_mode, if_then_else_cond, extended_count,
	try_widen_shift_mode, simplify_shift_const_1, simplify_comparison,
	record_value_for_reg): Likewise.
	* expmed.c (expand_widening_mult, expand_mult_highpart): Likewise.
	* simplify-rtx. c (simplify_unary_operation_1,
	simplify_binary_operation_1, simplify_const_relational_operation):
	Likewise.

From-SVN: r175945
parent 6a4bdc79
...@@ -12,6 +12,18 @@ ...@@ -12,6 +12,18 @@
(push_reload): Use precision to check for paradoxical subregs. (push_reload): Use precision to check for paradoxical subregs.
* expmed.c (extract_bit_field_1): Likewise. * expmed.c (extract_bit_field_1): Likewise.
* machmode.h (HWI_COMPUTABLE_MODE_P): New macro.
* combine.c (set_nonzero_bits_and_sign_copies): Use it.
(find_split-point, combine_simplify_rtx, simplify_if_then_else,
simplify_set, simplify_logical, expand_compound_operation,
make_extraction, force_to_mode, if_then_else_cond, extended_count,
try_widen_shift_mode, simplify_shift_const_1, simplify_comparison,
record_value_for_reg): Likewise.
* expmed.c (expand_widening_mult, expand_mult_highpart): Likewise.
* simplify-rtx. c (simplify_unary_operation_1,
simplify_binary_operation_1, simplify_const_relational_operation):
Likewise.
2011-07-06 Michael Meissner <meissner@linux.vnet.ibm.com> 2011-07-06 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-protos.h (rs6000_call_indirect_aix): New * config/rs6000/rs6000-protos.h (rs6000_call_indirect_aix): New
......
...@@ -3112,7 +3112,7 @@ expand_widening_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target, ...@@ -3112,7 +3112,7 @@ expand_widening_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target,
this_optab == umul_widen_optab)) this_optab == umul_widen_optab))
&& CONST_INT_P (cop1) && CONST_INT_P (cop1)
&& (INTVAL (cop1) >= 0 && (INTVAL (cop1) >= 0
|| GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)) || HWI_COMPUTABLE_MODE_P (mode)))
{ {
HOST_WIDE_INT coeff = INTVAL (cop1); HOST_WIDE_INT coeff = INTVAL (cop1);
int max_cost; int max_cost;
...@@ -3459,7 +3459,7 @@ expand_mult_highpart (enum machine_mode mode, rtx op0, rtx op1, ...@@ -3459,7 +3459,7 @@ expand_mult_highpart (enum machine_mode mode, rtx op0, rtx op1,
gcc_assert (!SCALAR_FLOAT_MODE_P (mode)); gcc_assert (!SCALAR_FLOAT_MODE_P (mode));
/* We can't support modes wider than HOST_BITS_PER_INT. */ /* We can't support modes wider than HOST_BITS_PER_INT. */
gcc_assert (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT); gcc_assert (HWI_COMPUTABLE_MODE_P (mode));
cnst1 = INTVAL (op1) & GET_MODE_MASK (mode); cnst1 = INTVAL (op1) & GET_MODE_MASK (mode);
......
...@@ -279,4 +279,8 @@ extern void init_adjust_machine_modes (void); ...@@ -279,4 +279,8 @@ extern void init_adjust_machine_modes (void);
TRULY_NOOP_TRUNCATION (GET_MODE_PRECISION (MODE1), \ TRULY_NOOP_TRUNCATION (GET_MODE_PRECISION (MODE1), \
GET_MODE_PRECISION (MODE2)) GET_MODE_PRECISION (MODE2))
#define HWI_COMPUTABLE_MODE_P(MODE) \
(SCALAR_INT_MODE_P (MODE) \
&& GET_MODE_PRECISION (MODE) <= HOST_BITS_PER_WIDE_INT)
#endif /* not HAVE_MACHINE_MODES */ #endif /* not HAVE_MACHINE_MODES */
...@@ -865,7 +865,7 @@ simplify_unary_operation_1 (enum rtx_code code, enum machine_mode mode, rtx op) ...@@ -865,7 +865,7 @@ simplify_unary_operation_1 (enum rtx_code code, enum machine_mode mode, rtx op)
STORE_FLAG_VALUE permits. This is like the previous test, STORE_FLAG_VALUE permits. This is like the previous test,
but it works even if the comparison is done in a mode larger but it works even if the comparison is done in a mode larger
than HOST_BITS_PER_WIDE_INT. */ than HOST_BITS_PER_WIDE_INT. */
if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT if (HWI_COMPUTABLE_MODE_P (mode)
&& COMPARISON_P (op) && COMPARISON_P (op)
&& (STORE_FLAG_VALUE & ~GET_MODE_MASK (mode)) == 0) && (STORE_FLAG_VALUE & ~GET_MODE_MASK (mode)) == 0)
return rtl_hooks.gen_lowpart_no_emit (mode, op); return rtl_hooks.gen_lowpart_no_emit (mode, op);
...@@ -2446,7 +2446,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, ...@@ -2446,7 +2446,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
/* (ior A C) is C if all bits of A that might be nonzero are on in C. */ /* (ior A C) is C if all bits of A that might be nonzero are on in C. */
if (CONST_INT_P (op1) if (CONST_INT_P (op1)
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (mode)
&& (nonzero_bits (op0, mode) & ~UINTVAL (op1)) == 0) && (nonzero_bits (op0, mode) & ~UINTVAL (op1)) == 0)
return op1; return op1;
...@@ -2531,7 +2531,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, ...@@ -2531,7 +2531,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
/* If we have (ior (and (X C1) C2)), simplify this by making /* If we have (ior (and (X C1) C2)), simplify this by making
C1 as small as possible if C1 actually changes. */ C1 as small as possible if C1 actually changes. */
if (CONST_INT_P (op1) if (CONST_INT_P (op1)
&& (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT && (HWI_COMPUTABLE_MODE_P (mode)
|| INTVAL (op1) > 0) || INTVAL (op1) > 0)
&& GET_CODE (op0) == AND && GET_CODE (op0) == AND
&& CONST_INT_P (XEXP (op0, 1)) && CONST_INT_P (XEXP (op0, 1))
...@@ -2602,7 +2602,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, ...@@ -2602,7 +2602,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
convert them into an IOR. This helps to detect rotation encoded convert them into an IOR. This helps to detect rotation encoded
using those methods and possibly other simplifications. */ using those methods and possibly other simplifications. */
if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT if (HWI_COMPUTABLE_MODE_P (mode)
&& (nonzero_bits (op0, mode) && (nonzero_bits (op0, mode)
& nonzero_bits (op1, mode)) == 0) & nonzero_bits (op1, mode)) == 0)
return (simplify_gen_binary (IOR, mode, op0, op1)); return (simplify_gen_binary (IOR, mode, op0, op1));
...@@ -2721,7 +2721,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, ...@@ -2721,7 +2721,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
case AND: case AND:
if (trueop1 == CONST0_RTX (mode) && ! side_effects_p (op0)) if (trueop1 == CONST0_RTX (mode) && ! side_effects_p (op0))
return trueop1; return trueop1;
if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) if (HWI_COMPUTABLE_MODE_P (mode))
{ {
HOST_WIDE_INT nzop0 = nonzero_bits (trueop0, mode); HOST_WIDE_INT nzop0 = nonzero_bits (trueop0, mode);
HOST_WIDE_INT nzop1; HOST_WIDE_INT nzop1;
...@@ -2754,7 +2754,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, ...@@ -2754,7 +2754,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
if ((GET_CODE (op0) == SIGN_EXTEND if ((GET_CODE (op0) == SIGN_EXTEND
|| GET_CODE (op0) == ZERO_EXTEND) || GET_CODE (op0) == ZERO_EXTEND)
&& CONST_INT_P (trueop1) && CONST_INT_P (trueop1)
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (mode)
&& (~GET_MODE_MASK (GET_MODE (XEXP (op0, 0))) && (~GET_MODE_MASK (GET_MODE (XEXP (op0, 0)))
& UINTVAL (trueop1)) == 0) & UINTVAL (trueop1)) == 0)
{ {
...@@ -2836,7 +2836,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, ...@@ -2836,7 +2836,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
Also, if (N & M) == 0, then Also, if (N & M) == 0, then
(A +- N) & M -> A & M. */ (A +- N) & M -> A & M. */
if (CONST_INT_P (trueop1) if (CONST_INT_P (trueop1)
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (mode)
&& ~UINTVAL (trueop1) && ~UINTVAL (trueop1)
&& (UINTVAL (trueop1) & (UINTVAL (trueop1) + 1)) == 0 && (UINTVAL (trueop1) & (UINTVAL (trueop1) + 1)) == 0
&& (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS)) && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS))
...@@ -4681,8 +4681,7 @@ simplify_const_relational_operation (enum rtx_code code, ...@@ -4681,8 +4681,7 @@ simplify_const_relational_operation (enum rtx_code code,
} }
/* Optimize comparisons with upper and lower bounds. */ /* Optimize comparisons with upper and lower bounds. */
if (SCALAR_INT_MODE_P (mode) if (HWI_COMPUTABLE_MODE_P (mode)
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
&& CONST_INT_P (trueop1)) && CONST_INT_P (trueop1))
{ {
int sign; int sign;
......
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