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riscv-gcc-1
Commit 46c9550f by Bernd Schmidt Committed by Bernd Schmidt
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machmode.h (HWI_COMPUTABLE_MODE_P): New macro. 

	* machmode.h (HWI_COMPUTABLE_MODE_P): New macro.
	* combine.c (set_nonzero_bits_and_sign_copies): Use it.
	(find_split-point, combine_simplify_rtx, simplify_if_then_else,
	simplify_set, simplify_logical, expand_compound_operation,
	make_extraction, force_to_mode, if_then_else_cond, extended_count,
	try_widen_shift_mode, simplify_shift_const_1, simplify_comparison,
	record_value_for_reg): Likewise.
	* expmed.c (expand_widening_mult, expand_mult_highpart): Likewise.
	* simplify-rtx. c (simplify_unary_operation_1,
	simplify_binary_operation_1, simplify_const_relational_operation):
	Likewise.

From-SVN: r175945
parent 6a4bdc79
Showing with 64 additions and 56 deletions
gcc/ChangeLog
...@@ -12,6 +12,18 @@ ...@@ -12,6 +12,18 @@
(push_reload): Use precision to check for paradoxical subregs. (push_reload): Use precision to check for paradoxical subregs.
* expmed.c (extract_bit_field_1): Likewise. * expmed.c (extract_bit_field_1): Likewise.
* machmode.h (HWI_COMPUTABLE_MODE_P): New macro.
* combine.c (set_nonzero_bits_and_sign_copies): Use it.
(find_split-point, combine_simplify_rtx, simplify_if_then_else,
simplify_set, simplify_logical, expand_compound_operation,
make_extraction, force_to_mode, if_then_else_cond, extended_count,
try_widen_shift_mode, simplify_shift_const_1, simplify_comparison,
record_value_for_reg): Likewise.
* expmed.c (expand_widening_mult, expand_mult_highpart): Likewise.
* simplify-rtx. c (simplify_unary_operation_1,
simplify_binary_operation_1, simplify_const_relational_operation):
Likewise.
2011-07-06 Michael Meissner <meissner@linux.vnet.ibm.com> 2011-07-06 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-protos.h (rs6000_call_indirect_aix): New * config/rs6000/rs6000-protos.h (rs6000_call_indirect_aix): New
......
gcc/combine.c
...@@ -1560,7 +1560,7 @@ set_nonzero_bits_and_sign_copies (rtx x, const_rtx set, void *data) ...@@ -1560,7 +1560,7 @@ set_nonzero_bits_and_sign_copies (rtx x, const_rtx set, void *data)
say what its contents were. */ say what its contents were. */
&& ! REGNO_REG_SET_P && ! REGNO_REG_SET_P
(DF_LR_IN (ENTRY_BLOCK_PTR->next_bb), REGNO (x)) (DF_LR_IN (ENTRY_BLOCK_PTR->next_bb), REGNO (x))
&& GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT) && HWI_COMPUTABLE_MODE_P (GET_MODE (x)))
{ {
reg_stat_type *rsp = VEC_index (reg_stat_type, reg_stat, REGNO (x)); reg_stat_type *rsp = VEC_index (reg_stat_type, reg_stat, REGNO (x));
...@@ -4679,8 +4679,7 @@ find_split_point (rtx *loc, rtx insn, bool set_src) ...@@ -4679,8 +4679,7 @@ find_split_point (rtx *loc, rtx insn, bool set_src)
/* See if this is a bitfield assignment with everything constant. If /* See if this is a bitfield assignment with everything constant. If
so, this is an IOR of an AND, so split it into that. */ so, this is an IOR of an AND, so split it into that. */
if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT
&& (GET_MODE_BITSIZE (GET_MODE (XEXP (SET_DEST (x), 0))) && HWI_COMPUTABLE_MODE_P (GET_MODE (XEXP (SET_DEST (x), 0)))
<= HOST_BITS_PER_WIDE_INT)
&& CONST_INT_P (XEXP (SET_DEST (x), 1)) && CONST_INT_P (XEXP (SET_DEST (x), 1))
&& CONST_INT_P (XEXP (SET_DEST (x), 2)) && CONST_INT_P (XEXP (SET_DEST (x), 2))
&& CONST_INT_P (SET_SRC (x)) && CONST_INT_P (SET_SRC (x))
...@@ -5584,7 +5583,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest, ...@@ -5584,7 +5583,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest,
if (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) if (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
break; break;
if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) if (HWI_COMPUTABLE_MODE_P (mode))
SUBST (XEXP (x, 0), SUBST (XEXP (x, 0),
force_to_mode (XEXP (x, 0), GET_MODE (XEXP (x, 0)), force_to_mode (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
GET_MODE_MASK (mode), 0)); GET_MODE_MASK (mode), 0));
...@@ -5596,7 +5595,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest, ...@@ -5596,7 +5595,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest,
/* Similarly to what we do in simplify-rtx.c, a truncate of a register /* Similarly to what we do in simplify-rtx.c, a truncate of a register
whose value is a comparison can be replaced with a subreg if whose value is a comparison can be replaced with a subreg if
STORE_FLAG_VALUE permits. */ STORE_FLAG_VALUE permits. */
if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT if (HWI_COMPUTABLE_MODE_P (mode)
&& (STORE_FLAG_VALUE & ~GET_MODE_MASK (mode)) == 0 && (STORE_FLAG_VALUE & ~GET_MODE_MASK (mode)) == 0
&& (temp = get_last_value (XEXP (x, 0))) && (temp = get_last_value (XEXP (x, 0)))
&& COMPARISON_P (temp)) && COMPARISON_P (temp))
...@@ -5634,7 +5633,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest, ...@@ -5634,7 +5633,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest,
&& INTVAL (XEXP (x, 1)) == -INTVAL (XEXP (XEXP (x, 0), 1)) && INTVAL (XEXP (x, 1)) == -INTVAL (XEXP (XEXP (x, 0), 1))
&& ((i = exact_log2 (UINTVAL (XEXP (XEXP (x, 0), 1)))) >= 0 && ((i = exact_log2 (UINTVAL (XEXP (XEXP (x, 0), 1)))) >= 0
|| (i = exact_log2 (UINTVAL (XEXP (x, 1)))) >= 0) || (i = exact_log2 (UINTVAL (XEXP (x, 1)))) >= 0)
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (mode)
&& ((GET_CODE (XEXP (XEXP (x, 0), 0)) == AND && ((GET_CODE (XEXP (XEXP (x, 0), 0)) == AND
&& CONST_INT_P (XEXP (XEXP (XEXP (x, 0), 0), 1)) && CONST_INT_P (XEXP (XEXP (XEXP (x, 0), 0), 1))
&& (UINTVAL (XEXP (XEXP (XEXP (x, 0), 0), 1)) && (UINTVAL (XEXP (XEXP (XEXP (x, 0), 0), 1))
...@@ -5669,7 +5668,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest, ...@@ -5669,7 +5668,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest,
for example in cases like ((a & 1) + (a & 2)), which can for example in cases like ((a & 1) + (a & 2)), which can
become a & 3. */ become a & 3. */
if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT if (HWI_COMPUTABLE_MODE_P (mode)
&& (nonzero_bits (XEXP (x, 0), mode) && (nonzero_bits (XEXP (x, 0), mode)
& nonzero_bits (XEXP (x, 1), mode)) == 0) & nonzero_bits (XEXP (x, 1), mode)) == 0)
{ {
...@@ -5880,7 +5879,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest, ...@@ -5880,7 +5879,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest,
AND with STORE_FLAG_VALUE when we are done, since we are only AND with STORE_FLAG_VALUE when we are done, since we are only
going to test the sign bit. */ going to test the sign bit. */
if (new_code == NE && GET_MODE_CLASS (mode) == MODE_INT if (new_code == NE && GET_MODE_CLASS (mode) == MODE_INT
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (mode)
&& val_signbit_p (mode, STORE_FLAG_VALUE) && val_signbit_p (mode, STORE_FLAG_VALUE)
&& op1 == const0_rtx && op1 == const0_rtx
&& mode == GET_MODE (op0) && mode == GET_MODE (op0)
...@@ -6214,7 +6213,7 @@ simplify_if_then_else (rtx x) ...@@ -6214,7 +6213,7 @@ simplify_if_then_else (rtx x)
|| GET_CODE (XEXP (t, 0)) == LSHIFTRT || GET_CODE (XEXP (t, 0)) == LSHIFTRT
|| GET_CODE (XEXP (t, 0)) == ASHIFTRT) || GET_CODE (XEXP (t, 0)) == ASHIFTRT)
&& GET_CODE (XEXP (XEXP (t, 0), 0)) == SUBREG && GET_CODE (XEXP (XEXP (t, 0), 0)) == SUBREG
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (mode)
&& subreg_lowpart_p (XEXP (XEXP (t, 0), 0)) && subreg_lowpart_p (XEXP (XEXP (t, 0), 0))
&& rtx_equal_p (SUBREG_REG (XEXP (XEXP (t, 0), 0)), f) && rtx_equal_p (SUBREG_REG (XEXP (XEXP (t, 0), 0)), f)
&& ((nonzero_bits (f, GET_MODE (f)) && ((nonzero_bits (f, GET_MODE (f))
...@@ -6230,7 +6229,7 @@ simplify_if_then_else (rtx x) ...@@ -6230,7 +6229,7 @@ simplify_if_then_else (rtx x)
|| GET_CODE (XEXP (t, 0)) == IOR || GET_CODE (XEXP (t, 0)) == IOR
|| GET_CODE (XEXP (t, 0)) == XOR) || GET_CODE (XEXP (t, 0)) == XOR)
&& GET_CODE (XEXP (XEXP (t, 0), 1)) == SUBREG && GET_CODE (XEXP (XEXP (t, 0), 1)) == SUBREG
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (mode)
&& subreg_lowpart_p (XEXP (XEXP (t, 0), 1)) && subreg_lowpart_p (XEXP (XEXP (t, 0), 1))
&& rtx_equal_p (SUBREG_REG (XEXP (XEXP (t, 0), 1)), f) && rtx_equal_p (SUBREG_REG (XEXP (XEXP (t, 0), 1)), f)
&& ((nonzero_bits (f, GET_MODE (f)) && ((nonzero_bits (f, GET_MODE (f))
...@@ -6308,8 +6307,7 @@ simplify_set (rtx x) ...@@ -6308,8 +6307,7 @@ simplify_set (rtx x)
simplify the expression for the object knowing that we only need the simplify the expression for the object knowing that we only need the
low-order bits. */ low-order bits. */
if (GET_MODE_CLASS (mode) == MODE_INT if (GET_MODE_CLASS (mode) == MODE_INT && HWI_COMPUTABLE_MODE_P (mode))
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
{ {
src = force_to_mode (src, mode, ~(unsigned HOST_WIDE_INT) 0, 0); src = force_to_mode (src, mode, ~(unsigned HOST_WIDE_INT) 0, 0);
SUBST (SET_SRC (x), src); SUBST (SET_SRC (x), src);
...@@ -6444,7 +6442,7 @@ simplify_set (rtx x) ...@@ -6444,7 +6442,7 @@ simplify_set (rtx x)
if (((old_code == NE && new_code == EQ) if (((old_code == NE && new_code == EQ)
|| (old_code == EQ && new_code == NE)) || (old_code == EQ && new_code == NE))
&& ! other_changed_previously && op1 == const0_rtx && ! other_changed_previously && op1 == const0_rtx
&& GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (GET_MODE (op0))
&& exact_log2 (mask = nonzero_bits (op0, GET_MODE (op0))) >= 0) && exact_log2 (mask = nonzero_bits (op0, GET_MODE (op0))) >= 0)
{ {
rtx pat = PATTERN (other_insn), note = 0; rtx pat = PATTERN (other_insn), note = 0;
...@@ -6657,7 +6655,7 @@ simplify_logical (rtx x) ...@@ -6657,7 +6655,7 @@ simplify_logical (rtx x)
any (sign) bits when converting INTVAL (op1) to any (sign) bits when converting INTVAL (op1) to
"unsigned HOST_WIDE_INT". */ "unsigned HOST_WIDE_INT". */
if (CONST_INT_P (op1) if (CONST_INT_P (op1)
&& (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT && (HWI_COMPUTABLE_MODE_P (mode)
|| INTVAL (op1) > 0)) || INTVAL (op1) > 0))
{ {
x = simplify_and_const_int (x, mode, op0, INTVAL (op1)); x = simplify_and_const_int (x, mode, op0, INTVAL (op1));
...@@ -6815,7 +6813,7 @@ expand_compound_operation (rtx x) ...@@ -6815,7 +6813,7 @@ expand_compound_operation (rtx x)
bit is not set, as this is easier to optimize. It will be converted bit is not set, as this is easier to optimize. It will be converted
back to cheaper alternative in make_extraction. */ back to cheaper alternative in make_extraction. */
if (GET_CODE (x) == SIGN_EXTEND if (GET_CODE (x) == SIGN_EXTEND
&& (GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT && (HWI_COMPUTABLE_MODE_P (GET_MODE (x))
&& ((nonzero_bits (XEXP (x, 0), GET_MODE (XEXP (x, 0))) && ((nonzero_bits (XEXP (x, 0), GET_MODE (XEXP (x, 0)))
& ~(((unsigned HOST_WIDE_INT) & ~(((unsigned HOST_WIDE_INT)
GET_MODE_MASK (GET_MODE (XEXP (x, 0)))) GET_MODE_MASK (GET_MODE (XEXP (x, 0))))
...@@ -6844,7 +6842,7 @@ expand_compound_operation (rtx x) ...@@ -6844,7 +6842,7 @@ expand_compound_operation (rtx x)
set. */ set. */
if (GET_CODE (XEXP (x, 0)) == TRUNCATE if (GET_CODE (XEXP (x, 0)) == TRUNCATE
&& GET_MODE (XEXP (XEXP (x, 0), 0)) == GET_MODE (x) && GET_MODE (XEXP (XEXP (x, 0), 0)) == GET_MODE (x)
&& GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (GET_MODE (x))
&& (nonzero_bits (XEXP (XEXP (x, 0), 0), GET_MODE (x)) && (nonzero_bits (XEXP (XEXP (x, 0), 0), GET_MODE (x))
& ~GET_MODE_MASK (GET_MODE (XEXP (x, 0)))) == 0) & ~GET_MODE_MASK (GET_MODE (XEXP (x, 0)))) == 0)
return XEXP (XEXP (x, 0), 0); return XEXP (XEXP (x, 0), 0);
...@@ -6853,7 +6851,7 @@ expand_compound_operation (rtx x) ...@@ -6853,7 +6851,7 @@ expand_compound_operation (rtx x)
if (GET_CODE (XEXP (x, 0)) == SUBREG if (GET_CODE (XEXP (x, 0)) == SUBREG
&& GET_MODE (SUBREG_REG (XEXP (x, 0))) == GET_MODE (x) && GET_MODE (SUBREG_REG (XEXP (x, 0))) == GET_MODE (x)
&& subreg_lowpart_p (XEXP (x, 0)) && subreg_lowpart_p (XEXP (x, 0))
&& GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (GET_MODE (x))
&& (nonzero_bits (SUBREG_REG (XEXP (x, 0)), GET_MODE (x)) && (nonzero_bits (SUBREG_REG (XEXP (x, 0)), GET_MODE (x))
& ~GET_MODE_MASK (GET_MODE (XEXP (x, 0)))) == 0) & ~GET_MODE_MASK (GET_MODE (XEXP (x, 0)))) == 0)
return SUBREG_REG (XEXP (x, 0)); return SUBREG_REG (XEXP (x, 0));
...@@ -7242,11 +7240,9 @@ make_extraction (enum machine_mode mode, rtx inner, HOST_WIDE_INT pos, ...@@ -7242,11 +7240,9 @@ make_extraction (enum machine_mode mode, rtx inner, HOST_WIDE_INT pos,
bit is not set, convert the extraction to the cheaper of bit is not set, convert the extraction to the cheaper of
sign and zero extension, that are equivalent in these cases. */ sign and zero extension, that are equivalent in these cases. */
if (flag_expensive_optimizations if (flag_expensive_optimizations
&& (GET_MODE_BITSIZE (tmode) <= HOST_BITS_PER_WIDE_INT && (HWI_COMPUTABLE_MODE_P (tmode)
&& ((nonzero_bits (new_rtx, tmode) && ((nonzero_bits (new_rtx, tmode)
& ~(((unsigned HOST_WIDE_INT) & ~(((unsigned HOST_WIDE_INT)GET_MODE_MASK (tmode)) >> 1))
GET_MODE_MASK (tmode))
>> 1))
== 0))) == 0)))
{ {
rtx temp = gen_rtx_ZERO_EXTEND (mode, new_rtx); rtx temp = gen_rtx_ZERO_EXTEND (mode, new_rtx);
...@@ -7445,7 +7441,7 @@ make_extraction (enum machine_mode mode, rtx inner, HOST_WIDE_INT pos, ...@@ -7445,7 +7441,7 @@ make_extraction (enum machine_mode mode, rtx inner, HOST_WIDE_INT pos,
SIGN_EXTENSION or ZERO_EXTENSION, that are equivalent in these SIGN_EXTENSION or ZERO_EXTENSION, that are equivalent in these
cases. */ cases. */
if (flag_expensive_optimizations if (flag_expensive_optimizations
&& (GET_MODE_BITSIZE (GET_MODE (pos_rtx)) <= HOST_BITS_PER_WIDE_INT && (HWI_COMPUTABLE_MODE_P (GET_MODE (pos_rtx))
&& ((nonzero_bits (pos_rtx, GET_MODE (pos_rtx)) && ((nonzero_bits (pos_rtx, GET_MODE (pos_rtx))
& ~(((unsigned HOST_WIDE_INT) & ~(((unsigned HOST_WIDE_INT)
GET_MODE_MASK (GET_MODE (pos_rtx))) GET_MODE_MASK (GET_MODE (pos_rtx)))
...@@ -8207,7 +8203,7 @@ force_to_mode (rtx x, enum machine_mode mode, unsigned HOST_WIDE_INT mask, ...@@ -8207,7 +8203,7 @@ force_to_mode (rtx x, enum machine_mode mode, unsigned HOST_WIDE_INT mask,
if (GET_CODE (x) == AND && CONST_INT_P (XEXP (x, 1)) if (GET_CODE (x) == AND && CONST_INT_P (XEXP (x, 1))
&& GET_MODE_MASK (GET_MODE (x)) != mask && GET_MODE_MASK (GET_MODE (x)) != mask
&& GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT) && HWI_COMPUTABLE_MODE_P (GET_MODE (x)))
{ {
unsigned HOST_WIDE_INT cval unsigned HOST_WIDE_INT cval
= UINTVAL (XEXP (x, 1)) = UINTVAL (XEXP (x, 1))
...@@ -8365,7 +8361,7 @@ force_to_mode (rtx x, enum machine_mode mode, unsigned HOST_WIDE_INT mask, ...@@ -8365,7 +8361,7 @@ force_to_mode (rtx x, enum machine_mode mode, unsigned HOST_WIDE_INT mask,
if (CONST_INT_P (XEXP (x, 1)) if (CONST_INT_P (XEXP (x, 1))
&& INTVAL (XEXP (x, 1)) >= 0 && INTVAL (XEXP (x, 1)) >= 0
&& INTVAL (XEXP (x, 1)) < GET_MODE_BITSIZE (op_mode) && INTVAL (XEXP (x, 1)) < GET_MODE_BITSIZE (op_mode)
&& GET_MODE_BITSIZE (op_mode) <= HOST_BITS_PER_WIDE_INT) && HWI_COMPUTABLE_MODE_P (op_mode))
mask >>= INTVAL (XEXP (x, 1)); mask >>= INTVAL (XEXP (x, 1));
else else
mask = fuller_mask; mask = fuller_mask;
...@@ -8385,7 +8381,7 @@ force_to_mode (rtx x, enum machine_mode mode, unsigned HOST_WIDE_INT mask, ...@@ -8385,7 +8381,7 @@ force_to_mode (rtx x, enum machine_mode mode, unsigned HOST_WIDE_INT mask,
if (CONST_INT_P (XEXP (x, 1)) if (CONST_INT_P (XEXP (x, 1))
&& INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT
&& GET_MODE_BITSIZE (op_mode) <= HOST_BITS_PER_WIDE_INT) && HWI_COMPUTABLE_MODE_P (op_mode))
{ {
rtx inner = XEXP (x, 0); rtx inner = XEXP (x, 0);
unsigned HOST_WIDE_INT inner_mask; unsigned HOST_WIDE_INT inner_mask;
...@@ -8815,8 +8811,7 @@ if_then_else_cond (rtx x, rtx *ptrue, rtx *pfalse) ...@@ -8815,8 +8811,7 @@ if_then_else_cond (rtx x, rtx *ptrue, rtx *pfalse)
} }
/* Likewise for 0 or a single bit. */ /* Likewise for 0 or a single bit. */
else if (SCALAR_INT_MODE_P (mode) else if (HWI_COMPUTABLE_MODE_P (mode)
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
&& exact_log2 (nz = nonzero_bits (x, mode)) >= 0) && exact_log2 (nz = nonzero_bits (x, mode)) >= 0)
{ {
*ptrue = gen_int_mode (nz, mode), *pfalse = const0_rtx; *ptrue = gen_int_mode (nz, mode), *pfalse = const0_rtx;
...@@ -9655,7 +9650,7 @@ extended_count (const_rtx x, enum machine_mode mode, int unsignedp) ...@@ -9655,7 +9650,7 @@ extended_count (const_rtx x, enum machine_mode mode, int unsignedp)
return 0; return 0;
return (unsignedp return (unsignedp
? (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT ? (HWI_COMPUTABLE_MODE_P (mode)
? (unsigned int) (GET_MODE_BITSIZE (mode) - 1 ? (unsigned int) (GET_MODE_BITSIZE (mode) - 1
- floor_log2 (nonzero_bits (x, mode))) - floor_log2 (nonzero_bits (x, mode)))
: 0) : 0)
...@@ -9823,7 +9818,7 @@ try_widen_shift_mode (enum rtx_code code, rtx op, int count, ...@@ -9823,7 +9818,7 @@ try_widen_shift_mode (enum rtx_code code, rtx op, int count,
case LSHIFTRT: case LSHIFTRT:
/* Similarly here but with zero bits. */ /* Similarly here but with zero bits. */
if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT if (HWI_COMPUTABLE_MODE_P (mode)
&& (nonzero_bits (op, mode) & ~GET_MODE_MASK (orig_mode)) == 0) && (nonzero_bits (op, mode) & ~GET_MODE_MASK (orig_mode)) == 0)
return mode; return mode;
...@@ -9973,10 +9968,10 @@ simplify_shift_const_1 (enum rtx_code code, enum machine_mode result_mode, ...@@ -9973,10 +9968,10 @@ simplify_shift_const_1 (enum rtx_code code, enum machine_mode result_mode,
code = LSHIFTRT; code = LSHIFTRT;
if (((code == LSHIFTRT if (((code == LSHIFTRT
&& GET_MODE_BITSIZE (shift_mode) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (shift_mode)
&& !(nonzero_bits (varop, shift_mode) >> count)) && !(nonzero_bits (varop, shift_mode) >> count))
|| (code == ASHIFT || (code == ASHIFT
&& GET_MODE_BITSIZE (shift_mode) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (shift_mode)
&& !((nonzero_bits (varop, shift_mode) << count) && !((nonzero_bits (varop, shift_mode) << count)
& GET_MODE_MASK (shift_mode)))) & GET_MODE_MASK (shift_mode))))
&& !side_effects_p (varop)) && !side_effects_p (varop))
...@@ -10092,8 +10087,8 @@ simplify_shift_const_1 (enum rtx_code code, enum machine_mode result_mode, ...@@ -10092,8 +10087,8 @@ simplify_shift_const_1 (enum rtx_code code, enum machine_mode result_mode,
if (CONST_INT_P (XEXP (varop, 1)) if (CONST_INT_P (XEXP (varop, 1))
&& INTVAL (XEXP (varop, 1)) >= 0 && INTVAL (XEXP (varop, 1)) >= 0
&& INTVAL (XEXP (varop, 1)) < GET_MODE_BITSIZE (GET_MODE (varop)) && INTVAL (XEXP (varop, 1)) < GET_MODE_BITSIZE (GET_MODE (varop))
&& GET_MODE_BITSIZE (result_mode) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (result_mode)
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (mode)
&& !VECTOR_MODE_P (result_mode)) && !VECTOR_MODE_P (result_mode))
{ {
enum rtx_code first_code = GET_CODE (varop); enum rtx_code first_code = GET_CODE (varop);
...@@ -10334,7 +10329,7 @@ simplify_shift_const_1 (enum rtx_code code, enum machine_mode result_mode, ...@@ -10334,7 +10329,7 @@ simplify_shift_const_1 (enum rtx_code code, enum machine_mode result_mode,
&& XEXP (varop, 1) == const0_rtx && XEXP (varop, 1) == const0_rtx
&& GET_MODE (XEXP (varop, 0)) == result_mode && GET_MODE (XEXP (varop, 0)) == result_mode
&& count == (GET_MODE_BITSIZE (result_mode) - 1) && count == (GET_MODE_BITSIZE (result_mode) - 1)
&& GET_MODE_BITSIZE (result_mode) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (result_mode)
&& STORE_FLAG_VALUE == -1 && STORE_FLAG_VALUE == -1
&& nonzero_bits (XEXP (varop, 0), result_mode) == 1 && nonzero_bits (XEXP (varop, 0), result_mode) == 1
&& merge_outer_ops (&outer_op, &outer_const, XOR, 1, result_mode, && merge_outer_ops (&outer_op, &outer_const, XOR, 1, result_mode,
...@@ -10402,7 +10397,7 @@ simplify_shift_const_1 (enum rtx_code code, enum machine_mode result_mode, ...@@ -10402,7 +10397,7 @@ simplify_shift_const_1 (enum rtx_code code, enum machine_mode result_mode,
} }
else if ((code == ASHIFTRT || code == LSHIFTRT) else if ((code == ASHIFTRT || code == LSHIFTRT)
&& count < HOST_BITS_PER_WIDE_INT && count < HOST_BITS_PER_WIDE_INT
&& GET_MODE_BITSIZE (result_mode) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (result_mode)
&& 0 == (nonzero_bits (XEXP (varop, 0), result_mode) && 0 == (nonzero_bits (XEXP (varop, 0), result_mode)
>> count) >> count)
&& 0 == (nonzero_bits (XEXP (varop, 0), result_mode) && 0 == (nonzero_bits (XEXP (varop, 0), result_mode)
...@@ -11084,7 +11079,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1) ...@@ -11084,7 +11079,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
this shift are known to be zero for both inputs and if the type of this shift are known to be zero for both inputs and if the type of
comparison is compatible with the shift. */ comparison is compatible with the shift. */
if (GET_CODE (op0) == GET_CODE (op1) if (GET_CODE (op0) == GET_CODE (op1)
&& GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (GET_MODE(op0))
&& ((GET_CODE (op0) == ROTATE && (code == NE || code == EQ)) && ((GET_CODE (op0) == ROTATE && (code == NE || code == EQ))
|| ((GET_CODE (op0) == LSHIFTRT || GET_CODE (op0) == ASHIFT) || ((GET_CODE (op0) == LSHIFTRT || GET_CODE (op0) == ASHIFT)
&& (code != GT && code != LT && code != GE && code != LE)) && (code != GT && code != LT && code != GE && code != LE))
...@@ -11233,8 +11228,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1) ...@@ -11233,8 +11228,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
/* If this is a sign bit comparison and we can do arithmetic in /* If this is a sign bit comparison and we can do arithmetic in
MODE, say that we will only be needing the sign bit of OP0. */ MODE, say that we will only be needing the sign bit of OP0. */
if (sign_bit_comparison_p if (sign_bit_comparison_p && HWI_COMPUTABLE_MODE_P (mode))
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
op0 = force_to_mode (op0, mode, op0 = force_to_mode (op0, mode,
(unsigned HOST_WIDE_INT) 1 (unsigned HOST_WIDE_INT) 1
<< (GET_MODE_BITSIZE (mode) - 1), << (GET_MODE_BITSIZE (mode) - 1),
...@@ -11481,7 +11475,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1) ...@@ -11481,7 +11475,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
mode = GET_MODE (XEXP (op0, 0)); mode = GET_MODE (XEXP (op0, 0));
if (mode != VOIDmode && GET_MODE_CLASS (mode) == MODE_INT if (mode != VOIDmode && GET_MODE_CLASS (mode) == MODE_INT
&& (unsigned_comparison_p || equality_comparison_p) && (unsigned_comparison_p || equality_comparison_p)
&& (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) && HWI_COMPUTABLE_MODE_P (mode)
&& ((unsigned HOST_WIDE_INT) const_op < GET_MODE_MASK (mode)) && ((unsigned HOST_WIDE_INT) const_op < GET_MODE_MASK (mode))
&& have_insn_for (COMPARE, mode)) && have_insn_for (COMPARE, mode))
{ {
...@@ -11726,7 +11720,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1) ...@@ -11726,7 +11720,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
&& subreg_lowpart_p (XEXP (op0, 0)))) && subreg_lowpart_p (XEXP (op0, 0))))
&& CONST_INT_P (XEXP (op0, 1)) && CONST_INT_P (XEXP (op0, 1))
&& mode_width <= HOST_BITS_PER_WIDE_INT && mode_width <= HOST_BITS_PER_WIDE_INT
&& GET_MODE_BITSIZE (tmode) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (tmode)
&& ((c1 = INTVAL (XEXP (op0, 1))) & ~mask) == 0 && ((c1 = INTVAL (XEXP (op0, 1))) & ~mask) == 0
&& (c1 & ~GET_MODE_MASK (tmode)) == 0 && (c1 & ~GET_MODE_MASK (tmode)) == 0
&& c1 != mask && c1 != mask
...@@ -11765,7 +11759,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1) ...@@ -11765,7 +11759,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
|| (GET_CODE (shift_op) == XOR || (GET_CODE (shift_op) == XOR
&& CONST_INT_P (XEXP (shift_op, 1)) && CONST_INT_P (XEXP (shift_op, 1))
&& CONST_INT_P (shift_count) && CONST_INT_P (shift_count)
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (mode)
&& (UINTVAL (XEXP (shift_op, 1)) && (UINTVAL (XEXP (shift_op, 1))
== (unsigned HOST_WIDE_INT) 1 == (unsigned HOST_WIDE_INT) 1
<< INTVAL (shift_count)))) << INTVAL (shift_count))))
...@@ -12014,8 +12008,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1) ...@@ -12014,8 +12008,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
&& GET_MODE_SIZE (mode) < UNITS_PER_WORD && GET_MODE_SIZE (mode) < UNITS_PER_WORD
&& ! have_insn_for (COMPARE, mode)) && ! have_insn_for (COMPARE, mode))
for (tmode = GET_MODE_WIDER_MODE (mode); for (tmode = GET_MODE_WIDER_MODE (mode);
(tmode != VOIDmode (tmode != VOIDmode && HWI_COMPUTABLE_MODE_P (tmode));
&& GET_MODE_BITSIZE (tmode) <= HOST_BITS_PER_WIDE_INT);
tmode = GET_MODE_WIDER_MODE (tmode)) tmode = GET_MODE_WIDER_MODE (tmode))
if (have_insn_for (COMPARE, tmode)) if (have_insn_for (COMPARE, tmode))
{ {
...@@ -12026,7 +12019,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1) ...@@ -12026,7 +12019,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
a paradoxical subreg to extend OP0. */ a paradoxical subreg to extend OP0. */
if (op1 == const0_rtx && (code == LT || code == GE) if (op1 == const0_rtx && (code == LT || code == GE)
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) && HWI_COMPUTABLE_MODE_P (mode))
{ {
op0 = simplify_gen_binary (AND, tmode, op0 = simplify_gen_binary (AND, tmode,
gen_lowpart (tmode, op0), gen_lowpart (tmode, op0),
...@@ -12318,7 +12311,7 @@ record_value_for_reg (rtx reg, rtx insn, rtx value) ...@@ -12318,7 +12311,7 @@ record_value_for_reg (rtx reg, rtx insn, rtx value)
subst_low_luid = DF_INSN_LUID (insn); subst_low_luid = DF_INSN_LUID (insn);
rsp->last_set_mode = mode; rsp->last_set_mode = mode;
if (GET_MODE_CLASS (mode) == MODE_INT if (GET_MODE_CLASS (mode) == MODE_INT
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) && HWI_COMPUTABLE_MODE_P (mode))
mode = nonzero_bits_mode; mode = nonzero_bits_mode;
rsp->last_set_nonzero_bits = nonzero_bits (value, mode); rsp->last_set_nonzero_bits = nonzero_bits (value, mode);
rsp->last_set_sign_bit_copies rsp->last_set_sign_bit_copies
......
gcc/expmed.c
...@@ -3112,7 +3112,7 @@ expand_widening_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target, ...@@ -3112,7 +3112,7 @@ expand_widening_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target,
this_optab == umul_widen_optab)) this_optab == umul_widen_optab))
&& CONST_INT_P (cop1) && CONST_INT_P (cop1)
&& (INTVAL (cop1) >= 0 && (INTVAL (cop1) >= 0
|| GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)) || HWI_COMPUTABLE_MODE_P (mode)))
{ {
HOST_WIDE_INT coeff = INTVAL (cop1); HOST_WIDE_INT coeff = INTVAL (cop1);
int max_cost; int max_cost;
...@@ -3459,7 +3459,7 @@ expand_mult_highpart (enum machine_mode mode, rtx op0, rtx op1, ...@@ -3459,7 +3459,7 @@ expand_mult_highpart (enum machine_mode mode, rtx op0, rtx op1,
gcc_assert (!SCALAR_FLOAT_MODE_P (mode)); gcc_assert (!SCALAR_FLOAT_MODE_P (mode));
/* We can't support modes wider than HOST_BITS_PER_INT. */ /* We can't support modes wider than HOST_BITS_PER_INT. */
gcc_assert (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT); gcc_assert (HWI_COMPUTABLE_MODE_P (mode));
cnst1 = INTVAL (op1) & GET_MODE_MASK (mode); cnst1 = INTVAL (op1) & GET_MODE_MASK (mode);
......
gcc/machmode.h
...@@ -279,4 +279,8 @@ extern void init_adjust_machine_modes (void); ...@@ -279,4 +279,8 @@ extern void init_adjust_machine_modes (void);
TRULY_NOOP_TRUNCATION (GET_MODE_PRECISION (MODE1), \ TRULY_NOOP_TRUNCATION (GET_MODE_PRECISION (MODE1), \
GET_MODE_PRECISION (MODE2)) GET_MODE_PRECISION (MODE2))
#define HWI_COMPUTABLE_MODE_P(MODE) \
(SCALAR_INT_MODE_P (MODE) \
&& GET_MODE_PRECISION (MODE) <= HOST_BITS_PER_WIDE_INT)
#endif /* not HAVE_MACHINE_MODES */ #endif /* not HAVE_MACHINE_MODES */
gcc/simplify-rtx.c
...@@ -865,7 +865,7 @@ simplify_unary_operation_1 (enum rtx_code code, enum machine_mode mode, rtx op) ...@@ -865,7 +865,7 @@ simplify_unary_operation_1 (enum rtx_code code, enum machine_mode mode, rtx op)
STORE_FLAG_VALUE permits. This is like the previous test, STORE_FLAG_VALUE permits. This is like the previous test,
but it works even if the comparison is done in a mode larger but it works even if the comparison is done in a mode larger
than HOST_BITS_PER_WIDE_INT. */ than HOST_BITS_PER_WIDE_INT. */
if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT if (HWI_COMPUTABLE_MODE_P (mode)
&& COMPARISON_P (op) && COMPARISON_P (op)
&& (STORE_FLAG_VALUE & ~GET_MODE_MASK (mode)) == 0) && (STORE_FLAG_VALUE & ~GET_MODE_MASK (mode)) == 0)
return rtl_hooks.gen_lowpart_no_emit (mode, op); return rtl_hooks.gen_lowpart_no_emit (mode, op);
...@@ -2446,7 +2446,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, ...@@ -2446,7 +2446,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
/* (ior A C) is C if all bits of A that might be nonzero are on in C. */ /* (ior A C) is C if all bits of A that might be nonzero are on in C. */
if (CONST_INT_P (op1) if (CONST_INT_P (op1)
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (mode)
&& (nonzero_bits (op0, mode) & ~UINTVAL (op1)) == 0) && (nonzero_bits (op0, mode) & ~UINTVAL (op1)) == 0)
return op1; return op1;
...@@ -2531,7 +2531,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, ...@@ -2531,7 +2531,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
/* If we have (ior (and (X C1) C2)), simplify this by making /* If we have (ior (and (X C1) C2)), simplify this by making
C1 as small as possible if C1 actually changes. */ C1 as small as possible if C1 actually changes. */
if (CONST_INT_P (op1) if (CONST_INT_P (op1)
&& (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT && (HWI_COMPUTABLE_MODE_P (mode)
|| INTVAL (op1) > 0) || INTVAL (op1) > 0)
&& GET_CODE (op0) == AND && GET_CODE (op0) == AND
&& CONST_INT_P (XEXP (op0, 1)) && CONST_INT_P (XEXP (op0, 1))
...@@ -2602,7 +2602,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, ...@@ -2602,7 +2602,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
convert them into an IOR. This helps to detect rotation encoded convert them into an IOR. This helps to detect rotation encoded
using those methods and possibly other simplifications. */ using those methods and possibly other simplifications. */
if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT if (HWI_COMPUTABLE_MODE_P (mode)
&& (nonzero_bits (op0, mode) && (nonzero_bits (op0, mode)
& nonzero_bits (op1, mode)) == 0) & nonzero_bits (op1, mode)) == 0)
return (simplify_gen_binary (IOR, mode, op0, op1)); return (simplify_gen_binary (IOR, mode, op0, op1));
...@@ -2721,7 +2721,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, ...@@ -2721,7 +2721,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
case AND: case AND:
if (trueop1 == CONST0_RTX (mode) && ! side_effects_p (op0)) if (trueop1 == CONST0_RTX (mode) && ! side_effects_p (op0))
return trueop1; return trueop1;
if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) if (HWI_COMPUTABLE_MODE_P (mode))
{ {
HOST_WIDE_INT nzop0 = nonzero_bits (trueop0, mode); HOST_WIDE_INT nzop0 = nonzero_bits (trueop0, mode);
HOST_WIDE_INT nzop1; HOST_WIDE_INT nzop1;
...@@ -2754,7 +2754,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, ...@@ -2754,7 +2754,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
if ((GET_CODE (op0) == SIGN_EXTEND if ((GET_CODE (op0) == SIGN_EXTEND
|| GET_CODE (op0) == ZERO_EXTEND) || GET_CODE (op0) == ZERO_EXTEND)
&& CONST_INT_P (trueop1) && CONST_INT_P (trueop1)
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (mode)
&& (~GET_MODE_MASK (GET_MODE (XEXP (op0, 0))) && (~GET_MODE_MASK (GET_MODE (XEXP (op0, 0)))
& UINTVAL (trueop1)) == 0) & UINTVAL (trueop1)) == 0)
{ {
...@@ -2836,7 +2836,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, ...@@ -2836,7 +2836,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
Also, if (N & M) == 0, then Also, if (N & M) == 0, then
(A +- N) & M -> A & M. */ (A +- N) & M -> A & M. */
if (CONST_INT_P (trueop1) if (CONST_INT_P (trueop1)
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (mode)
&& ~UINTVAL (trueop1) && ~UINTVAL (trueop1)
&& (UINTVAL (trueop1) & (UINTVAL (trueop1) + 1)) == 0 && (UINTVAL (trueop1) & (UINTVAL (trueop1) + 1)) == 0
&& (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS)) && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS))
...@@ -4681,8 +4681,7 @@ simplify_const_relational_operation (enum rtx_code code, ...@@ -4681,8 +4681,7 @@ simplify_const_relational_operation (enum rtx_code code,
} }
/* Optimize comparisons with upper and lower bounds. */ /* Optimize comparisons with upper and lower bounds. */
if (SCALAR_INT_MODE_P (mode) if (HWI_COMPUTABLE_MODE_P (mode)
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
&& CONST_INT_P (trueop1)) && CONST_INT_P (trueop1))
{ {
int sign; int sign;
......
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