cond.md (movqicc_<code>_<mode>): Remove mode of conditional.

* config/m32c/cond.md (movqicc_<code>_<mode>): Remove mode of
conditional.
(movhicc_<code>_<mode>): Likewise.
* config/m32c/m32c.c (encode_pattern_1): Specialise PSImode
subregs.
(m32c_eh_return_data_regno): Change to using memregs to avoid
tying up all the compute regs.
(m32c_legitimate_address_p) Subregs are not valid addresses.

From-SVN: r217200

gcc/ChangeLog

+2014-11-06  DJ Delorie  <dj@redhat.com>
+
+	* config/m32c/cond.md (movqicc_<code>_<mode>): Remove mode of
+	conditional.
+	(movhicc_<code>_<mode>): Likewise.
+	* config/m32c/m32c.c (encode_pattern_1): Specialise PSImode
+	subregs.
+	(m32c_eh_return_data_regno): Change to using memregs to avoid
+	tying up all the compute regs.
+	(m32c_legitimate_address_p) Subregs are not valid addresses.
+
 2014-11-06  Bernd Schmidt  <bernds@codesourcery.com>
 
 	* target.def (call_args, end_call_args): New hooks.

gcc/config/m32c/cond.md

@@ -204,7 +204,7 @@
 
 (define_insn_and_split "movqicc_<code>_<mode>"
   [(set (match_operand:QI 0 "register_operand" "=R0w")
-        (if_then_else:QI (eqne_cond:QI (match_operand:QHPSI 1 "mra_operand" "RraSd")
+        (if_then_else:QI (eqne_cond (match_operand:QHPSI 1 "mra_operand" "RraSd")
 				    (match_operand:QHPSI 2 "mrai_operand" "RraSdi"))
 			  (match_operand:QI 3 "const_int_operand" "")
 			  (match_operand:QI 4 "const_int_operand" "")))]
@@ -215,7 +215,7 @@
 	(compare (match_dup 1)
 		 (match_dup 2)))
    (set (match_dup 0)
-        (if_then_else:QI (eqne_cond:QI (reg:CC FLG_REGNO) (const_int 0))
+        (if_then_else:QI (eqne_cond (reg:CC FLG_REGNO) (const_int 0))
 			 (match_dup 3)
 			 (match_dup 4)))]
   ""
@@ -224,10 +224,10 @@
 
 (define_insn_and_split "movhicc_<code>_<mode>"
   [(set (match_operand:HI 0 "register_operand" "=R0w")
-        (if_then_else:HI (eqne_cond:HI (match_operand:QHPSI 1 "mra_operand" "RraSd")
+        (if_then_else:HI (eqne_cond (match_operand:QHPSI 1 "mra_operand" "RraSd")
 				    (match_operand:QHPSI 2 "mrai_operand" "RraSdi"))
-			  (match_operand:QI 3 "const_int_operand" "")
-			  (match_operand:QI 4 "const_int_operand" "")))]
+			  (match_operand:HI 3 "const_int_operand" "")
+			  (match_operand:HI 4 "const_int_operand" "")))]
   "TARGET_A24"
   "#"
   "reload_completed"
@@ -235,7 +235,7 @@
 	(compare (match_dup 1)
 		 (match_dup 2)))
    (set (match_dup 0)
-        (if_then_else:HI (eqne_cond:HI (reg:CC FLG_REGNO) (const_int 0))
+        (if_then_else:HI (eqne_cond (reg:CC FLG_REGNO) (const_int 0))
 			 (match_dup 3)
 			 (match_dup 4)))]
   ""

gcc/config/m32c/m32c.c

@@ -195,6 +195,9 @@ encode_pattern_1 (rtx x)
       if (GET_MODE_SIZE (GET_MODE (x)) !=
 	  GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
 	*patternp++ = 'S';
+      if (GET_MODE (x) == PSImode
+	  && GET_CODE (XEXP (x, 0)) == REG)
+	*patternp++ = 'S';
       encode_pattern_1 (XEXP (x, 0));
       break;
     case MEM:
@@ -1008,12 +1011,9 @@ m32c_eh_return_data_regno (int n)
   switch (n)
     {
     case 0:
-      return A0_REGNO;
+      return MEM0_REGNO;
     case 1:
-      if (TARGET_A16)
-	return R3_REGNO;
-      else
-	return R1_REGNO;
+      return MEM0_REGNO+4;
     default:
       return INVALID_REGNUM;
     }
@@ -1790,6 +1790,8 @@ m32c_legitimate_address_p (machine_mode mode, rtx x, bool strict)
 	  /*    case SB_REGNO: */
 	  return 1;
 	default:
+	  if (GET_CODE (reg) == SUBREG)
+	    return 0;
 	  if (IS_PSEUDO (reg, strict))
 	    return 1;
 	  return 0;