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riscv-gcc-1
Commit 4501d314 by Jan Beulich Committed by Jan Beulich
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i386.c (enum ix86_builtins): Remove IX86_BUILTIN_CMPNEPS and IX86_BUILTIN_CMPNESS. 

2005-12-05  Jan Beulich  <jbeulich@novell.com>

	* config/i386/i386.c (enum ix86_builtins): Remove IX86_BUILTIN_CMPNEPS
	and IX86_BUILTIN_CMPNESS.
	(ix86_init_mmx_sse_builtins): Remove ti_ftype_ti_ti.
	* config/i386/i386.h (ALIGN_MODE_128): Don't check TFmode explicitly.
	* config/i386/i386.md (movti_internal): Correct type attribute.
	Simplify mode attribute.
	(movti_rex64, movsf_1, movdf_nointeger, movdf_integer, movtf_internal):
	Correct type attribute.
	(absxf2): Correct operator.
	* config/i386/mmx.md (mov<mode>_internal_rex64, mov<mode>_internal,
	movv2sf_internal_rex64, movv2sf_internal): Correct type attribute.
	* config/i386/sse.md (mov<mode>_internal, movv2df_internal): Simplify
	mode attribute.
	(sse2_vmsqrtv2df2): Correct mode attribute.

From-SVN: r108048
parent 51094457
Showing with 46 additions and 64 deletions
gcc/ChangeLog
2005-12-05 Jan Beulich <jbeulich@novell.com> 2005-12-05 Jan Beulich <jbeulich@novell.com>
* config/i386/i386.c (enum ix86_builtins): Remove IX86_BUILTIN_CMPNEPS
and IX86_BUILTIN_CMPNESS.
(ix86_init_mmx_sse_builtins): Remove ti_ftype_ti_ti.
* config/i386/i386.h (ALIGN_MODE_128): Don't check TFmode explicitly.
* config/i386/i386.md (movti_internal): Correct type attribute.
Simplify mode attribute.
(movti_rex64, movsf_1, movdf_nointeger, movdf_integer, movtf_internal):
Correct type attribute.
(absxf2): Correct operator.
* config/i386/mmx.md (mov<mode>_internal_rex64, mov<mode>_internal,
movv2sf_internal_rex64, movv2sf_internal): Correct type attribute.
* config/i386/sse.md (mov<mode>_internal, movv2df_internal): Simplify
mode attribute.
(sse2_vmsqrtv2df2): Correct mode attribute.
2005-12-05 Jan Beulich <jbeulich@novell.com>
* config/ia64/ia64.md (rotlsi3_internal): Don't split if rotating by * config/ia64/ia64.md (rotlsi3_internal): Don't split if rotating by
16 bits. Provide insn pattern for this case. 16 bits. Provide insn pattern for this case.
......
gcc/config/i386/i386.c
...@@ -13469,7 +13469,6 @@ enum ix86_builtins ...@@ -13469,7 +13469,6 @@ enum ix86_builtins
IX86_BUILTIN_CMPNGEPS, IX86_BUILTIN_CMPNGEPS,
IX86_BUILTIN_CMPORDPS, IX86_BUILTIN_CMPORDPS,
IX86_BUILTIN_CMPUNORDPS, IX86_BUILTIN_CMPUNORDPS,
IX86_BUILTIN_CMPNEPS,
IX86_BUILTIN_CMPEQSS, IX86_BUILTIN_CMPEQSS,
IX86_BUILTIN_CMPLTSS, IX86_BUILTIN_CMPLTSS,
IX86_BUILTIN_CMPLESS, IX86_BUILTIN_CMPLESS,
...@@ -13480,7 +13479,6 @@ enum ix86_builtins ...@@ -13480,7 +13479,6 @@ enum ix86_builtins
IX86_BUILTIN_CMPNGESS, IX86_BUILTIN_CMPNGESS,
IX86_BUILTIN_CMPORDSS, IX86_BUILTIN_CMPORDSS,
IX86_BUILTIN_CMPUNORDSS, IX86_BUILTIN_CMPUNORDSS,
IX86_BUILTIN_CMPNESS,
IX86_BUILTIN_COMIEQSS, IX86_BUILTIN_COMIEQSS,
IX86_BUILTIN_COMILTSS, IX86_BUILTIN_COMILTSS,
...@@ -14423,9 +14421,6 @@ ix86_init_mmx_sse_builtins (void) ...@@ -14423,9 +14421,6 @@ ix86_init_mmx_sse_builtins (void)
= build_function_type_list (integer_type_node, = build_function_type_list (integer_type_node,
V2DF_type_node, V2DF_type_node, NULL_TREE); V2DF_type_node, V2DF_type_node, NULL_TREE);
tree ti_ftype_ti_ti
= build_function_type_list (intTI_type_node,
intTI_type_node, intTI_type_node, NULL_TREE);
tree void_ftype_pcvoid tree void_ftype_pcvoid
= build_function_type_list (void_type_node, const_ptr_type_node, NULL_TREE); = build_function_type_list (void_type_node, const_ptr_type_node, NULL_TREE);
tree v4sf_ftype_v4si tree v4sf_ftype_v4si
...@@ -14592,9 +14587,6 @@ ix86_init_mmx_sse_builtins (void) ...@@ -14592,9 +14587,6 @@ ix86_init_mmx_sse_builtins (void)
case V2DFmode: case V2DFmode:
type = v2df_ftype_v2df_v2df; type = v2df_ftype_v2df_v2df;
break; break;
case TImode:
type = ti_ftype_ti_ti;
break;
case V4SFmode: case V4SFmode:
type = v4sf_ftype_v4sf_v4sf; type = v4sf_ftype_v4sf_v4sf;
break; break;
......
gcc/config/i386/i386.h
...@@ -576,7 +576,7 @@ extern int x86_prefetch_sse; ...@@ -576,7 +576,7 @@ extern int x86_prefetch_sse;
/* Decide whether a variable of mode MODE should be 128 bit aligned. */ /* Decide whether a variable of mode MODE should be 128 bit aligned. */
#define ALIGN_MODE_128(MODE) \ #define ALIGN_MODE_128(MODE) \
((MODE) == XFmode || (MODE) == TFmode || SSE_REG_MODE_P (MODE)) ((MODE) == XFmode || SSE_REG_MODE_P (MODE))
/* The published ABIs say that doubles should be aligned on word /* The published ABIs say that doubles should be aligned on word
boundaries, so lower the alignment for structure fields unless boundaries, so lower the alignment for structure fields unless
......
gcc/config/i386/i386.md
...@@ -2148,23 +2148,15 @@ ...@@ -2148,23 +2148,15 @@
gcc_unreachable (); gcc_unreachable ();
} }
} }
[(set_attr "type" "ssemov,ssemov,ssemov") [(set_attr "type" "sselog1,ssemov,ssemov")
(set (attr "mode") (set (attr "mode")
(cond [(eq (symbol_ref "TARGET_SSE2") (const_int 0)) (cond [(ior (eq (symbol_ref "TARGET_SSE2") (const_int 0))
(ne (symbol_ref "optimize_size") (const_int 0)))
(const_string "V4SF") (const_string "V4SF")
(and (eq_attr "alternative" "2")
(eq_attr "alternative" "0,1") (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
(if_then_else (const_int 0)))
(ne (symbol_ref "optimize_size") (const_string "V4SF")]
(const_int 0))
(const_string "V4SF")
(const_string "TI"))
(eq_attr "alternative" "2")
(if_then_else
(ne (symbol_ref "optimize_size")
(const_int 0))
(const_string "V4SF")
(const_string "TI"))]
(const_string "TI")))]) (const_string "TI")))])
(define_insn "*movti_rex64" (define_insn "*movti_rex64"
...@@ -2193,7 +2185,7 @@ ...@@ -2193,7 +2185,7 @@
gcc_unreachable (); gcc_unreachable ();
} }
} }
[(set_attr "type" "*,*,ssemov,ssemov,ssemov") [(set_attr "type" "*,*,sselog1,ssemov,ssemov")
(set (attr "mode") (set (attr "mode")
(cond [(eq_attr "alternative" "2,3") (cond [(eq_attr "alternative" "2,3")
(if_then_else (if_then_else
...@@ -2330,7 +2322,7 @@ ...@@ -2330,7 +2322,7 @@
gcc_unreachable (); gcc_unreachable ();
} }
} }
[(set_attr "type" "fmov,fmov,fmov,imov,imov,ssemov,ssemov,ssemov,ssemov,mmxmov,mmxmov,mmxmov") [(set_attr "type" "fmov,fmov,fmov,imov,imov,sselog1,ssemov,ssemov,ssemov,mmxmov,mmxmov,mmxmov")
(set (attr "mode") (set (attr "mode")
(cond [(eq_attr "alternative" "3,4,9,10") (cond [(eq_attr "alternative" "3,4,9,10")
(const_string "SI") (const_string "SI")
...@@ -2512,7 +2504,7 @@ ...@@ -2512,7 +2504,7 @@
gcc_unreachable (); gcc_unreachable ();
} }
} }
[(set_attr "type" "fmov,fmov,fmov,multi,multi,ssemov,ssemov,ssemov,ssemov") [(set_attr "type" "fmov,fmov,fmov,multi,multi,sselog1,ssemov,ssemov,ssemov")
(set (attr "mode") (set (attr "mode")
(cond [(eq_attr "alternative" "0,1,2") (cond [(eq_attr "alternative" "0,1,2")
(const_string "DF") (const_string "DF")
...@@ -2633,7 +2625,7 @@ ...@@ -2633,7 +2625,7 @@
gcc_unreachable(); gcc_unreachable();
} }
} }
[(set_attr "type" "fmov,fmov,fmov,multi,multi,ssemov,ssemov,ssemov,ssemov") [(set_attr "type" "fmov,fmov,fmov,multi,multi,sselog1,ssemov,ssemov,ssemov")
(set (attr "mode") (set (attr "mode")
(cond [(eq_attr "alternative" "0,1,2") (cond [(eq_attr "alternative" "0,1,2")
(const_string "DF") (const_string "DF")
...@@ -2944,7 +2936,7 @@ ...@@ -2944,7 +2936,7 @@
gcc_unreachable (); gcc_unreachable ();
} }
} }
[(set_attr "type" "*,*,ssemov,ssemov,ssemov") [(set_attr "type" "*,*,sselog1,ssemov,ssemov")
(set (attr "mode") (set (attr "mode")
(cond [(eq_attr "alternative" "2,3") (cond [(eq_attr "alternative" "2,3")
(if_then_else (if_then_else
...@@ -9703,7 +9695,7 @@ ...@@ -9703,7 +9695,7 @@
(define_expand "absxf2" (define_expand "absxf2"
[(set (match_operand:XF 0 "nonimmediate_operand" "") [(set (match_operand:XF 0 "nonimmediate_operand" "")
(neg:XF (match_operand:XF 1 "nonimmediate_operand" "")))] (abs:XF (match_operand:XF 1 "nonimmediate_operand" "")))]
"TARGET_80387" "TARGET_80387"
"ix86_expand_fp_absneg_operator (ABS, XFmode, operands); DONE;") "ix86_expand_fp_absneg_operator (ABS, XFmode, operands); DONE;")
......
gcc/config/i386/mmx.md
...@@ -82,7 +82,7 @@ ...@@ -82,7 +82,7 @@
movq\t{%1, %0|%0, %1} movq\t{%1, %0|%0, %1}
movd\t{%1, %0|%0, %1} movd\t{%1, %0|%0, %1}
movd\t{%1, %0|%0, %1}" movd\t{%1, %0|%0, %1}"
[(set_attr "type" "imov,imov,mmxmov,mmxmov,mmxmov,ssecvt,ssecvt,ssemov,ssemov,ssemov,ssemov,ssemov") [(set_attr "type" "imov,imov,mmx,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,ssemov,ssemov")
(set_attr "unit" "*,*,*,*,*,mmx,mmx,*,*,*,*,*") (set_attr "unit" "*,*,*,*,*,mmx,mmx,*,*,*,*,*")
(set_attr "mode" "DI")]) (set_attr "mode" "DI")])
...@@ -108,7 +108,7 @@ ...@@ -108,7 +108,7 @@
movlps\t{%1, %0|%0, %1} movlps\t{%1, %0|%0, %1}
# #
#" #"
[(set_attr "type" "mmxmov,mmxmov,mmxmov,ssecvt,ssecvt,ssemov,ssemov,ssemov,ssemov,ssemov,ssemov,ssemov,*,*") [(set_attr "type" "mmx,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,sselog1,ssemov,ssemov,ssemov,*,*")
(set_attr "unit" "*,*,*,mmx,mmx,*,*,*,*,*,*,*,*,*") (set_attr "unit" "*,*,*,mmx,mmx,*,*,*,*,*,*,*,*,*")
(set_attr "mode" "DI,DI,DI,DI,DI,TI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")]) (set_attr "mode" "DI,DI,DI,DI,DI,TI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")])
...@@ -142,7 +142,7 @@ ...@@ -142,7 +142,7 @@
movlps\t{%1, %0|%0, %1} movlps\t{%1, %0|%0, %1}
movd\t{%1, %0|%0, %1} movd\t{%1, %0|%0, %1}
movd\t{%1, %0|%0, %1}" movd\t{%1, %0|%0, %1}"
[(set_attr "type" "imov,imov,mmxmov,mmxmov,mmxmov,ssecvt,ssecvt,ssemov,ssemov,ssemov,ssemov,ssemov,ssemov") [(set_attr "type" "imov,imov,mmx,mmxmov,mmxmov,ssecvt,ssecvt,ssemov,sselog1,ssemov,ssemov,ssemov,ssemov")
(set_attr "unit" "*,*,*,*,*,mmx,mmx,*,*,*,*,*,*") (set_attr "unit" "*,*,*,*,*,mmx,mmx,*,*,*,*,*,*")
(set_attr "mode" "DI,DI,DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")]) (set_attr "mode" "DI,DI,DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")])
...@@ -165,7 +165,7 @@ ...@@ -165,7 +165,7 @@
movlps\t{%1, %0|%0, %1} movlps\t{%1, %0|%0, %1}
# #
#" #"
[(set_attr "type" "mmxmov,mmxmov,mmxmov,ssecvt,ssecvt,ssemov,ssemov,ssemov,ssemov,*,*") [(set_attr "type" "mmx,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,ssemov,*,*")
(set_attr "unit" "*,*,*,mmx,mmx,*,*,*,*,*,*") (set_attr "unit" "*,*,*,mmx,mmx,*,*,*,*,*,*")
(set_attr "mode" "DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")]) (set_attr "mode" "DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")])
......
gcc/config/i386/sse.md
...@@ -81,23 +81,13 @@ ...@@ -81,23 +81,13 @@
} }
[(set_attr "type" "sselog1,ssemov,ssemov") [(set_attr "type" "sselog1,ssemov,ssemov")
(set (attr "mode") (set (attr "mode")
(cond [(eq (symbol_ref "TARGET_SSE2") (const_int 0))
(const_string "V4SF")
(eq_attr "alternative" "0,1")
(if_then_else (if_then_else
(ne (symbol_ref "optimize_size") (ior (ior (ne (symbol_ref "optimize_size") (const_int 0))
(const_int 0)) (eq (symbol_ref "TARGET_SSE2") (const_int 0)))
(and (eq_attr "alternative" "2")
(ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
(const_int 0))))
(const_string "V4SF") (const_string "V4SF")
(const_string "TI"))
(eq_attr "alternative" "2")
(if_then_else
(ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
(const_int 0))
(ne (symbol_ref "optimize_size")
(const_int 0)))
(const_string "V4SF")
(const_string "TI"))]
(const_string "TI")))]) (const_string "TI")))])
(define_expand "movv4sf" (define_expand "movv4sf"
...@@ -167,22 +157,13 @@ ...@@ -167,22 +157,13 @@
} }
[(set_attr "type" "sselog1,ssemov,ssemov") [(set_attr "type" "sselog1,ssemov,ssemov")
(set (attr "mode") (set (attr "mode")
(cond [(eq (symbol_ref "TARGET_SSE2") (const_int 0))
(const_string "V4SF")
(eq_attr "alternative" "0,1")
(if_then_else (if_then_else
(ne (symbol_ref "optimize_size") (ior (ior (ne (symbol_ref "optimize_size") (const_int 0))
(const_int 0)) (eq (symbol_ref "TARGET_SSE2") (const_int 0)))
(and (eq_attr "alternative" "2")
(ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
(const_int 0))))
(const_string "V4SF") (const_string "V4SF")
(const_string "V2DF"))
(eq_attr "alternative" "2")
(if_then_else
(ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
(const_int 0))
(ne (symbol_ref "optimize_size")
(const_int 0)))
(const_string "V4SF")
(const_string "V2DF"))]
(const_string "V2DF")))]) (const_string "V2DF")))])
(define_split (define_split
...@@ -1525,7 +1506,7 @@ ...@@ -1525,7 +1506,7 @@
"TARGET_SSE2" "TARGET_SSE2"
"sqrtsd\t{%1, %0|%0, %1}" "sqrtsd\t{%1, %0|%0, %1}"
[(set_attr "type" "sse") [(set_attr "type" "sse")
(set_attr "mode" "SF")]) (set_attr "mode" "DF")])
;; ??? For !flag_finite_math_only, the representation with SMIN/SMAX ;; ??? For !flag_finite_math_only, the representation with SMIN/SMAX
;; isn't really correct, as those rtl operators aren't defined when ;; isn't really correct, as those rtl operators aren't defined when
......
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