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riscv-gcc-1
Commit 435da628 by Uros Bizjak
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re PR rtl-optimization/38879 (scheduler does not look for conflicting alias sets) 

	PR rtl-optimization/38879
	* alias.c (base_alias_check): Unaligned access via AND address can
	alias all surrounding object types except those with sizes equal
	or wider than the size of unaligned access.

From-SVN: r143549
parent d597b3ce
Showing with 37 additions and 36 deletions
gcc/ChangeLog
2009-01-21 Uros Bizjak <ubizjak@gmail.com>
PR rtl-optimization/38879
* alias.c (base_alias_check): Unaligned access via AND address can
alias all surrounding object types except those with sizes equal
or wider than the size of unaligned access.
2009-01-21 Dodji Seketeli <dodji@redhat.com>
PR c++/26693
......@@ -62,8 +69,7 @@
2009-01-20 Ben Elliston <bje@au.ibm.com>
* libgcov.c (__gcov_execl, __gcov_execlp, __gcov_execle): Remove
const qualifier from arg parameter. Remove unnecessary cast to
char *.
const qualifier from arg parameter. Remove unnecessary cast to char *.
* gcov-io.h (__gcov_execl, __gcov_execlp, __gcov_execle): Remove
const qualifier from arg 2.
......@@ -228,8 +234,7 @@
2009-01-15 Kenneth Zadeck <zadeck@naturalbridge.com>
* dce.c (find_call_stack_args, delete_unmarked_insns): Fixed
comments.
* dce.c (find_call_stack_args, delete_unmarked_insns): Fixed comments.
2009-01-14 Jakub Jelinek <jakub@redhat.com>
......@@ -255,9 +260,9 @@
2009-01-14 Michael Meissner <gnu@the-meissners.org>
PR target/22599
* i386.c (print_operand): Add tests for 'D', 'C', 'F', 'f' to make
sure the insn is a conditional test (bug 22599). Reformat a few long
lines.
* config/i386/i386.c (print_operand): Add tests for 'D', 'C', 'F', 'f'
to make sure the insn is a conditional test (bug 22599). Reformat a
few long lines.
2009-01-14 Sebastian Pop <sebastian.pop@amd.com>
......@@ -268,10 +273,6 @@
(graphite_transform_loops): Call cleanup_tree_cfg after all
scops have been code generated.
2009-01-14 Vladimir Makarov <vmakarov@redhat.com>
* testsuite/g++.dg/torture/pr38811.C: New file.
2009-01-14 Basile Starynkevitch <basile@starynkevitch.net>
* doc/gty.texi (Invoking the garbage collector): Added new node
and section documenting ggc_collect.
......@@ -291,10 +292,8 @@
* ira-conflicts.c: Include addresses.h for the definition of
base_reg_class.
(ira_build_conflicts): Use base_reg_class instead of
BASE_REG_CLASS.
* Makefile.in: Add a dependency of ira-conflicts.o on
addresses.h.
(ira_build_conflicts): Use base_reg_class instead of BASE_REG_CLASS.
* Makefile.in: Add a dependency of ira-conflicts.o on addresses.h.
2009-01-13 Vladimir Makarov <vmakarov@redhat.com>
......@@ -337,13 +336,13 @@
2009-01-13 Richard Earnshaw <rearnsha@arm.com>
* arm.c (output_move_double): Don't synthesize thumb-2 ldrd/strd with
two 32-bit instructions.
* config/arm/arm.c (output_move_double): Don't synthesize thumb-2
ldrd/strd with two 32-bit instructions.
2009-01-13 Richard Earnshaw <rearnsha@arm.com>
* arm.c (struct processors): Pass for speed down into cost helper
functions.
* config/arm/arm.c (struct processors): Pass for speed down into
cost helper functions.
(const_ok_for_op): Handle COMPARE and inequality nodes.
(arm_rtx_costs_1): Rewrite.
(arm_size_rtx_costs): Update prototype.
......@@ -652,7 +651,7 @@
2009-01-06 Jan Hubicka <jh@suse.cz>
PR target/38744
* i386.c (ix86_expand_call): Use ARRAY_SIZE.
* config/i386/i386.c (ix86_expand_call): Use ARRAY_SIZE.
2009-01-06 Gerald Pfeifer <gerald@pfeifer.com>
......@@ -662,14 +661,15 @@
2009-01-06 Jan Hubicka <jh@suse.cz>
Kai Tietz <kai.tietz@onevision.com>
* i386.md (*msabi_syvabi): Add SSE regs clobbers.
* i386.c (ix86_expand_call): Add clobbers.
* config/i386/i386.md (*msabi_syvabi): Add SSE regs clobbers.
* config/i386/i386.c (ix86_expand_call): Add clobbers.
2009-01-06 Jan Hubicka <jh@suse.cz>
Kai Tietz <kai.tietz@onevision.com>
* i386.h (CONDITIONAL_CALL_USAGE): SSE regs are not used for w64 ABI.
* i386.c (struct ix86_frame): Add padding0 and nsseregs.
* config/i386/i386.h (CONDITIONAL_CALL_USAGE): SSE regs are not used
for w64 ABI.
* config/i386/i386.c (struct ix86_frame): Add padding0 and nsseregs.
(ix86_nsaved_regs): Count only general purpose regs.
(ix86_nsaved_sseregs): New.
(ix86_compute_frame_layout): Update nsseregs; set preferred alignment
......@@ -685,9 +685,9 @@
2009-01-06 Jan Hubicka <jh@suse.cz>
Kai Tietz <kai.tietz@onevision.com>
* i386.h (ACCUMULATE_OUTGOING_ARGS): Enable for MSABI
* i386.c (init_cumulative_args): Disallow calls of MSABI functions
when accumulate outgoing args is off.
* config/i386/i386.h (ACCUMULATE_OUTGOING_ARGS): Enable for MSABI
* config/i386/i386.c (init_cumulative_args): Disallow calls of MSABI
functions when accumulate outgoing args is off.
2009-01-06 H.J. Lu <hongjiu.lu@intel.com>
......
gcc/alias.c
......@@ -1559,13 +1559,13 @@ base_alias_check (rtx x, rtx y, enum machine_mode x_mode,
if (rtx_equal_p (x_base, y_base))
return 1;
/* The base addresses of the read and write are different expressions.
If they are both symbols and they are not accessed via AND, there is
no conflict. We can bring knowledge of object alignment into play
here. For example, on alpha, "char a, b;" can alias one another,
though "char a; long b;" cannot. */
if (GET_CODE (x_base) != ADDRESS && GET_CODE (y_base) != ADDRESS)
{
/* The base addresses are different expressions. If they are not accessed
via AND, there is no conflict. We can bring knowledge of object
alignment into play here. For example, on alpha, "char a, b;" can
alias one another, though "char a; long b;" cannot. AND addesses may
implicitly alias surrounding objects; i.e. unaligned access in DImode
via AND address can alias all surrounding object types except those
with aligment 8 or higher. */
if (GET_CODE (x) == AND && GET_CODE (y) == AND)
return 1;
if (GET_CODE (x) == AND
......@@ -1576,9 +1576,10 @@ base_alias_check (rtx x, rtx y, enum machine_mode x_mode,
&& (GET_CODE (XEXP (y, 1)) != CONST_INT
|| (int) GET_MODE_UNIT_SIZE (x_mode) < -INTVAL (XEXP (y, 1))))
return 1;
/* Differing symbols never alias. */
/* Differing symbols not accessed via AND never alias. */
if (GET_CODE (x_base) != ADDRESS && GET_CODE (y_base) != ADDRESS)
return 0;
}
/* If one address is a stack reference there can be no alias:
stack references using different base registers do not alias,
......
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