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riscv-gcc-1
Commit 42093880 by Richard Earnshaw Committed by Richard Earnshaw
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[arm] Rewrite t-rmprofile multilib specification 


This is the R- & M-profile equivalent of the previous A-profile
multilib rewrite.  Additionally this patch adds some top-level rules
to help find suitable multilibs for general cases when certain
libraries are not built, or when building for legacy cores.

gcc:

	* config/arm/t-aprofile (v7_a_nosimd_variants, v7_a_simd_variants)
	(v7ve_nosimd_variatns, v7ve_vfpv3_simd_variants)
	(v7ve_vfpv4_simd_variants, v8_a_nosimd_variants, v8_a_simd_variants)
	(v8_1_a_simd_variants, v8_2_a_simd_variants): Move to ...
	* config/arm/t-multilib: ... here.
	(MULTILIB_OPTIONS): Add armv7 and armv7+fp architectures.
	(MULTILIB_MATCHES): Use armv7 libraries for armv7-r.  Also use for
	armv7-a and armv8*-a when A-profile libraries have not been built.
	* config/arm/t-rmprofile: Rewrite.

gcc/testsuite:
	* gcc.target/arm/multilib.exp (rmprofile): New tests when rm-profile
	multilibs have been built.

From-SVN: r249300
parent c5742a17
Showing with 439 additions and 138 deletions
gcc/ChangeLog
2017-06-16 Richard Earnshaw <rearnsha@arm.com> 2017-06-16 Richard Earnshaw <rearnsha@arm.com>
* config/arm/t-aprofile (v7_a_nosimd_variants, v7_a_simd_variants)
(v7ve_nosimd_variatns, v7ve_vfpv3_simd_variants)
(v7ve_vfpv4_simd_variants, v8_a_nosimd_variants, v8_a_simd_variants)
(v8_1_a_simd_variants, v8_2_a_simd_variants): Move to ...
* config/arm/t-multilib: ... here.
(MULTILIB_OPTIONS): Add armv7 and armv7+fp architectures.
(MULTILIB_MATCHES): Use armv7 libraries for armv7-r. Also use for
armv7-a and armv8*-a when A-profile libraries have not been built.
* config/arm/t-rmprofile: Rewrite.
2017-06-16 Richard Earnshaw <rearnsha@arm.com>
* genmultilib (multilib_reuse): Allow an explicit period to be escaped * genmultilib (multilib_reuse): Allow an explicit period to be escaped
with a backslash. Remove the backslash after substituting unescaped with a backslash. Remove the backslash after substituting unescaped
periods. periods.
......
gcc/config/arm/t-aprofile
...@@ -24,19 +24,6 @@ ...@@ -24,19 +24,6 @@
# have their default values during the configure step. We enforce # have their default values during the configure step. We enforce
# this during the top-level configury. # this during the top-level configury.
# Variables used later in this file.
v7_a_nosimd_variants := +fp +vfpv3 +vfpv3-d16-fp16 +vfpv3-fp16 +vfpv4-d16 +vfpv4
v7_a_simd_variants := +simd +neon-fp16 +neon-vfpv4
v7ve_nosimd_variants := +vfpv3-d16 +vfpv3 +vfpv3-d16-fp16 +vfpv3-fp16 +fp +vfpv4
v7ve_vfpv3_simd_variants := +neon +neon-fp16
v7ve_vfpv4_simd_variants := +simd
v8_a_nosimd_variants := +crc
v8_a_simd_variants := $(call all_feat_combs, simd crypto)
v8_1_a_simd_variants := $(call all_feat_combs, simd crypto)
v8_2_a_simd_variants := $(call all_feat_combs, simd fp16 crypto)
# Arch and FPU variants to build libraries with # Arch and FPU variants to build libraries with
MULTI_ARCH_OPTS_A = march=armv7-a/march=armv7-a+fp/march=armv7-a+simd/march=armv7ve+simd/march=armv8-a/march=armv8-a+simd MULTI_ARCH_OPTS_A = march=armv7-a/march=armv7-a+fp/march=armv7-a+simd/march=armv7ve+simd/march=armv8-a/march=armv8-a+simd
......
gcc/config/arm/t-multilib
...@@ -57,6 +57,20 @@ all_feat_combs = +$(firstword $(1)) \ ...@@ -57,6 +57,20 @@ all_feat_combs = +$(firstword $(1)) \
$(wordlist 2, $(words $(1)), $(1))), \ $(wordlist 2, $(words $(1)), $(1))), \
+$(firstword $(1))$(OPT) $(OPT)),) +$(firstword $(1))$(OPT) $(OPT)),)
# Variables used.
all_early_arch := armv5e armv5tej armv6 armv6j armv6k armv6z armv6kz \
armv6zk armv6t2 iwmmxt iwmmxt2
v7_a_nosimd_variants := +fp +vfpv3 +vfpv3-d16-fp16 +vfpv3-fp16 +vfpv4-d16 +vfpv4
v7_a_simd_variants := +simd +neon-fp16 +neon-vfpv4
v7ve_nosimd_variants := +vfpv3-d16 +vfpv3 +vfpv3-d16-fp16 +vfpv3-fp16 +fp +vfpv4
v7ve_vfpv3_simd_variants := +neon +neon-fp16
v7ve_vfpv4_simd_variants := +simd
v8_a_nosimd_variants := +crc
v8_a_simd_variants := $(call all_feat_combs, simd crypto)
v8_1_a_simd_variants := $(call all_feat_combs, simd crypto)
v8_2_a_simd_variants := $(call all_feat_combs, simd fp16 crypto)
ifneq (,$(HAS_APROFILE)) ifneq (,$(HAS_APROFILE))
include $(srcdir)/config/arm/t-aprofile include $(srcdir)/config/arm/t-aprofile
endif endif
...@@ -66,14 +80,80 @@ endif ...@@ -66,14 +80,80 @@ endif
SEP := $(and $(HAS_APROFILE),$(HAS_RMPROFILE),/) SEP := $(and $(HAS_APROFILE),$(HAS_RMPROFILE),/)
MULTILIB_OPTIONS += marm/mthumb MULTILIB_OPTIONS += marm/mthumb
MULTILIB_DIRNAMES += arm thumb MULTILIB_DIRNAMES += arm thumb
MULTILIB_OPTIONS += march=armv5te+fp/march=armv7/march=armv7+fp/$(MULTI_ARCH_OPTS_A)$(SEP)$(MULTI_ARCH_OPTS_RM)
MULTILIB_DIRNAMES += v5te v7 v7+fp $(MULTI_ARCH_DIRS_A) $(MULTI_ARCH_DIRS_RM)
MULTILIB_OPTIONS += mfloat-abi=soft/mfloat-abi=softfp/mfloat-abi=hard
MULTILIB_DIRNAMES += nofp softfp hard
MULTILIB_REQUIRED += mthumb/mfloat-abi=soft
MULTILIB_REQUIRED += marm/march=armv5te+fp/mfloat-abi=softfp
MULTILIB_REQUIRED += marm/march=armv5te+fp/mfloat-abi=hard
MULTILIB_REQUIRED += mthumb/march=armv7/mfloat-abi=soft
MULTILIB_REQUIRED += mthumb/march=armv7+fp/mfloat-abi=softfp
MULTILIB_REQUIRED += mthumb/march=armv7+fp/mfloat-abi=hard
# Map v7-r down onto common v7 code.
MULTILIB_MATCHES += march?armv7=march?armv7-r
MULTILIB_MATCHES += march?armv7=march?armv7-r+idiv
MULTILIB_MATCHES += march?armv7+fp=march?armv7-r+fp
MULTILIB_MATCHES += march?armv7+fp=march?armv7-r+fp+idiv
MULTILIB_MATCHES += $(foreach ARCH, $(all_early_arch), \
march?armv5te+fp=march?$(ARCH)+fp)
ifeq (,$(HAS_APROFILE))
# Map all v7-a
MULTILIB_MATCHES += march?armv7=march?armv7-a
MULTILIB_MATCHES += $(foreach ARCH, $(v7_a_nosimd_variants) $(v7_a_simd_variants), \
march?armv7+fp=march?armv7-a$(ARCH))
MULTILIB_MATCHES += march?armv7=march?armv7ve
# ARMv7ve FP/SIMD variants: map down to v7+fp
MULTILIB_MATCHES += $(foreach ARCH, $(v7ve_nosimd_variants) $(v7ve_vfpv3_simd_variants) $(v7ve_vfpv4_simd_variants), \
march?armv7+fp=march?armv7ve$(ARCH))
# ARMv8
MULTILIB_MATCHES += march?armv7=march?armv8-a
MULTILIB_MATCHES += $(foreach ARCH, $(v8_a_nosimd_variants), \
march?armv7=march?armv8-a$(ARCH))
# ARMv8 with SIMD
MULTILIB_MATCHES += march?armv7+fp=march?armv8-a+crc+simd \
$(foreach ARCH, $(v8_a_simd_variants), \
march?armv7+fp=march?armv8-a$(ARCH) \
march?armv7+fp=march?armv8-a+crc$(ARCH))
# Baseline v8.1-a
MULTILIB_MATCHES += march?armv7=march?armv8.1-a
# Map all v8.1-a SIMD variants
MULTILIB_MATCHES += $(foreach ARCH, $(v8_1_a_simd_variants), \
march?armv7+fp=march?armv8.1-a$(ARCH))
# Baseline v8.2-a: map down to baseline v8-a
MULTILIB_MATCHES += march?armv7=march?armv8.2-a
# Map all v8.2-a SIMD variants
MULTILIB_MATCHES += $(foreach ARCH, $(v8_2_a_simd_variants), \
march?armv7+fp=march?armv8.2-a$(ARCH))
# Use Thumb libraries for everything.
MULTILIB_REUSE += mthumb/march.armv7/mfloat-abi.soft=marm/march.armv7/mfloat-abi.soft
MULTILIB_OPTIONS += march=armv5te+fp/$(MULTI_ARCH_OPTS_A)$(SEP)$(MULTI_ARCH_OPTS_RM) MULTILIB_REUSE += $(foreach ABI, hard softfp, \
MULTILIB_DIRNAMES += v5te $(MULTI_ARCH_DIRS_A) $(MULTI_ARCH_DIRS_RM) $(foreach ARCH, armv7+fp, \
mthumb/march.$(ARCH)/mfloat-abi.$(ABI)=marm/march.$(ARCH)/mfloat-abi.$(ABI)))
MULTILIB_OPTIONS += mfloat-abi=soft/mfloat-abi=softfp/mfloat-abi=hard # Softfp but no FP, use the soft-float libraries.
MULTILIB_DIRNAMES += nofp softfp hard MULTILIB_REUSE += $(foreach MODE, arm thumb, \
$(foreach ARCH, armv7, \
mthumb/march.$(ARCH)/mfloat-abi.soft=m$(MODE)/march.$(ARCH)/mfloat-abi.softfp))
MULTILIB_REQUIRED += mthumb/mfloat-abi=soft endif # Not APROFILE.
MULTILIB_REQUIRED += marm/march=armv5te+fp/mfloat-abi=hard \ No newline at end of file
gcc/config/arm/t-rmprofile
...@@ -27,130 +27,42 @@ ...@@ -27,130 +27,42 @@
# Arch and FPU variants to build libraries with # Arch and FPU variants to build libraries with
MULTI_ARCH_OPTS_RM = march=armv6s-m/march=armv7-m/march=armv7e-m/march=armv7/march=armv8-m.base/march=armv8-m.main MULTI_ARCH_OPTS_RM = march=armv6s-m/march=armv7-m/march=armv7e-m/march=armv7e-m+fp/march=armv7e-m+fp.dp/march=armv8-m.base/march=armv8-m.main/march=armv8-m.main+fp/march=armv8-m.main+fp.dp
MULTI_ARCH_DIRS_RM = v6-m v7-m v7e-m v7-ar v8-m.base v8-m.main MULTI_ARCH_DIRS_RM = v6-m v7-m v7e-m v7e-m+fp v7e-m+dp v8-m.base v8-m.main v8-m.main+fp v8-m.main+dp
MULTI_FPU_OPTS_RM = mfpu=vfpv3-d16/mfpu=fpv4-sp-d16/mfpu=fpv5-sp-d16/mfpu=fpv5-d16 # Base M-profile (no fp)
MULTI_FPU_DIRS_RM = fpv3 fpv4-sp fpv5-sp fpv5 MULTILIB_REQUIRED += mthumb/march=armv6s-m/mfloat-abi=soft
MULTILIB_REQUIRED += mthumb/march=armv7-m/mfloat-abi=soft
MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfloat-abi=soft
MULTILIB_REQUIRED += mthumb/march=armv8-m.base/mfloat-abi=soft
MULTILIB_REQUIRED += mthumb/march=armv8-m.main/mfloat-abi=soft
# ARMv7e-M with FP (single and double precision variants)
MULTILIB_REQUIRED += mthumb/march=armv7e-m+fp/mfloat-abi=hard
MULTILIB_REQUIRED += mthumb/march=armv7e-m+fp/mfloat-abi=softfp
MULTILIB_REQUIRED += mthumb/march=armv7e-m+fp.dp/mfloat-abi=hard
MULTILIB_REQUIRED += mthumb/march=armv7e-m+fp.dp/mfloat-abi=softfp
# Option combinations to build library with # ARMv8-M with FP (single and double precision variants)
MULTILIB_REQUIRED += mthumb/march=armv8-m.main+fp/mfloat-abi=hard
MULTILIB_REQUIRED += mthumb/march=armv8-m.main+fp/mfloat-abi=softfp
MULTILIB_REQUIRED += mthumb/march=armv8-m.main+fp.dp/mfloat-abi=hard
MULTILIB_REQUIRED += mthumb/march=armv8-m.main+fp.dp/mfloat-abi=softfp
# Default CPU/Arch
MULTILIB_REQUIRED += mthumb
MULTILIB_REQUIRED += mfloat-abi=hard
# ARMv6-M
MULTILIB_REQUIRED += mthumb/march=armv6s-m
# ARMv8-M Baseline
MULTILIB_REQUIRED += mthumb/march=armv8-m.base
# ARMv7-M
MULTILIB_REQUIRED += mthumb/march=armv7-m
# ARMv7E-M
MULTILIB_REQUIRED += mthumb/march=armv7e-m
MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfpu=fpv4-sp-d16/mfloat-abi=softfp
MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfpu=fpv5-d16/mfloat-abi=softfp
MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfpu=fpv5-d16/mfloat-abi=hard
MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfpu=fpv5-sp-d16/mfloat-abi=softfp
MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfpu=fpv5-sp-d16/mfloat-abi=hard
# ARMv8-M Mainline
MULTILIB_REQUIRED += mthumb/march=armv8-m.main
MULTILIB_REQUIRED += mthumb/march=armv8-m.main/mfpu=fpv5-d16/mfloat-abi=softfp
MULTILIB_REQUIRED += mthumb/march=armv8-m.main/mfpu=fpv5-d16/mfloat-abi=hard
MULTILIB_REQUIRED += mthumb/march=armv8-m.main/mfpu=fpv5-sp-d16/mfloat-abi=softfp
MULTILIB_REQUIRED += mthumb/march=armv8-m.main/mfpu=fpv5-sp-d16/mfloat-abi=hard
# ARMv7-R as well as ARMv7-A and ARMv8-A if aprofile was not specified
MULTILIB_REQUIRED += mthumb/march=armv7
MULTILIB_REQUIRED += mthumb/march=armv7/mfpu=vfpv3-d16/mfloat-abi=softfp
MULTILIB_REQUIRED += mthumb/march=armv7/mfpu=vfpv3-d16/mfloat-abi=hard
# Matches
# CPU Matches
MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m0
MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m0.small-multiply
MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m0plus
MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m0plus.small-multiply
MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m1
MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m1.small-multiply
MULTILIB_MATCHES += march?armv7-m=mcpu?cortex-m3
MULTILIB_MATCHES += march?armv7e-m=mcpu?cortex-m4
MULTILIB_MATCHES += march?armv7e-m=mcpu?cortex-m7
MULTILIB_MATCHES += march?armv8-m.base=mcpu?cortex-m23
MULTILIB_MATCHES += march?armv8-m.main=mcpu?cortex-m33
MULTILIB_MATCHES += march?armv7=mcpu?cortex-r4
MULTILIB_MATCHES += march?armv7=mcpu?cortex-r4f
MULTILIB_MATCHES += march?armv7=mcpu?cortex-r5
MULTILIB_MATCHES += march?armv7=mcpu?cortex-r7
MULTILIB_MATCHES += march?armv7=mcpu?cortex-r8
MULTILIB_MATCHES += march?armv7=mcpu?marvell-pj4
MULTILIB_MATCHES += march?armv7=mcpu?generic-armv7-a
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a8
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a9
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a5
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a7
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a15
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a12
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a17
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a15.cortex-a7
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a17.cortex-a7
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a32
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a35
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a53
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a57
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a57.cortex-a53
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a72
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a72.cortex-a53
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a73
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a73.cortex-a35
MULTILIB_MATCHES += march?armv7=mcpu?cortex-a73.cortex-a53
MULTILIB_MATCHES += march?armv7=mcpu?exynos-m1
MULTILIB_MATCHES += march?armv7=mcpu?xgene1
# Arch Matches # Arch Matches
MULTILIB_MATCHES += march?armv6s-m=march?armv6-m MULTILIB_MATCHES += march?armv6s-m=march?armv6-m
MULTILIB_MATCHES += march?armv8-m.main=march?armv8-m.main+dsp
MULTILIB_MATCHES += march?armv7=march?armv7-r # Map all v8-m.main+dsp FP variants down the the variant without DSP.
ifeq (,$(HAS_APROFILE)) MULTILIB_MATCHES += march?armv8-m.main=march?armv8-m.main+dsp \
MULTILIB_MATCHES += march?armv7=march?armv7-a $(foreach FP, +fp +fp.dp, \
MULTILIB_MATCHES += march?armv7=march?armv7ve march?armv8-m.main$(FP)=march?armv8-m.main+dsp$(FP))
MULTILIB_MATCHES += march?armv7=march?armv8-a
MULTILIB_MATCHES += march?armv7=march?armv8-a+crc
MULTILIB_MATCHES += march?armv7=march?armv8.1-a
MULTILIB_MATCHES += march?armv7=march?armv8.1-a+crc
MULTILIB_MATCHES += march?armv7=march?armv8.2-a
MULTILIB_MATCHES += march?armv7=march?armv8.2-a+fp16
endif
# FPU matches # For single-precision only fpv5, use the base fp libraries
ifeq (,$(HAS_APROFILE)) MULTILIB_MATCHES += march?armv7e-m+fp=march?armv7e-m+fpv5
MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3
MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3-fp16
MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3-d16-fp16
MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?neon
MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?neon-fp16
MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv4
MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv4-d16
MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?neon-vfpv4
MULTILIB_MATCHES += mfpu?fpv5-d16=mfpu?fp-armv8
MULTILIB_MATCHES += mfpu?fpv5-d16=mfpu?neon-fp-armv8
MULTILIB_MATCHES += mfpu?fpv5-d16=mfpu?crypto-neon-fp-armv8
endif
# Softfp but no FP. Use the soft-float libraries.
MULTILIB_REUSE += $(foreach ARCH, armv6s-m armv7-m armv7e-m armv8-m\.base armv8-m\.main, \
mthumb/march.$(ARCH)/mfloat-abi.soft=mthumb/march.$(ARCH)/mfloat-abi.softfp)
# We map all requests for ARMv7-R or ARMv7-A in ARM mode to Thumb mode and
# any FPU to VFPv3-d16 if possible.
MULTILIB_REUSE += mthumb/march.armv7=march.armv7
MULTILIB_REUSE += mthumb/march.armv7/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7/mfpu.vfpv3-d16/mfloat-abi.softfp
MULTILIB_REUSE += mthumb/march.armv7/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7/mfpu.vfpv3-d16/mfloat-abi.hard
MULTILIB_REUSE += mthumb/march.armv7/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7/mfpu.fpv5-d16/mfloat-abi.softfp
MULTILIB_REUSE += mthumb/march.armv7/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7/mfpu.fpv5-d16/mfloat-abi.hard
MULTILIB_REUSE += mthumb/march.armv7/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv7/mfpu.fpv5-d16/mfloat-abi.softfp
MULTILIB_REUSE += mthumb/march.armv7/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv7/mfpu.fpv5-d16/mfloat-abi.hard
gcc/testsuite/ChangeLog
2017-06-16 Richard Earnshaw <rearnsha@arm.com> 2017-06-16 Richard Earnshaw <rearnsha@arm.com>
* gcc.target/arm/multilib.exp (rmprofile): New tests when rm-profile
multilibs have been built.
2017-06-16 Richard Earnshaw <rearnsha@arm.com>
* gcc.dg/pr59418.c: On ARM, change architecture to armv7-a+fp. * gcc.dg/pr59418.c: On ARM, change architecture to armv7-a+fp.
* gcc.target/arm/pr51915.c: Likewise. * gcc.target/arm/pr51915.c: Likewise.
* gcc.target/arm/pr52006.c: Likewise. * gcc.target/arm/pr52006.c: Likewise.
......
gcc/testsuite/gcc.target/arm/multilib.exp
...@@ -376,6 +376,310 @@ if {[multilib_config "aprofile"] } { ...@@ -376,6 +376,310 @@ if {[multilib_config "aprofile"] } {
check_multi_dir $opts $dir check_multi_dir $opts $dir
} }
} }
if {[multilib_config "rmprofile"] } {
foreach {opts dir} {
{-mcpu=cortex-m0 -mfpu=auto -mfloat-abi=soft} "thumb/v6-m/nofp"
{-mcpu=cortex-m1 -mfpu=auto -mfloat-abi=soft} "thumb/v6-m/nofp"
{-mcpu=cortex-m3 -mfpu=auto -mfloat-abi=soft} "thumb/v7-m/nofp"
{-mcpu=cortex-m4 -mfpu=auto -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m7 -mfpu=auto -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m23 -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.base/nofp"
{-mcpu=cortex-m33 -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-mcpu=cortex-m7+nofp.dp -mfpu=auto -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m0 -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v6-m/nofp"
{-mcpu=cortex-m1 -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v6-m/nofp"
{-mcpu=cortex-m3 -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v7-m/nofp"
{-mcpu=cortex-m4 -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m7 -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m23 -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v8-m.base/nofp"
{-mcpu=cortex-m33 -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-mcpu=cortex-m7+nofp.dp -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m0 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v6-m/nofp"
{-mcpu=cortex-m1 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v6-m/nofp"
{-mcpu=cortex-m3 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v7-m/nofp"
{-mcpu=cortex-m4 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m7 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m23 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v8-m.base/nofp"
{-mcpu=cortex-m33 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-mcpu=cortex-m7+nofp.dp -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m0 -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v6-m/nofp"
{-mcpu=cortex-m1 -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v6-m/nofp"
{-mcpu=cortex-m3 -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v7-m/nofp"
{-mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m7 -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m23 -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v8-m.base/nofp"
{-mcpu=cortex-m33 -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-mcpu=cortex-m7+nofp.dp -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m0 -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v6-m/nofp"
{-mcpu=cortex-m1 -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v6-m/nofp"
{-mcpu=cortex-m3 -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v7-m/nofp"
{-mcpu=cortex-m4 -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m23 -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v8-m.base/nofp"
{-mcpu=cortex-m33 -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-mcpu=cortex-m7+nofp.dp -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m0 -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v6-m/nofp"
{-mcpu=cortex-m1 -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v6-m/nofp"
{-mcpu=cortex-m3 -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v7-m/nofp"
{-mcpu=cortex-m4 -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m7 -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m23 -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.base/nofp"
{-mcpu=cortex-m33 -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-mcpu=cortex-m7+nofp.dp -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m4 -mfpu=auto -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-mcpu=cortex-m7 -mfpu=auto -mfloat-abi=hard} "thumb/v7e-m+dp/hard"
{-mcpu=cortex-m33 -mfpu=auto -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-mcpu=cortex-m7+nofp.dp -mfpu=auto -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-mcpu=cortex-m4 -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-mcpu=cortex-m7 -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-mcpu=cortex-m33 -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-mcpu=cortex-m7+nofp.dp -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-mcpu=cortex-m4 -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-mcpu=cortex-m7 -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-mcpu=cortex-m33 -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-mcpu=cortex-m7+nofp.dp -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-mcpu=cortex-m7 -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-mcpu=cortex-m33 -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-mcpu=cortex-m7+nofp.dp -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-mcpu=cortex-m4 -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-mcpu=cortex-m33 -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-mcpu=cortex-m7+nofp.dp -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-mcpu=cortex-m4 -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard"
{-mcpu=cortex-m7 -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard"
{-mcpu=cortex-m33 -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-mcpu=cortex-m7+nofp.dp -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard"
{-mcpu=cortex-m0 -mfpu=auto -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-mcpu=cortex-m1 -mfpu=auto -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-mcpu=cortex-m3 -mfpu=auto -mfloat-abi=softfp} "thumb/v7-m/nofp"
{-mcpu=cortex-m4 -mfpu=auto -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-mcpu=cortex-m7 -mfpu=auto -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp"
{-mcpu=cortex-m23 -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.base/nofp"
{-mcpu=cortex-m33 -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-mcpu=cortex-m7+nofp.dp -mfpu=auto -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-mcpu=cortex-m0 -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-mcpu=cortex-m1 -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-mcpu=cortex-m3 -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v7-m/nofp"
{-mcpu=cortex-m4 -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-mcpu=cortex-m7 -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-mcpu=cortex-m23 -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v8-m.base/nofp"
{-mcpu=cortex-m33 -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-mcpu=cortex-m7+nofp.dp -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-mcpu=cortex-m0 -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-mcpu=cortex-m1 -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-mcpu=cortex-m3 -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v7-m/nofp"
{-mcpu=cortex-m4 -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-mcpu=cortex-m7 -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-mcpu=cortex-m23 -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v8-m.base/nofp"
{-mcpu=cortex-m33 -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-mcpu=cortex-m7+nofp.dp -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-mcpu=cortex-m0 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-mcpu=cortex-m1 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-mcpu=cortex-m3 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v7-m/nofp"
{-mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-mcpu=cortex-m7 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-mcpu=cortex-m23 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.base/nofp"
{-mcpu=cortex-m33 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-mcpu=cortex-m7+nofp.dp -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-mcpu=cortex-m0 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-mcpu=cortex-m1 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-mcpu=cortex-m3 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v7-m/nofp"
{-mcpu=cortex-m4 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-mcpu=cortex-m23 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.base/nofp"
{-mcpu=cortex-m33 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-mcpu=cortex-m7+nofp.dp -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-mcpu=cortex-m0 -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-mcpu=cortex-m1 -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-mcpu=cortex-m3 -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v7-m/nofp"
{-mcpu=cortex-m4 -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp"
{-mcpu=cortex-m7 -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp"
{-mcpu=cortex-m23 -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.base/nofp"
{-mcpu=cortex-m33 -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-mcpu=cortex-m7+nofp.dp -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp"
{-march=armv6-m -mfpu=auto -mfloat-abi=soft} "thumb/v6-m/nofp"
{-march=armv7-m -mfpu=auto -mfloat-abi=soft} "thumb/v7-m/nofp"
{-march=armv7e-m -mfpu=auto -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-march=armv8-m.base -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.base/nofp"
{-march=armv8-m.main -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv7e-m+fp -mfpu=auto -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-march=armv7e-m+fp.dp -mfpu=auto -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-march=armv8-m.main+fp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv8-m.main+fp.dp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv8-m.main+fp+dsp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv8-m.main+fp.dp+dsp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv6-m -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v6-m/nofp"
{-march=armv7-m -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v7-m/nofp"
{-march=armv7e-m -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-march=armv8-m.base -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v8-m.base/nofp"
{-march=armv8-m.main -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv7e-m+fp -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-march=armv7e-m+fp.dp -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-march=armv8-m.main+fp -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv8-m.main+fp.dp -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv8-m.main+fp+dsp -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv8-m.main+fp.dp+dsp -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv6-m -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v6-m/nofp"
{-march=armv7-m -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v7-m/nofp"
{-march=armv7e-m -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-march=armv8-m.base -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v8-m.base/nofp"
{-march=armv8-m.main -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv7e-m+fp -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-march=armv7e-m+fp.dp -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-march=armv8-m.main+fp -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv8-m.main+fp.dp -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv8-m.main+fp+dsp -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv8-m.main+fp.dp+dsp -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv6-m -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v6-m/nofp"
{-march=armv7-m -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v7-m/nofp"
{-march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-march=armv8-m.base -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v8-m.base/nofp"
{-march=armv8-m.main -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv7e-m+fp -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-march=armv7e-m+fp.dp -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-march=armv8-m.main+fp -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv8-m.main+fp.dp -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv8-m.main+fp+dsp -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv8-m.main+fp.dp+dsp -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv6-m -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v6-m/nofp"
{-march=armv7-m -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v7-m/nofp"
{-march=armv7e-m -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-march=armv8-m.base -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v8-m.base/nofp"
{-march=armv8-m.main -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv7e-m+fp -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-march=armv7e-m+fp.dp -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-march=armv8-m.main+fp -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv8-m.main+fp.dp -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv8-m.main+fp+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv8-m.main+fp.dp+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv6-m -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v6-m/nofp"
{-march=armv7-m -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v7-m/nofp"
{-march=armv7e-m -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-march=armv8-m.base -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.base/nofp"
{-march=armv8-m.main -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv7e-m+fp -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-march=armv7e-m+fp.dp -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-march=armv8-m.main+fp -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv8-m.main+fp.dp -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv8-m.main+fp+dsp -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv8-m.main+fp.dp+dsp -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-march=armv7e-m+fp -mfpu=auto -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-march=armv7e-m+fp.dp -mfpu=auto -mfloat-abi=hard} "thumb/v7e-m+dp/hard"
{-march=armv8-m.main+fp -mfpu=auto -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-march=armv8-m.main+fp.dp -mfpu=auto -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-march=armv8-m.main+fp+dsp -mfpu=auto -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-march=armv8-m.main+fp.dp+dsp -mfpu=auto -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-march=armv7e-m -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-march=armv8-m.main -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-march=armv7e-m+fp -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-march=armv7e-m+fp.dp -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v7e-m+dp/hard"
{-march=armv8-m.main+fp -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-march=armv8-m.main+fp.dp -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-march=armv8-m.main+fp+dsp -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-march=armv8-m.main+fp.dp+dsp -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-march=armv7e-m -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-march=armv8-m.main -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-march=armv7e-m+fp -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-march=armv7e-m+fp.dp -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard"
{-march=armv8-m.main+fp -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-march=armv8-m.main+fp.dp -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-march=armv8-m.main+fp+dsp -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-march=armv8-m.main+fp.dp+dsp -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-march=armv8-m.main -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-march=armv7e-m+fp -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-march=armv7e-m+fp.dp -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard"
{-march=armv8-m.main+fp -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-march=armv8-m.main+fp.dp -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-march=armv8-m.main+fp+dsp -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-march=armv8-m.main+fp.dp+dsp -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-march=armv7e-m -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-march=armv8-m.main -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-march=armv7e-m+fp -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-march=armv7e-m+fp.dp -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard"
{-march=armv8-m.main+fp -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-march=armv8-m.main+fp.dp -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-march=armv8-m.main+fp+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
{-march=armv8-m.main+fp.dp+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-march=armv7e-m -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard"
{-march=armv8-m.main -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-march=armv7e-m+fp -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard"
{-march=armv7e-m+fp.dp -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard"
{-march=armv8-m.main+fp -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-march=armv8-m.main+fp.dp -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-march=armv8-m.main+fp+dsp -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-march=armv8-m.main+fp.dp+dsp -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-march=armv6-m -mfpu=auto -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-march=armv7-m -mfpu=auto -mfloat-abi=softfp} "thumb/v7-m/nofp"
{-march=armv7e-m -mfpu=auto -mfloat-abi=softfp} "thumb/v7e-m/nofp"
{-march=armv8-m.base -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.base/nofp"
{-march=armv8-m.main -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.main/nofp"
{-march=armv7e-m+fp -mfpu=auto -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-march=armv7e-m+fp.dp -mfpu=auto -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp"
{-march=armv8-m.main+fp -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-march=armv8-m.main+fp.dp -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-march=armv8-m.main+fp+dsp -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-march=armv8-m.main+fp.dp+dsp -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-march=armv6-m -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-march=armv7-m -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v7-m/nofp"
{-march=armv7e-m -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-march=armv8-m.base -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v8-m.base/nofp"
{-march=armv8-m.main -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-march=armv7e-m+fp -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-march=armv7e-m+fp.dp -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp"
{-march=armv8-m.main+fp -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-march=armv8-m.main+fp.dp -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-march=armv8-m.main+fp+dsp -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-march=armv8-m.main+fp.dp+dsp -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-march=armv6-m -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-march=armv7-m -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v7-m/nofp"
{-march=armv7e-m -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-march=armv8-m.base -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v8-m.base/nofp"
{-march=armv8-m.main -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-march=armv7e-m+fp -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-march=armv7e-m+fp.dp -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp"
{-march=armv8-m.main+fp -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-march=armv8-m.main+fp.dp -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-march=armv8-m.main+fp+dsp -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-march=armv8-m.main+fp.dp+dsp -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-march=armv6-m -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-march=armv7-m -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v7-m/nofp"
{-march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-march=armv8-m.base -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.base/nofp"
{-march=armv8-m.main -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-march=armv7e-m+fp -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-march=armv7e-m+fp.dp -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp"
{-march=armv8-m.main+fp -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-march=armv8-m.main+fp.dp -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-march=armv8-m.main+fp+dsp -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-march=armv8-m.main+fp.dp+dsp -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-march=armv6-m -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-march=armv7-m -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v7-m/nofp"
{-march=armv7e-m -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-march=armv8-m.base -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.base/nofp"
{-march=armv8-m.main -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-march=armv7e-m+fp -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp"
{-march=armv7e-m+fp.dp -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp"
{-march=armv8-m.main+fp -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-march=armv8-m.main+fp.dp -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-march=armv8-m.main+fp+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
{-march=armv8-m.main+fp.dp+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-march=armv6-m -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-march=armv7-m -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v7-m/nofp"
{-march=armv7e-m -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp"
{-march=armv8-m.base -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.base/nofp"
{-march=armv8-m.main -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-march=armv7e-m+fp -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp"
{-march=armv7e-m+fp.dp -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp"
{-march=armv8-m.main+fp -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-march=armv8-m.main+fp.dp -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-march=armv8-m.main+fp+dsp -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-march=armv8-m.main+fp.dp+dsp -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
} {
check_multi_dir $opts $dir
}
}
gcc_parallel_test_enable 1 gcc_parallel_test_enable 1
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