Commit 40c0a159 by Uros Bizjak

re PR target/61239 (ICE in decompose, at rtl.h when compiling vshuf-v16hi.c using -mavx2)

	PR target/61239
	* config/i386/i386.c (ix86_expand_vec_perm) [case V32QImode]: Use
	GEN_INT (-128) instead of GEN_INT (128) to set MSB of QImode constant.

From-SVN: r211134
parent 94bfa2da
2014-06-02 Uros Bizjak <ubizjak@gmail.com>
PR target/61239
* config/i386/i386.c (ix86_expand_vec_perm) [case V32QImode]: Use
GEN_INT (-128) instead of GEN_INT (128) to set MSB of QImode constant.
2014-06-02 Tom de Vries <tom@codesourcery.com>
* config/aarch64/aarch64.c (aarch64_float_const_representable_p): Handle
......@@ -149,17 +155,17 @@
2014-05-29 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/61325
* lra-constraints.c (process_address): Rename to
process_address_1.
* lra-constraints.c (process_address): Rename to process_address_1.
(process_address): New function.
2014-05-29 Alan Lawrence <alan.lawrence@arm.com>
* config/aarch64/aarch64-builtins.c (aarch64_types_binopv_qualifiers,
TYPES_BINOPV): New static data.
* config/aarch64/aarch64-simd-builtins.def (im_lane_bound): New builtin.
* config/aarch64/aarch64-simd.md (aarch64_ext, aarch64_im_lane_boundsi):
New patterns.
* config/aarch64/aarch64-simd-builtins.def (im_lane_bound):
New builtin.
* config/aarch64/aarch64-simd.md (aarch64_ext,
aarch64_im_lane_boundsi): New patterns.
* config/aarch64/aarch64.c (aarch64_expand_vec_perm_const_1): Match
patterns for EXT.
(aarch64_evpc_ext): New function.
......@@ -220,8 +226,9 @@
-fuse-caller-save.
* lra-assigns.c (lra_assign): Allow call_used_regs to cross calls for
-fuse-caller-save.
* lra-constraints.c (need_for_call_save_p): Use actual_call_used_reg_set
instead of call_used_reg_set for -fuse-caller-save.
* lra-constraints.c (need_for_call_save_p): Use
actual_call_used_reg_set instead of call_used_reg_set for
-fuse-caller-save.
* lra-lives.c (process_bb_lives): Calculate actual_call_used_reg_set.
2014-05-28 Richard Sandiford <rdsandiford@googlemail.com>
......@@ -301,8 +308,7 @@
__RL78_64BIT_DOUBLES__ or __RL78_32BIT_DOUBLES__.
(ASM_SPEC): Pass -m64bit-doubles or -m32bit-doubles on
to the assembler.
(DOUBLE_TYPE_SIZE): Use 64 bit if TARGET_64BIT_DOUBLES
is true.
(DOUBLE_TYPE_SIZE): Use 64 bit if TARGET_64BIT_DOUBLES is true.
* gcc/config/rl78/rl78.opt (m64bit-doubles): New option.
(m32bit-doubles) Likewise.
* gcc/config/rl78/t-rl78: Add 64-bit-double multilib.
......@@ -347,15 +353,16 @@
-fuse-caller-save.
* lra-assigns.c (lra_assign): Allow call_used_regs to cross calls for
-fuse-caller-save.
* lra-constraints.c (need_for_call_save_p): Use actual_call_used_reg_set
instead of call_used_reg_set for -fuse-caller-save.
* lra-constraints.c (need_for_call_save_p): Use
actual_call_used_reg_set instead of call_used_reg_set for
-fuse-caller-save.
* lra-lives.c (process_bb_lives): Calculate actual_call_used_reg_set.
2014-05-28 Radovan Obradovic <robradovic@mips.com>
Tom de Vries <tom@codesourcery.com>
* doc/invoke.texi (@item Optimization Options): Add -fuse-caller-save to
gccoptlist.
* doc/invoke.texi (@item Optimization Options): Add -fuse-caller-save
to gccoptlist.
(@item -fuse-caller-save): New item.
2014-05-28 Radovan Obradovic <robradovic@mips.com>
......@@ -419,8 +426,7 @@
* config/aarch64/aarch64.md (stack_protect_set_<mode>):
Use <w> for the register in assembly template.
(stack_protect_test): Use the mode of operands[0] for the
result.
(stack_protect_test): Use the mode of operands[0] for the result.
(stack_protect_test_<mode>): Use <w> for the register
in assembly template.
......
......@@ -21541,7 +21541,7 @@ ix86_expand_vec_perm (rtx operands[])
t1 = gen_reg_rtx (V32QImode);
t2 = gen_reg_rtx (V32QImode);
t3 = gen_reg_rtx (V32QImode);
vt2 = GEN_INT (128);
vt2 = GEN_INT (-128);
for (i = 0; i < 32; i++)
vec[i] = vt2;
vt = gen_rtx_CONST_VECTOR (V32QImode, gen_rtvec_v (32, vec));
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