Commit 3fd6ae8a by Claudiu Zissulescu Committed by Claudiu Zissulescu

[ARC] Update EH code.

Our ABI says the blink is pushed first on stack followed by an unknown
number of register saves, and finally by fp.  Hence we cannot use the
EH_RETURN_ADDRESS macro as the stack is not finalized at that moment.
The alternative is to use the eh_return pattern and to initialize all
the bits after register allocation when the stack layout is finalized.

gcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (arc_eh_return_address_location): Repurpose it
	to fit the eh_return pattern.
	* config/arc/arc.md (eh_return): Define.
	(VUNSPEC_ARC_EH_RETURN): Likewise.
	* config/arc/arc-protos.h (arc_eh_return_address_location): Match
	new implementation.
	* config/arc/arc.h (EH_RETURN_HANDLER_RTX): Remove it.

testsuite/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* gcc.target/arc/builtin_eh.c: New test.

From-SVN: r266066
parent 90b48013
2018-11-13 Claudiu Zissulescu <claziss@synopsys.com> 2018-11-13 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_eh_return_address_location): Repurpose it
to fit the eh_return pattern.
* config/arc/arc.md (eh_return): Define.
(VUNSPEC_ARC_EH_RETURN): Likewise.
* config/arc/arc-protos.h (arc_eh_return_address_location): Match
new implementation.
* config/arc/arc.h (EH_RETURN_HANDLER_RTX): Remove it.
2018-11-13 Claudiu Zissulescu <claziss@synopsys.com>
* common/config/arc/arc-common.c (arc_option_optimization_table): * common/config/arc/arc-common.c (arc_option_optimization_table):
Millicode optimization is default on for size optimizations. Millicode optimization is default on for size optimizations.
* config/arc/arc-protos.h (arc_check_multi): New function. * config/arc/arc-protos.h (arc_check_multi): New function.
...@@ -109,7 +109,7 @@ extern bool arc_legitimize_reload_address (rtx *, machine_mode, int, int); ...@@ -109,7 +109,7 @@ extern bool arc_legitimize_reload_address (rtx *, machine_mode, int, int);
extern void arc_secondary_reload_conv (rtx, rtx, rtx, bool); extern void arc_secondary_reload_conv (rtx, rtx, rtx, bool);
extern void arc_cpu_cpp_builtins (cpp_reader *); extern void arc_cpu_cpp_builtins (cpp_reader *);
extern bool arc_store_addr_hazard_p (rtx_insn *, rtx_insn *); extern bool arc_store_addr_hazard_p (rtx_insn *, rtx_insn *);
extern rtx arc_eh_return_address_location (void); extern void arc_eh_return_address_location (rtx);
extern bool arc_is_jli_call_p (rtx); extern bool arc_is_jli_call_p (rtx);
extern void arc_file_end (void); extern void arc_file_end (void);
extern bool arc_is_secure_call_p (rtx); extern bool arc_is_secure_call_p (rtx);
...@@ -3947,10 +3947,13 @@ arc_check_multi (rtx op, bool push_p) ...@@ -3947,10 +3947,13 @@ arc_check_multi (rtx op, bool push_p)
/* Return rtx for the location of the return address on the stack, /* Return rtx for the location of the return address on the stack,
suitable for use in __builtin_eh_return. The new return address suitable for use in __builtin_eh_return. The new return address
will be written to this location in order to redirect the return to will be written to this location in order to redirect the return to
the exception handler. */ the exception handler. Our ABI says the blink is pushed first on
stack followed by an unknown number of register saves, and finally
by fp. Hence we cannot use the EH_RETURN_ADDRESS macro as the
stack is not finalized. */
rtx void
arc_eh_return_address_location (void) arc_eh_return_address_location (rtx source)
{ {
rtx mem; rtx mem;
int offset; int offset;
...@@ -3978,8 +3981,8 @@ arc_eh_return_address_location (void) ...@@ -3978,8 +3981,8 @@ arc_eh_return_address_location (void)
remove this store seems perfectly sensible. Marking the memory remove this store seems perfectly sensible. Marking the memory
address as volatile obviously has the effect of preventing DSE address as volatile obviously has the effect of preventing DSE
from removing the store. */ from removing the store. */
MEM_VOLATILE_P (mem) = 1; MEM_VOLATILE_P (mem) = true;
return mem; emit_move_insn (mem, source);
} }
/* PIC */ /* PIC */
......
...@@ -1391,8 +1391,6 @@ do { \ ...@@ -1391,8 +1391,6 @@ do { \
#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 2) #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 2)
#define EH_RETURN_HANDLER_RTX arc_eh_return_address_location ()
/* Turn off splitting of long stabs. */ /* Turn off splitting of long stabs. */
#define DBX_CONTIN_LENGTH 0 #define DBX_CONTIN_LENGTH 0
......
...@@ -163,6 +163,7 @@ ...@@ -163,6 +163,7 @@
VUNSPEC_ARC_SC VUNSPEC_ARC_SC
VUNSPEC_ARC_LL VUNSPEC_ARC_LL
VUNSPEC_ARC_BLOCKAGE VUNSPEC_ARC_BLOCKAGE
VUNSPEC_ARC_EH_RETURN
]) ])
(define_constants (define_constants
...@@ -6608,6 +6609,20 @@ core_3, archs4x, archs4xd, archs4xd_slow" ...@@ -6608,6 +6609,20 @@ core_3, archs4x, archs4xd, archs4xd_slow"
[(set_attr "type" "call_no_delay_slot") [(set_attr "type" "call_no_delay_slot")
(set_attr "length" "2")]) (set_attr "length" "2")])
;; Patterns for exception handling
(define_insn_and_split "eh_return"
[(unspec_volatile [(match_operand:SI 0 "register_operand" "r")]
VUNSPEC_ARC_EH_RETURN)]
""
"#"
"reload_completed"
[(const_int 0)]
"
{
arc_eh_return_address_location (operands[0]);
DONE;
}"
)
;; include the arc-FPX instructions ;; include the arc-FPX instructions
(include "fpx.md") (include "fpx.md")
......
2018-11-13 Claudiu Zissulescu <claziss@synopsys.com> 2018-11-13 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/builtin_eh.c: New test.
2018-11-13 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/firq-1.c: Update test. * gcc.target/arc/firq-1.c: Update test.
* gcc.target/arc/firq-3.c: Likewise. * gcc.target/arc/firq-3.c: Likewise.
* gcc.target/arc/firq-4.c: Likewise. * gcc.target/arc/firq-4.c: Likewise.
......
/* Check if we have the right offset for @bar function. */
/* { dg-options "-O1" } */
void bar (void);
void
foo (int x)
{
__builtin_unwind_init ();
__builtin_eh_return (x, bar);
}
/* { dg-final { scan-assembler "r24" } } */
/* { dg-final { scan-assembler "r22" } } */
/* { dg-final { scan-assembler "r20" } } */
/* { dg-final { scan-assembler "r18" } } */
/* { dg-final { scan-assembler "r16" } } */
/* { dg-final { scan-assembler "r14" } } */
/* { dg-final { scan-assembler "r13" } } */
/* { dg-final { scan-assembler "r0" } } */
/* { dg-final { scan-assembler "fp" } } */
/* { dg-final { scan-assembler "fp,64" } } */
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