Commit 3f529c2c by Uros Bizjak

i386.md (*ashlqi3_1_slp): New insn pattern.

	* config/i386/i386.md (*ashlqi3_1_slp): New insn pattern.

From-SVN: r158293
parent 64f002ed
2010-04-14 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (*ashlqi3_1_slp): New insn pattern.
2010-04-13 Jan Hubicka <jh@suse.cz> 2010-04-13 Jan Hubicka <jh@suse.cz>
* ipa-inline.c (cgraph_mark_inline_edge): Avoid double accounting * ipa-inline.c (cgraph_mark_inline_edge): Avoid double accounting
...@@ -53,11 +57,9 @@ ...@@ -53,11 +57,9 @@
* Makefile.in (c-pch.o, ggc-common.o): Depend on timevar.h. * Makefile.in (c-pch.o, ggc-common.o): Depend on timevar.h.
* c-pch.c: Include timevar.h. * c-pch.c: Include timevar.h.
(c_common_write_pch): Use TV_PCH_SAVE and TV_PCH_CPP_SAVE timers. (c_common_write_pch): Use TV_PCH_SAVE and TV_PCH_CPP_SAVE timers.
(c_common_read_pch): Use TV_PCH_RESTORE and TV_PCH_CPP_RESTORE (c_common_read_pch): Use TV_PCH_RESTORE and TV_PCH_CPP_RESTORE timers.
timers.
* ggc-common.c: Include timevar.h. * ggc-common.c: Include timevar.h.
(gt_pch_save): Use TV_PCH_PTR_REALLOC and TV_PCH_PTR_SORT (gt_pch_save): Use TV_PCH_PTR_REALLOC and TV_PCH_PTR_SORT timers.
timers.
* timevar.def (TV_PCH_SAVE): Define. * timevar.def (TV_PCH_SAVE): Define.
(TV_PCH_CPP_SAVE): Define. (TV_PCH_CPP_SAVE): Define.
(TV_PCH_PTR_REALLOC): Define. (TV_PCH_PTR_REALLOC): Define.
......
...@@ -9986,6 +9986,50 @@ ...@@ -9986,6 +9986,50 @@
(const_string "*"))) (const_string "*")))
(set_attr "mode" "QI,SI,SI")]) (set_attr "mode" "QI,SI,SI")])
(define_insn "*ashlqi3_1_slp"
[(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm"))
(ashift:QI (match_dup 0)
(match_operand:QI 1 "nonmemory_operand" "cI")))
(clobber (reg:CC FLAGS_REG))]
"(optimize_function_for_size_p (cfun)
|| !TARGET_PARTIAL_FLAG_REG_STALL
|| (operands[1] == const1_rtx
&& (TARGET_SHIFT1
|| (TARGET_DOUBLE_WITH_ADD && REG_P (operands[0])))))"
{
switch (get_attr_type (insn))
{
case TYPE_ALU:
gcc_assert (operands[1] == const1_rtx);
return "add{b}\t%0, %0";
default:
if (operands[1] == const1_rtx
&& (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)))
return "sal{b}\t%0";
else
return "sal{b}\t{%1, %0|%0, %1}";
}
}
[(set (attr "type")
(cond [(and (and (ne (symbol_ref "TARGET_DOUBLE_WITH_ADD")
(const_int 0))
(match_operand 0 "register_operand" ""))
(match_operand 1 "const1_operand" ""))
(const_string "alu")
]
(const_string "ishift1")))
(set (attr "length_immediate")
(if_then_else
(ior (eq_attr "type" "alu")
(and (eq_attr "type" "ishift1")
(and (match_operand 1 "const1_operand" "")
(ne (symbol_ref "TARGET_SHIFT1 || optimize_function_for_size_p (cfun)")
(const_int 0)))))
(const_string "0")
(const_string "*")))
(set_attr "mode" "QI")])
;; Convert lea to the lea pattern to avoid flags dependency. ;; Convert lea to the lea pattern to avoid flags dependency.
(define_split (define_split
[(set (match_operand:DI 0 "register_operand" "") [(set (match_operand:DI 0 "register_operand" "")
......
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