t-msp430 (MULTILIB_DIRNAMES): Remove trailing slashes.

* config/msp430/t-msp430 (MULTILIB_DIRNAMES): Remove trailing
slashes.

* config/msp430/msp430.md (ashlhi3): Optimize shifts of subregs.
(ashrhi3): Likewise.
(lshrhi3): Likewise.
(movhi): Take advantage of zero-extend to load small constants.
(movpsi): Likewise.
(and<mode>3): Likewise.
(zero_extendqihi2): Likewise.
(zero_extendqisi2): New.
* config/msp430/constraints.md (N,O): New.
* config/msp430/msp430.h (WORD_REGISTER_OPERATIONS): Define.

From-SVN: r226085

gcc/ChangeLog

+2015-07-22  DJ Delorie  <dj@redhat.com>
+
+	* config/msp430/t-msp430 (MULTILIB_DIRNAMES): Remove trailing
+	slashes.
+
+	* config/msp430/msp430.md (ashlhi3): Optimize shifts of subregs.
+	(ashrhi3): Likewise.
+	(lshrhi3): Likewise.
+	(movhi): Take advantage of zero-extend to load small constants.
+	(movpsi): Likewise.
+	(and<mode>3): Likewise.
+	(zero_extendqihi2): Likewise.
+	(zero_extendqisi2): New.
+	* config/msp430/constraints.md (N,O): New.
+	* config/msp430/msp430.h (WORD_REGISTER_OPERATIONS): Define.
+
 2015-07-22  Uros Bizjak  <ubizjak@gmail.com>
 
 	PR target/66954

gcc/config/msp430/constraints.md

@@ -39,6 +39,16 @@
   (and (match_code "const_int")
        (match_test "IN_RANGE (ival, 1, 4)")))
 
+(define_constraint "N"
+  "Integer constant 0-255."
+  (and (match_code "const_int")
+       (match_test "IN_RANGE (ival, 0, 255)")))
+
+(define_constraint "O"
+  "Integer constant 256-65535."
+  (and (match_code "const_int")
+       (match_test "IN_RANGE (ival, 256, 65535)")))
+
 ;; We do not allow arbitrary constants, eg symbols or labels,
 ;; because their address may be above the 16-bit address limit
 ;; supported by the offset used in the MOVA instruction.

gcc/config/msp430/msp430.h

@@ -166,7 +166,7 @@ extern bool msp430x;
 #define HAS_LONG_UNCOND_BRANCH		0
 
 #define LOAD_EXTEND_OP(M)		ZERO_EXTEND
-/*#define WORD_REGISTER_OPERATIONS	1*/
+#define WORD_REGISTER_OPERATIONS	1
 
 #define MOVE_MAX 			8
 #define STARTING_FRAME_OFFSET		0

gcc/config/msp430/msp430.md

@@ -199,10 +199,11 @@
 )
 
 (define_insn "movhi"
-  [(set (match_operand:HI 0 "msp_nonimmediate_operand" "=rYs,rm")
-	(match_operand:HI 1 "msp_general_operand" "riYs,rmi"))]
+  [(set (match_operand:HI 0 "msp_nonimmediate_operand" "=r,rYs,rm")
+	(match_operand:HI 1 "msp_general_operand" "N,riYs,rmi"))]
   ""
   "@
+  MOV.B\t%1, %0
   MOV.W\t%1, %0
   MOV%X0.W\t%1, %0"
 )
@@ -242,10 +243,12 @@
 
 ;; Some MOVX.A cases can be done with MOVA, this is only a few of them.
 (define_insn "movpsi"
-  [(set (match_operand:PSI 0 "msp_nonimmediate_operand" "=r,Ya,rm")
-	(match_operand:PSI 1 "msp_general_operand" "riYa,r,rmi"))]
+  [(set (match_operand:PSI 0 "msp_nonimmediate_operand" "=r,r,r,Ya,rm")
+	(match_operand:PSI 1 "msp_general_operand" "N,O,riYa,r,rmi"))]
   ""
   "@
+  MOV.B\t%1, %0
+  MOV.W\t%1, %0
   MOVA\t%1, %0
   MOVA\t%1, %0
   MOVX.A\t%1, %0")
@@ -500,11 +503,12 @@
 )
 
 (define_insn "and<mode>3"
-  [(set (match_operand:QHI 0 "msp_nonimmediate_operand" "=rYs,rm")
-	(and:QHI (match_operand:QHI 1 "msp_nonimmediate_operand" "%0,0")
-		 (match_operand:QHI 2 "msp_general_operand" "riYs,rmi")))]
+  [(set (match_operand:QHI 0 "msp_nonimmediate_operand" "=r,rYs,rm")
+	(and:QHI (match_operand:QHI 1 "msp_nonimmediate_operand" "%0,0,0")
+		 (match_operand:QHI 2 "msp_general_operand" "N,riYs,rmi")))]
   ""
   "@
+   AND%x0.B\t%2, %0
    AND%x0%b0\t%2, %0
    AND%X0%b0\t%2, %0"
 )
@@ -549,11 +553,13 @@
 )
 
 (define_insn "zero_extendqihi2"
-  [(set (match_operand:HI                 0 "msp_nonimmediate_operand" "=rYs,m")
-	(zero_extend:HI (match_operand:QI 1 "msp_nonimmediate_operand" "0,0")))]
+  [(set (match_operand:HI                 0 "msp_nonimmediate_operand" "=rYs,r,r,m")
+	(zero_extend:HI (match_operand:QI 1 "msp_nonimmediate_operand" "0,rYs,m,0")))]
   ""
   "@
    AND\t#0xff, %0
+   MOV.B\t%1, %0
+   MOV%X0.B\t%1, %0
    AND%X0\t#0xff, %0"
 )
 
@@ -602,6 +608,14 @@
 ;; to missing patterns, despite us not having opcodes for these
 ;; patterns.  Doing these manually allows for alternate optimization
 ;; paths.
+
+(define_insn "zero_extendqisi2"
+  [(set (match_operand:SI 0 "nonimmediate_operand" "=r")
+	(zero_extend:SI (subreg:HI (match_operand:QI 1 "nonimmediate_operand" "rm") 0)))]
+  "msp430x"
+  "MOV.B\t%1,%L0 { CLR\t%H0"
+)
+
 (define_insn "zero_extendhisi2"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
 	(zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "0,r")))]
@@ -734,6 +748,9 @@
 		   (match_operand:HI 2 "general_operand")))]
   ""
   {
+    if (GET_CODE (operands[1]) == SUBREG
+        && REG_P (XEXP (operands[1], 0)))
+      operands[1] = force_reg (HImode, operands[1]);
     if (msp430x
         && REG_P (operands[0])
         && REG_P (operands[1])
@@ -800,6 +817,9 @@
 		     (match_operand:HI 2 "general_operand")))]
   ""
   {
+    if (GET_CODE (operands[1]) == SUBREG
+        && REG_P (XEXP (operands[1], 0)))
+      operands[1] = force_reg (HImode, operands[1]);
     if (msp430x
         && REG_P (operands[0])
         && REG_P (operands[1])
@@ -882,6 +902,9 @@
 		     (match_operand:HI 2 "general_operand")))]
   ""
   {
+    if (GET_CODE (operands[1]) == SUBREG
+        && REG_P (XEXP (operands[1], 0)))
+      operands[1] = force_reg (HImode, operands[1]);
     if (msp430x
         && REG_P (operands[0])
         && REG_P (operands[1])

gcc/config/msp430/t-msp430

@@ -255,7 +255,7 @@ MULTILIB_EXCEPTIONS = mcpu=msp430/mlarge
 # Multilibs for different types of hardware multiply support:
 
 MULTILIB_OPTIONS   += mhwmult=none/mhwmult=32bit/mhwmult=f5series
-MULTILIB_DIRNAMES  +=        nomul/        32mul/        f5mul
+MULTILIB_DIRNAMES  +=        nomul         32mul         f5mul
 
 MULTILIB_EXCEPTIONS += mcpu=msp430/mlarge/mhwmult=none
 MULTILIB_EXCEPTIONS += mcpu=msp430/mlarge/mhwmult=32bit