[AArch64] Use neon_dot_q type for 128-bit [US]DOT instructions where appropriate

For the Dot Product instructions we have the scheduling types neon_dot and neon_dot_q for the 128-bit versions.
It seems that we're only using the former though, not assigning the neon_dot_q type anywhere.

This patch fixes that by adding the <q> mode attribute suffix to the type, similar to how we do it for other
types in aarch64-simd.md.

	* config/aarch64/aarch64-simd.md (aarch64_<sur>dot<vsi2qi>):
	Use neon_dot<q> for type.
	(aarch64_<sur>dot_lane<vsi2qi>): Likewise.
	(aarch64_<sur>dot_laneq<vsi2qi>): Likewise.

From-SVN: r268610

gcc/ChangeLog

+2019-02-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* config/aarch64/aarch64-simd.md (aarch64_<sur>dot<vsi2qi>):
+	Use neon_dot<q> for type.
+	(aarch64_<sur>dot_lane<vsi2qi>): Likewise.
+	(aarch64_<sur>dot_laneq<vsi2qi>): Likewise.
+
 2019-02-06  Vladimir Makarov  <vmakarov@redhat.com>
 
 	PR rtl-optimization/89225

gcc/config/aarch64/aarch64-simd.md

@@ -503,7 +503,7 @@
 		DOTPROD)))]
   "TARGET_DOTPROD"
   "<sur>dot\\t%0.<Vtype>, %2.<Vdottype>, %3.<Vdottype>"
-  [(set_attr "type" "neon_dot")]
+  [(set_attr "type" "neon_dot<q>")]
 )
 
 ;; These expands map to the Dot Product optab the vectorizer checks for.
@@ -555,7 +555,7 @@
     operands[4] = aarch64_endian_lane_rtx (V8QImode, INTVAL (operands[4]));
     return "<sur>dot\\t%0.<Vtype>, %2.<Vdottype>, %3.4b[%4]";
   }
-  [(set_attr "type" "neon_dot")]
+  [(set_attr "type" "neon_dot<q>")]
 )
 
 (define_insn "aarch64_<sur>dot_laneq<vsi2qi>"
@@ -570,7 +570,7 @@
     operands[4] = aarch64_endian_lane_rtx (V16QImode, INTVAL (operands[4]));
     return "<sur>dot\\t%0.<Vtype>, %2.<Vdottype>, %3.4b[%4]";
   }
-  [(set_attr "type" "neon_dot")]
+  [(set_attr "type" "neon_dot<q>")]
 )
 
 (define_expand "copysign<mode>3"