Commit 3e009bf0 by Uros Bizjak

sched-deps.c (sched_analyze_2): Also force pending loads from memory.

	* sched-deps.c (sched_analyze_2) <case TRAP_IF>: Also
	force pending loads from memory.

From-SVN: r236481
parent 4f45da44
2016-05-19 Uros Bizjak <ubizjak@gmail.com>
* sched-deps.c (sched_analyze_2) <case TRAP_IF>: Also
force pending loads from memory.
2016-05-19 Kelvin Nilsen <kelvin@gcc.gnu.org> 2016-05-19 Kelvin Nilsen <kelvin@gcc.gnu.org>
* config/rs6000/altivec.md (UNSPEC_DARN): New unspec constant. * config/rs6000/altivec.md (UNSPEC_DARN): New unspec constant.
...@@ -97,8 +102,7 @@ ...@@ -97,8 +102,7 @@
2016-05-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 2016-05-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.c (arm_new_rtx_costs, SIGN_EXTEND case): * config/arm/arm.c (arm_new_rtx_costs, SIGN_EXTEND case):
Don't add cost of inner memory when handling sign-extended Don't add cost of inner memory when handling sign-extended loads.
loads.
2016-05-19 Ilya Enkovich <ilya.enkovich@intel.com> 2016-05-19 Ilya Enkovich <ilya.enkovich@intel.com>
......
...@@ -2709,9 +2709,12 @@ sched_analyze_2 (struct deps_desc *deps, rtx x, rtx_insn *insn) ...@@ -2709,9 +2709,12 @@ sched_analyze_2 (struct deps_desc *deps, rtx x, rtx_insn *insn)
return; return;
} }
/* Force pending stores to memory in case a trap handler needs them. */ /* Force pending stores to memory in case a trap handler needs them.
Also force pending loads from memory; loads and stores can segfault
and the signal handler won't be triggered if the trap insn was moved
above load or store insn. */
case TRAP_IF: case TRAP_IF:
flush_pending_lists (deps, insn, true, false); flush_pending_lists (deps, insn, true, true);
break; break;
case PREFETCH: case PREFETCH:
......
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