Commit 3db11b5c by Kazu Hirata Committed by Kazu Hirata

fixunssfsi.c: Replace H8/S with H8S.

	* config/h8300/fixunssfsi.c: Replace H8/S with H8S.
	* config/h8300/h8300.c: Likewise.
	* config/h8300/h8300.h: Likewise.
	* config/h8300/h8300.md: Likewise.
	* doc/invoke.texi: Likewise.

From-SVN: r57118
parent b6894857
2002-09-13 Kazu Hirata <kazu@cs.umass.edu> 2002-09-13 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/fixunssfsi.c: Replace H8/S with H8S.
* config/h8300/h8300.c: Likewise.
* config/h8300/h8300.h: Likewise.
* config/h8300/h8300.md: Likewise.
* doc/invoke.texi: Likewise.
2002-09-13 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300.c (h8300_init_once): Fix formatting. * config/h8300/h8300.c (h8300_init_once): Fix formatting.
2002-09-13 Matt Austern <austern@apple.com> 2002-09-13 Matt Austern <austern@apple.com>
......
...@@ -30,7 +30,7 @@ Boston, MA 02111-1307, USA. */ ...@@ -30,7 +30,7 @@ Boston, MA 02111-1307, USA. */
/* The libgcc2.c implementation gets confused by our type setup and creates /* The libgcc2.c implementation gets confused by our type setup and creates
a directly recursive call, so we do our own implementation. For a directly recursive call, so we do our own implementation. For
the H8/300, that's in lib1funcs.asm, for H8/300H and H8/S, it's here. */ the H8/300, that's in lib1funcs.asm, for H8/300H and H8S, it's here. */
#ifndef __H8300__ #ifndef __H8300__
long long
......
...@@ -301,7 +301,7 @@ h8300_init_once () ...@@ -301,7 +301,7 @@ h8300_init_once ()
} }
else else
{ {
/* For this we treat the H8/300H and H8/S the same. */ /* For this we treat the H8/300H and H8S the same. */
cpu_type = (int) CPU_H8300H; cpu_type = (int) CPU_H8300H;
h8_reg_names = names_extended; h8_reg_names = names_extended;
} }
...@@ -392,7 +392,7 @@ dosize (file, op, size) ...@@ -392,7 +392,7 @@ dosize (file, op, size)
const char *op; const char *op;
unsigned int size; unsigned int size;
{ {
/* On the H8/300H and H8/S, for sizes <= 8 bytes, it is as good or /* On the H8/300H and H8S, for sizes <= 8 bytes, it is as good or
better to use adds/subs insns rather than add.l/sub.l with an better to use adds/subs insns rather than add.l/sub.l with an
immediate value. immediate value.
...@@ -2036,7 +2036,7 @@ compute_logical_op_cc (mode, operands) ...@@ -2036,7 +2036,7 @@ compute_logical_op_cc (mode, operands)
We devote a fair bit of code to getting efficient shifts since we We devote a fair bit of code to getting efficient shifts since we
can only shift one bit at a time on the H8/300 and H8/300H and only can only shift one bit at a time on the H8/300 and H8/300H and only
one or two bits at a time on the H8/S. one or two bits at a time on the H8S.
All shift code falls into one of the following ways of All shift code falls into one of the following ways of
implementation: implementation:
...@@ -2055,7 +2055,7 @@ compute_logical_op_cc (mode, operands) ...@@ -2055,7 +2055,7 @@ compute_logical_op_cc (mode, operands)
16. This case also includes other oddballs that are not worth 16. This case also includes other oddballs that are not worth
explaning here. explaning here.
o SHIFT_LOOP: Emit a loop using one (or two on H8/S) bit shifts. o SHIFT_LOOP: Emit a loop using one (or two on H8S) bit shifts.
Here are some thoughts on what the absolutely positively best code Here are some thoughts on what the absolutely positively best code
is. "Best" here means some rational trade-off between code size is. "Best" here means some rational trade-off between code size
...@@ -2120,15 +2120,15 @@ compute_logical_op_cc (mode, operands) ...@@ -2120,15 +2120,15 @@ compute_logical_op_cc (mode, operands)
do 24 bit shift, inline rest do 24 bit shift, inline rest
31 - shll, subx byte 0, sign extend byte 0, sign extend word 0 31 - shll, subx byte 0, sign extend byte 0, sign extend word 0
H8/S QImode shifts H8S QImode shifts
7 - ASHIFTRT: shll, subx (propagate carry bit to all bits) 7 - ASHIFTRT: shll, subx (propagate carry bit to all bits)
H8/S HImode shifts H8S HImode shifts
8 - move byte, zero (ASHIFT | LSHIFTRT) or sign extend other (ASHIFTRT) 8 - move byte, zero (ASHIFT | LSHIFTRT) or sign extend other (ASHIFTRT)
9-12 - do shift by 8, inline remaining shifts 9-12 - do shift by 8, inline remaining shifts
15 - ASHIFTRT: shll, subx, set other byte 15 - ASHIFTRT: shll, subx, set other byte
H8/S SImode shifts H8S SImode shifts
(These are complicated by the fact that we don't have byte level access to (These are complicated by the fact that we don't have byte level access to
the top word.) the top word.)
A word is: bytes 3,2,1,0 (msb -> lsb), word 1,0 (msw -> lsw) A word is: bytes 3,2,1,0 (msb -> lsb), word 1,0 (msw -> lsw)
...@@ -2812,7 +2812,7 @@ h8300_shift_needs_scratch_p (count, mode) ...@@ -2812,7 +2812,7 @@ h8300_shift_needs_scratch_p (count, mode)
abort (); abort ();
} }
/* On H8/300H and H8/S, count == 8 uses the scratch register. */ /* On H8/300H and H8S, count == 8 uses the scratch register. */
return (a == SHIFT_LOOP || lr == SHIFT_LOOP || ar == SHIFT_LOOP return (a == SHIFT_LOOP || lr == SHIFT_LOOP || ar == SHIFT_LOOP
|| (!TARGET_H8300 && mode == SImode && count == 8)); || (!TARGET_H8300 && mode == SImode && count == 8));
} }
...@@ -3304,7 +3304,7 @@ emit_a_rotate (code, operands) ...@@ -3304,7 +3304,7 @@ emit_a_rotate (code, operands)
break; break;
case SImode: case SImode:
/* This code works on the H8/300H and H8/S. */ /* This code works on the H8/300H and H8S. */
insn_buf = "xor.w\t%e0,%f0\n\txor.w\t%f0,%e0\n\txor.w\t%e0,%f0"; insn_buf = "xor.w\t%e0,%f0\n\txor.w\t%f0,%e0\n\txor.w\t%e0,%f0";
output_asm_insn (insn_buf, operands); output_asm_insn (insn_buf, operands);
break; break;
...@@ -3728,7 +3728,7 @@ h8300_adjust_insn_length (insn, length) ...@@ -3728,7 +3728,7 @@ h8300_adjust_insn_length (insn, length)
} }
else else
{ {
/* On the H8/300H and H8/S, we subtract the difference /* On the H8/300H and H8S, we subtract the difference
between the actual length and the longest one, which is between the actual length and the longest one, which is
@(d:24,ERs). */ @(d:24,ERs). */
...@@ -3837,7 +3837,7 @@ h8300_adjust_insn_length (insn, length) ...@@ -3837,7 +3837,7 @@ h8300_adjust_insn_length (insn, length)
states += 6; states += 6;
} }
/* We use 2-bit rotatations on the H8/S. */ /* We use 2-bit rotatations on the H8S. */
if (TARGET_H8300S) if (TARGET_H8300S)
amount = amount / 2 + amount % 2; amount = amount / 2 + amount % 2;
......
...@@ -115,10 +115,10 @@ extern int target_flags; ...@@ -115,10 +115,10 @@ extern int target_flags;
An empty string NAME is used to identify the default VALUE. */ An empty string NAME is used to identify the default VALUE. */
#define TARGET_SWITCHES \ #define TARGET_SWITCHES \
{ {"s", 1, N_("Generate H8/S code")}, \ { {"s", 1, N_("Generate H8S code")}, \
{"no-s", -1, N_("Do not generate H8/S code")}, \ {"no-s", -1, N_("Do not generate H8S code")}, \
{"s2600", 2, N_("Generate H8/S2600 code")}, \ {"s2600", 2, N_("Generate H8S/2600 code")}, \
{"no-s2600", -2, N_("Do not generate H8/S2600 code")}, \ {"no-s2600", -2, N_("Do not generate H8S/2600 code")}, \
{"int32", 8, N_("Make integers 32 bits wide")}, \ {"int32", 8, N_("Make integers 32 bits wide")}, \
{"addresses", 64, NULL}, \ {"addresses", 64, NULL}, \
{"quickcall", 128, \ {"quickcall", 128, \
...@@ -228,7 +228,7 @@ extern int target_flags; ...@@ -228,7 +228,7 @@ extern int target_flags;
#define PCC_BITFIELD_TYPE_MATTERS 0 #define PCC_BITFIELD_TYPE_MATTERS 0
/* No data type wants to be aligned rounder than this. /* No data type wants to be aligned rounder than this.
32 bit values are aligned as such on the H8/300H and H8/S for speed. */ 32 bit values are aligned as such on the H8/300H and H8S for speed. */
#define BIGGEST_ALIGNMENT \ #define BIGGEST_ALIGNMENT \
(((TARGET_H8300H || TARGET_H8300S) && ! TARGET_ALIGN_300) ? 32 : 16) (((TARGET_H8300H || TARGET_H8300S) && ! TARGET_ALIGN_300) ? 32 : 16)
...@@ -835,7 +835,7 @@ struct cum_arg ...@@ -835,7 +835,7 @@ struct cum_arg
&& (INTVAL (X) & 0x0000FFFF) <= 0xffff))) && (INTVAL (X) & 0x0000FFFF) <= 0xffff)))
/* Nonzero if X is a constant address suitable as an 16-bit absolute /* Nonzero if X is a constant address suitable as an 16-bit absolute
on H8/300H and H8/S. */ on H8/300H and H8S. */
#define TINY_CONSTANT_ADDRESS_P(X) \ #define TINY_CONSTANT_ADDRESS_P(X) \
((GET_CODE (X) == CONST_INT) \ ((GET_CODE (X) == CONST_INT) \
...@@ -851,7 +851,7 @@ struct cum_arg ...@@ -851,7 +851,7 @@ struct cum_arg
i.e. a register, register indirect, or the eightbit memory region i.e. a register, register indirect, or the eightbit memory region
(a SYMBOL_REF with an SYMBOL_REF_FLAG set). (a SYMBOL_REF with an SYMBOL_REF_FLAG set).
On the H8/S 'U' can also be a 16bit or 32bit absolute. */ On the H8S 'U' can also be a 16bit or 32bit absolute. */
#define OK_FOR_U(OP) \ #define OK_FOR_U(OP) \
((GET_CODE (OP) == REG && REG_OK_FOR_BASE_P (OP)) \ ((GET_CODE (OP) == REG && REG_OK_FOR_BASE_P (OP)) \
|| (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \ || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \
......
...@@ -28,7 +28,7 @@ ...@@ -28,7 +28,7 @@
;; "worst case" and then be adjusted to their correct values by ;; "worst case" and then be adjusted to their correct values by
;; h8300_adjust_insn_length. ;; h8300_adjust_insn_length.
;; On the H8/300H and H8/S, adds/subs operate on the 32bit "er" ;; On the H8/300H and H8S, adds/subs operate on the 32bit "er"
;; registers. Right now GCC doesn't expose the "e" half to the ;; registers. Right now GCC doesn't expose the "e" half to the
;; compiler, so using add/subs for addhi and subhi is safe. Long ;; compiler, so using add/subs for addhi and subhi is safe. Long
;; term, we want to expose the "e" half to the compiler (gives us 8 ;; term, we want to expose the "e" half to the compiler (gives us 8
...@@ -1529,7 +1529,7 @@ ...@@ -1529,7 +1529,7 @@
;; Call subroutine with no return value. ;; Call subroutine with no return value.
;; ??? Even though we use HImode here, this works on the H8/300H and H8/S. ;; ??? Even though we use HImode here, this works on the H8/300H and H8S.
(define_insn "call" (define_insn "call"
[(call (match_operand:QI 0 "call_insn_operand" "or") [(call (match_operand:QI 0 "call_insn_operand" "or")
...@@ -1552,7 +1552,7 @@ ...@@ -1552,7 +1552,7 @@
;; Call subroutine, returning value in operand 0 ;; Call subroutine, returning value in operand 0
;; (which must be a hard register). ;; (which must be a hard register).
;; ??? Even though we use HImode here, this works on the H8/300H and H8/S. ;; ??? Even though we use HImode here, this works on the H8/300H and H8S.
(define_insn "call_value" (define_insn "call_value"
[(set (match_operand 0 "" "=r") [(set (match_operand 0 "" "=r")
......
...@@ -8381,11 +8381,11 @@ Generate code for the H8/300H@. ...@@ -8381,11 +8381,11 @@ Generate code for the H8/300H@.
@item -ms @item -ms
@opindex ms @opindex ms
Generate code for the H8/S@. Generate code for the H8S@.
@item -ms2600 @item -ms2600
@opindex ms2600 @opindex ms2600
Generate code for the H8/S2600. This switch must be used with @option{-ms}. Generate code for the H8S/2600. This switch must be used with @option{-ms}.
@item -mint32 @item -mint32
@opindex mint32 @opindex mint32
...@@ -8393,8 +8393,8 @@ Make @code{int} data 32 bits by default. ...@@ -8393,8 +8393,8 @@ Make @code{int} data 32 bits by default.
@item -malign-300 @item -malign-300
@opindex malign-300 @opindex malign-300
On the H8/300H and H8/S, use the same alignment rules as for the H8/300. On the H8/300H and H8S, use the same alignment rules as for the H8/300.
The default for the H8/300H and H8/S is to align longs and floats on 4 The default for the H8/300H and H8S is to align longs and floats on 4
byte boundaries. byte boundaries.
@option{-malign-300} causes them to be aligned on 2 byte boundaries. @option{-malign-300} causes them to be aligned on 2 byte boundaries.
This option has no effect on the H8/300. This option has no effect on the H8/300.
......
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