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riscv-gcc-1
Commit 3b4b85c9 by Bernardo Innocenti Committed by Bernardo Innocenti
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m68k.c, m68k.md (SGS, [...]): Remove code to support SGS assembler. 

	* config/m68k/m68k.c, config/m68k/m68k.md (SGS, SGS_CMP_ORDER): Remove
	code to support SGS assembler.  Reformat adjacent code where possible.
	* config/m68k/m68k.c (switch_table_difference_label_flag): Remove definition.
	* config/m68k/m68k.h (PRINT_OPERAND_PUNCT_VALID_P): Remove support for '%#'.
	* config/m68k/linux.h, config/m68k/m68k.c,
	* config/m68k/math-68881.h: Replace `%#' with `#' in inline asm macros and
	asm_printf() format strings.
	* config/m68k/m68kelf.h (ASM_OUTPUT_CASE_END): Remove macro definition.
	* config/m68k/linux.h: Update copyright.
	* config/m68k/linux.h, config/m68k/m68k.c: Remove traling whitespace.

From-SVN: r77518
parent 413b5912
Showing with 189 additions and 460 deletions
gcc/ChangeLog
2004-02-08 Bernardo Innocenti <bernie@develer.com>
* config/m68k/m68k.c, config/m68k/m68k.md (SGS, SGS_CMP_ORDER): Remove
code to support SGS assembler. Reformat adjacent code where possible.
* config/m68k/m68k.c (switch_table_difference_label_flag): Remove definition.
* config/m68k/m68k.h (PRINT_OPERAND_PUNCT_VALID_P): Remove support for '%#'.
* config/m68k/linux.h, config/m68k/m68k.c,
* config/m68k/math-68881.h: Replace `%#' with `#' in inline asm macros and
asm_printf() format strings.
* config/m68k/m68kelf.h (ASM_OUTPUT_CASE_END): Remove macro definition.
* config/m68k/linux.h: Update copyright.
* config/m68k/linux.h, config/m68k/m68k.c: Remove traling whitespace.
2004-02-08 Andreas Schwab <schwab@suse.de> 2004-02-08 Andreas Schwab <schwab@suse.de>
Bernardo Innocenti <bernie@develer.com> Bernardo Innocenti <bernie@develer.com>
......
gcc/config/m68k/linux.h
/* Definitions for Motorola 68k running Linux-based GNU systems with /* Definitions for Motorola 68k running Linux-based GNU systems with
ELF format. ELF format.
Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2002, 2003, 2004 Free Software Foundation, Inc. Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2002, 2003, 2004
Free Software Foundation, Inc.
This file is part of GCC. This file is part of GCC.
...@@ -27,7 +28,7 @@ Boston, MA 02111-1307, USA. */ ...@@ -27,7 +28,7 @@ Boston, MA 02111-1307, USA. */
/* for 68k machines this only needs to be TRUE for the 68000 */ /* for 68k machines this only needs to be TRUE for the 68000 */
#undef STRICT_ALIGNMENT #undef STRICT_ALIGNMENT
#define STRICT_ALIGNMENT 0 #define STRICT_ALIGNMENT 0
#undef SUBTARGET_SWITCHES #undef SUBTARGET_SWITCHES
...@@ -61,13 +62,13 @@ Boston, MA 02111-1307, USA. */ ...@@ -61,13 +62,13 @@ Boston, MA 02111-1307, USA. */
#undef SIZE_TYPE #undef SIZE_TYPE
#define SIZE_TYPE "unsigned int" #define SIZE_TYPE "unsigned int"
#undef PTRDIFF_TYPE #undef PTRDIFF_TYPE
#define PTRDIFF_TYPE "int" #define PTRDIFF_TYPE "int"
#undef WCHAR_TYPE #undef WCHAR_TYPE
#define WCHAR_TYPE "long int" #define WCHAR_TYPE "long int"
#undef WCHAR_TYPE_SIZE #undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE BITS_PER_WORD #define WCHAR_TYPE_SIZE BITS_PER_WORD
...@@ -218,7 +219,7 @@ Boston, MA 02111-1307, USA. */ ...@@ -218,7 +219,7 @@ Boston, MA 02111-1307, USA. */
the precise function being called is known, FUNC is its the precise function being called is known, FUNC is its
FUNCTION_DECL; otherwise, FUNC is 0. For m68k/SVR4 generate the FUNCTION_DECL; otherwise, FUNC is 0. For m68k/SVR4 generate the
result in d0, a0, or fp0 as appropriate. */ result in d0, a0, or fp0 as appropriate. */
#undef FUNCTION_VALUE #undef FUNCTION_VALUE
#define FUNCTION_VALUE(VALTYPE, FUNC) \ #define FUNCTION_VALUE(VALTYPE, FUNC) \
(TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_68881 \ (TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_68881 \
...@@ -276,7 +277,7 @@ do { \ ...@@ -276,7 +277,7 @@ do { \
scope - the scope of the flush (see the cpush insn) scope - the scope of the flush (see the cpush insn)
cache - which cache to flush (see the cpush insn) cache - which cache to flush (see the cpush insn)
len - a factor relating to the number of flushes to perform: len - a factor relating to the number of flushes to perform:
len/16 lines, or len/4096 pages. */ len/16 lines, or len/4096 pages. */
#define CLEAR_INSN_CACHE(BEG, END) \ #define CLEAR_INSN_CACHE(BEG, END) \
{ \ { \
...@@ -284,10 +285,10 @@ do { \ ...@@ -284,10 +285,10 @@ do { \
unsigned long _end = (unsigned long) (END); \ unsigned long _end = (unsigned long) (END); \
register unsigned long _len __asm ("%d4") = (_end - _beg + 32); \ register unsigned long _len __asm ("%d4") = (_end - _beg + 32); \
__asm __volatile \ __asm __volatile \
("move%.l %#123, %/d0\n\t" /* system call nr */ \ ("move%.l #123, %/d0\n\t" /* system call nr */ \
"move%.l %#1, %/d2\n\t" /* clear lines */ \ "move%.l #1, %/d2\n\t" /* clear lines */ \
"move%.l %#3, %/d3\n\t" /* insn+data caches */ \ "move%.l #3, %/d3\n\t" /* insn+data caches */ \
"trap %#0" \ "trap #0" \
: /* no outputs */ \ : /* no outputs */ \
: "d" (_beg), "d" (_len) \ : "d" (_beg), "d" (_len) \
: "%d0", "%d2", "%d3"); \ : "%d0", "%d2", "%d3"); \
......
gcc/config/m68k/m68k.c
...@@ -91,10 +91,6 @@ struct m68k_frame ...@@ -91,10 +91,6 @@ struct m68k_frame
/* Current frame information calculated by m68k_compute_frame_layout(). */ /* Current frame information calculated by m68k_compute_frame_layout(). */
static struct m68k_frame current_frame; static struct m68k_frame current_frame;
/* This flag is used to communicate between movhi and ASM_OUTPUT_CASE_END,
if SGS_SWITCH_TABLE. */
int switch_table_difference_label_flag;
static rtx find_addr_reg (rtx); static rtx find_addr_reg (rtx);
static const char *singlemove_string (rtx *); static const char *singlemove_string (rtx *);
static void m68k_output_function_prologue (FILE *, HOST_WIDE_INT); static void m68k_output_function_prologue (FILE *, HOST_WIDE_INT);
...@@ -1127,8 +1123,8 @@ output_dbcc_and_branch (rtx *operands) ...@@ -1127,8 +1123,8 @@ output_dbcc_and_branch (rtx *operands)
{ {
case SImode: case SImode:
output_asm_insn (MOTOROLA ? output_asm_insn (MOTOROLA ?
"clr%.w %0\n\tsubq%.l %#1,%0\n\tjbpl %l1" : "clr%.w %0\n\tsubq%.l #1,%0\n\tjbpl %l1" :
"clr%.w %0\n\tsubq%.l %#1,%0\n\tjpl %l1", "clr%.w %0\n\tsubq%.l #1,%0\n\tjpl %l1",
operands); operands);
break; break;
...@@ -1176,18 +1172,10 @@ output_scc_di(rtx op, rtx operand1, rtx operand2, rtx dest) ...@@ -1176,18 +1172,10 @@ output_scc_di(rtx op, rtx operand1, rtx operand2, rtx dest)
loperands[4] = gen_label_rtx(); loperands[4] = gen_label_rtx();
if (operand2 != const0_rtx) if (operand2 != const0_rtx)
{ {
if (MOTOROLA) output_asm_insn (MOTOROLA ?
#ifdef SGS_CMP_ORDER "cmp%.l %2,%0\n\tjbne %l4\n\tcmp%.l %3,%1" :
output_asm_insn ("cmp%.l %0,%2\n\tjbne %l4\n\tcmp%.l %1,%3", loperands); "cmp%.l %2,%0\n\tjne %l4\n\tcmp%.l %3,%1",
#else loperands);
output_asm_insn ("cmp%.l %2,%0\n\tjbne %l4\n\tcmp%.l %3,%1", loperands);
#endif
else
#ifdef SGS_CMP_ORDER
output_asm_insn ("cmp%.l %0,%2\n\tjne %l4\n\tcmp%.l %1,%3", loperands);
#else
output_asm_insn ("cmp%.l %2,%0\n\tjne %l4\n\tcmp%.l %3,%1", loperands);
#endif
} }
else else
{ {
...@@ -1195,11 +1183,7 @@ output_scc_di(rtx op, rtx operand1, rtx operand2, rtx dest) ...@@ -1195,11 +1183,7 @@ output_scc_di(rtx op, rtx operand1, rtx operand2, rtx dest)
output_asm_insn ("tst%.l %0", loperands); output_asm_insn ("tst%.l %0", loperands);
else else
{ {
#ifdef SGS_CMP_ORDER output_asm_insn ("cmp%.w #0,%0", loperands);
output_asm_insn ("cmp%.w %0,%#0", loperands);
#else
output_asm_insn ("cmp%.w %#0,%0", loperands);
#endif
} }
output_asm_insn (MOTOROLA ? "jbne %l4" : "jne %l4", loperands); output_asm_insn (MOTOROLA ? "jbne %l4" : "jne %l4", loperands);
...@@ -1207,17 +1191,11 @@ output_scc_di(rtx op, rtx operand1, rtx operand2, rtx dest) ...@@ -1207,17 +1191,11 @@ output_scc_di(rtx op, rtx operand1, rtx operand2, rtx dest)
if (TARGET_68020 || TARGET_COLDFIRE || ! ADDRESS_REG_P (loperands[1])) if (TARGET_68020 || TARGET_COLDFIRE || ! ADDRESS_REG_P (loperands[1]))
output_asm_insn ("tst%.l %1", loperands); output_asm_insn ("tst%.l %1", loperands);
else else
{ output_asm_insn ("cmp%.w #0,%1", loperands);
#ifdef SGS_CMP_ORDER
output_asm_insn ("cmp%.w %1,%#0", loperands);
#else
output_asm_insn ("cmp%.w %#0,%1", loperands);
#endif
}
} }
loperands[5] = dest; loperands[5] = dest;
switch (op_code) switch (op_code)
{ {
case EQ: case EQ:
...@@ -1693,7 +1671,7 @@ output_move_const_into_data_reg (rtx *operands) ...@@ -1693,7 +1671,7 @@ output_move_const_into_data_reg (rtx *operands)
return "moveq %1,%0\n\tnot%.w %0"; return "moveq %1,%0\n\tnot%.w %0";
case NEGW : case NEGW :
CC_STATUS_INIT; CC_STATUS_INIT;
return "moveq %#-128,%0\n\tneg%.w %0"; return "moveq #-128,%0\n\tneg%.w %0";
case SWAP : case SWAP :
{ {
unsigned u = i; unsigned u = i;
...@@ -1795,23 +1773,12 @@ output_move_himode (rtx *operands) ...@@ -1795,23 +1773,12 @@ output_move_himode (rtx *operands)
&& GET_CODE (XEXP (XEXP (operands[1], 0), 0)) != PLUS) && GET_CODE (XEXP (XEXP (operands[1], 0), 0)) != PLUS)
{ {
rtx labelref = XEXP (XEXP (operands[1], 0), 1); rtx labelref = XEXP (XEXP (operands[1], 0), 1);
#if MOTOROLA && !defined (SGS_SWITCH_TABLES) if (MOTOROLA)
#ifdef SGS asm_fprintf (asm_out_file, "\t.set %LLI%d,.+2\n",
asm_fprintf (asm_out_file, "\tset %LLI%d,.+2\n", CODE_LABEL_NUMBER (XEXP (labelref, 0)));
CODE_LABEL_NUMBER (XEXP (labelref, 0))); else
#else /* not SGS */ (*targetm.asm_out.internal_label) (asm_out_file, "LI",
asm_fprintf (asm_out_file, "\t.set %LLI%d,.+2\n", CODE_LABEL_NUMBER (XEXP (labelref, 0)));
CODE_LABEL_NUMBER (XEXP (labelref, 0)));
#endif /* not SGS */
#else /* SGS_SWITCH_TABLES or not MOTOROLA */
(*targetm.asm_out.internal_label) (asm_out_file, "LI",
CODE_LABEL_NUMBER (XEXP (labelref, 0)));
#ifdef SGS_SWITCH_TABLES
/* Set flag saying we need to define the symbol
LD%n (with value L%n-LI%n) at the end of the switch table. */
switch_table_difference_label_flag = 1;
#endif /* SGS_SWITCH_TABLES */
#endif /* SGS_SWITCH_TABLES or not MOTOROLA */
} }
return "move%.w %1,%0"; return "move%.w %1,%0";
} }
...@@ -1840,7 +1807,7 @@ output_move_qimode (rtx *operands) ...@@ -1840,7 +1807,7 @@ output_move_qimode (rtx *operands)
if (!reg_mentioned_p (stack_pointer_rtx, operands[1])) if (!reg_mentioned_p (stack_pointer_rtx, operands[1]))
{ {
xoperands[3] = stack_pointer_rtx; xoperands[3] = stack_pointer_rtx;
output_asm_insn ("subq%.l %#2,%3\n\tmove%.b %1,%2", xoperands); output_asm_insn ("subq%.l #2,%3\n\tmove%.b %1,%2", xoperands);
} }
else else
output_asm_insn ("move%.b %1,%-\n\tmove%.b %@,%2", xoperands); output_asm_insn ("move%.b %1,%-\n\tmove%.b %@,%2", xoperands);
...@@ -1982,9 +1949,9 @@ output_move_double (rtx *operands) ...@@ -1982,9 +1949,9 @@ output_move_double (rtx *operands)
{ {
operands[0] = XEXP (XEXP (operands[0], 0), 0); operands[0] = XEXP (XEXP (operands[0], 0), 0);
if (size == 12) if (size == 12)
output_asm_insn ("sub%.l %#12,%0", operands); output_asm_insn ("sub%.l #12,%0", operands);
else else
output_asm_insn ("subq%.l %#8,%0", operands); output_asm_insn ("subq%.l #8,%0", operands);
if (GET_MODE (operands[1]) == XFmode) if (GET_MODE (operands[1]) == XFmode)
operands[0] = gen_rtx_MEM (XFmode, operands[0]); operands[0] = gen_rtx_MEM (XFmode, operands[0]);
else if (GET_MODE (operands[0]) == DFmode) else if (GET_MODE (operands[0]) == DFmode)
...@@ -1997,9 +1964,9 @@ output_move_double (rtx *operands) ...@@ -1997,9 +1964,9 @@ output_move_double (rtx *operands)
{ {
operands[1] = XEXP (XEXP (operands[1], 0), 0); operands[1] = XEXP (XEXP (operands[1], 0), 0);
if (size == 12) if (size == 12)
output_asm_insn ("sub%.l %#12,%1", operands); output_asm_insn ("sub%.l #12,%1", operands);
else else
output_asm_insn ("subq%.l %#8,%1", operands); output_asm_insn ("subq%.l #8,%1", operands);
if (GET_MODE (operands[1]) == XFmode) if (GET_MODE (operands[1]) == XFmode)
operands[1] = gen_rtx_MEM (XFmode, operands[1]); operands[1] = gen_rtx_MEM (XFmode, operands[1]);
else if (GET_MODE (operands[1]) == DFmode) else if (GET_MODE (operands[1]) == DFmode)
...@@ -2193,16 +2160,16 @@ compadr: ...@@ -2193,16 +2160,16 @@ compadr:
if (addreg0) if (addreg0)
{ {
if (size == 12) if (size == 12)
output_asm_insn ("addq%.l %#8,%0", &addreg0); output_asm_insn ("addq%.l #8,%0", &addreg0);
else else
output_asm_insn ("addq%.l %#4,%0", &addreg0); output_asm_insn ("addq%.l #4,%0", &addreg0);
} }
if (addreg1) if (addreg1)
{ {
if (size == 12) if (size == 12)
output_asm_insn ("addq%.l %#8,%0", &addreg1); output_asm_insn ("addq%.l #8,%0", &addreg1);
else else
output_asm_insn ("addq%.l %#4,%0", &addreg1); output_asm_insn ("addq%.l #4,%0", &addreg1);
} }
/* Do that word. */ /* Do that word. */
...@@ -2210,17 +2177,17 @@ compadr: ...@@ -2210,17 +2177,17 @@ compadr:
/* Undo the adds we just did. */ /* Undo the adds we just did. */
if (addreg0) if (addreg0)
output_asm_insn ("subq%.l %#4,%0", &addreg0); output_asm_insn ("subq%.l #4,%0", &addreg0);
if (addreg1) if (addreg1)
output_asm_insn ("subq%.l %#4,%0", &addreg1); output_asm_insn ("subq%.l #4,%0", &addreg1);
if (size == 12) if (size == 12)
{ {
output_asm_insn (singlemove_string (middlehalf), middlehalf); output_asm_insn (singlemove_string (middlehalf), middlehalf);
if (addreg0) if (addreg0)
output_asm_insn ("subq%.l %#4,%0", &addreg0); output_asm_insn ("subq%.l #4,%0", &addreg0);
if (addreg1) if (addreg1)
output_asm_insn ("subq%.l %#4,%0", &addreg1); output_asm_insn ("subq%.l #4,%0", &addreg1);
} }
/* Do low-numbered word. */ /* Do low-numbered word. */
...@@ -2235,18 +2202,18 @@ compadr: ...@@ -2235,18 +2202,18 @@ compadr:
if (size == 12) if (size == 12)
{ {
if (addreg0) if (addreg0)
output_asm_insn ("addq%.l %#4,%0", &addreg0); output_asm_insn ("addq%.l #4,%0", &addreg0);
if (addreg1) if (addreg1)
output_asm_insn ("addq%.l %#4,%0", &addreg1); output_asm_insn ("addq%.l #4,%0", &addreg1);
output_asm_insn (singlemove_string (middlehalf), middlehalf); output_asm_insn (singlemove_string (middlehalf), middlehalf);
} }
/* Make any unoffsettable addresses point at high-numbered word. */ /* Make any unoffsettable addresses point at high-numbered word. */
if (addreg0) if (addreg0)
output_asm_insn ("addq%.l %#4,%0", &addreg0); output_asm_insn ("addq%.l #4,%0", &addreg0);
if (addreg1) if (addreg1)
output_asm_insn ("addq%.l %#4,%0", &addreg1); output_asm_insn ("addq%.l #4,%0", &addreg1);
/* Do that word. */ /* Do that word. */
output_asm_insn (singlemove_string (latehalf), latehalf); output_asm_insn (singlemove_string (latehalf), latehalf);
...@@ -2255,16 +2222,16 @@ compadr: ...@@ -2255,16 +2222,16 @@ compadr:
if (addreg0) if (addreg0)
{ {
if (size == 12) if (size == 12)
output_asm_insn ("subq%.l %#8,%0", &addreg0); output_asm_insn ("subq%.l #8,%0", &addreg0);
else else
output_asm_insn ("subq%.l %#4,%0", &addreg0); output_asm_insn ("subq%.l #4,%0", &addreg0);
} }
if (addreg1) if (addreg1)
{ {
if (size == 12) if (size == 12)
output_asm_insn ("subq%.l %#8,%0", &addreg1); output_asm_insn ("subq%.l #8,%0", &addreg1);
else else
output_asm_insn ("subq%.l %#4,%0", &addreg1); output_asm_insn ("subq%.l #4,%0", &addreg1);
} }
return ""; return "";
...@@ -2314,27 +2281,9 @@ output_addsi3 (rtx *operands) ...@@ -2314,27 +2281,9 @@ output_addsi3 (rtx *operands)
if (GET_CODE (operands[2]) == CONST_INT if (GET_CODE (operands[2]) == CONST_INT
&& (INTVAL (operands[2]) < -32768 || INTVAL (operands[2]) > 32767)) && (INTVAL (operands[2]) < -32768 || INTVAL (operands[2]) > 32767))
return "move%.l %2,%0\n\tadd%.l %1,%0"; return "move%.l %2,%0\n\tadd%.l %1,%0";
#ifdef SGS
if (GET_CODE (operands[2]) == REG) if (GET_CODE (operands[2]) == REG)
return "lea 0(%1,%2.l),%0"; return MOTOROLA ? "lea (%1,%2.l),%0" : "lea %1@(0,%2:l),%0";
else return MOTOROLA ? "lea (%c2,%1),%0" : "lea %1@(%c2),%0";
return "lea %c2(%1),%0";
#else /* !SGS */
if (MOTOROLA)
{
if (GET_CODE (operands[2]) == REG)
return "lea (%1,%2.l),%0";
else
return "lea (%c2,%1),%0";
}
else /* !MOTOROLA (MIT syntax) */
{
if (GET_CODE (operands[2]) == REG)
return "lea %1@(0,%2:l),%0";
else
return "lea %1@(%c2),%0";
}
#endif /* !SGS */
} }
if (GET_CODE (operands[2]) == CONST_INT) if (GET_CODE (operands[2]) == CONST_INT)
{ {
...@@ -2356,13 +2305,13 @@ output_addsi3 (rtx *operands) ...@@ -2356,13 +2305,13 @@ output_addsi3 (rtx *operands)
&& INTVAL (operands[2]) <= 16) && INTVAL (operands[2]) <= 16)
{ {
operands[2] = GEN_INT (INTVAL (operands[2]) - 8); operands[2] = GEN_INT (INTVAL (operands[2]) - 8);
return "addq%.l %#8,%0\n\taddq%.l %2,%0"; return "addq%.l #8,%0\n\taddq%.l %2,%0";
} }
if (INTVAL (operands[2]) < -8 if (INTVAL (operands[2]) < -8
&& INTVAL (operands[2]) >= -16) && INTVAL (operands[2]) >= -16)
{ {
operands[2] = GEN_INT (- INTVAL (operands[2]) - 8); operands[2] = GEN_INT (- INTVAL (operands[2]) - 8);
return "subq%.l %#8,%0\n\tsubq%.l %2,%0"; return "subq%.l #8,%0\n\tsubq%.l %2,%0";
} }
} }
if (ADDRESS_REG_P (operands[0]) if (ADDRESS_REG_P (operands[0])
...@@ -2496,7 +2445,7 @@ output_move_const_double (rtx *operands) ...@@ -2496,7 +2445,7 @@ output_move_const_double (rtx *operands)
{ {
static char buf[40]; static char buf[40];
sprintf (buf, "fmovecr %%#0x%x,%%0", code & 0xff); sprintf (buf, "fmovecr #0x%x,%%0", code & 0xff);
return buf; return buf;
} }
return "fmove%.d %1,%0"; return "fmove%.d %1,%0";
...@@ -2511,7 +2460,7 @@ output_move_const_single (rtx *operands) ...@@ -2511,7 +2460,7 @@ output_move_const_single (rtx *operands)
{ {
static char buf[40]; static char buf[40];
sprintf (buf, "fmovecr %%#0x%x,%%0", code & 0xff); sprintf (buf, "fmovecr #0x%x,%%0", code & 0xff);
return buf; return buf;
} }
return "fmove%.s %f1,%0"; return "fmove%.s %f1,%0";
...@@ -2791,20 +2740,13 @@ print_operand (FILE *file, rtx op, int letter) ...@@ -2791,20 +2740,13 @@ print_operand (FILE *file, rtx op, int letter)
offset is output in word mode (eg movel a5@(_foo:w), a0). When generating offset is output in word mode (eg movel a5@(_foo:w), a0). When generating
-fPIC code the offset is output in long mode (eg movel a5@(_foo:l), a0) */ -fPIC code the offset is output in long mode (eg movel a5@(_foo:l), a0) */
#ifndef ASM_OUTPUT_CASE_FETCH #if MOTOROLA
# if MOTOROLA
# ifdef SGS
# define ASM_OUTPUT_CASE_FETCH(file, labelno, regname)\
asm_fprintf (file, "%LLD%d(%Rpc,%s.", labelno, regname)
# else /* !SGS */
# define ASM_OUTPUT_CASE_FETCH(file, labelno, regname)\
asm_fprintf (file, "%LL%d-%LLI%d.b(%Rpc,%s.", labelno, labelno, regname)
# endif /* !SGS */
# else /* !MOTOROLA */
# define ASM_OUTPUT_CASE_FETCH(file, labelno, regname)\ # define ASM_OUTPUT_CASE_FETCH(file, labelno, regname)\
asm_fprintf (file, "%LL%d-%LLI%d.b(%Rpc,%s.", labelno, labelno, regname)
#else /* !MOTOROLA */
# define ASM_OUTPUT_CASE_FETCH(file, labelno, regname)\
asm_fprintf (file, "%Rpc@(%LL%d-%LLI%d-2:b,%s:", labelno, labelno, regname) asm_fprintf (file, "%Rpc@(%LL%d-%LLI%d-2:b,%s:", labelno, labelno, regname)
# endif /* !MOTOROLA */ #endif /* !MOTOROLA */
#endif /* ASM_OUTPUT_CASE_FETCH */
void void
print_operand_address (FILE *file, rtx addr) print_operand_address (FILE *file, rtx addr)
...@@ -3034,15 +2976,7 @@ print_operand_address (FILE *file, rtx addr) ...@@ -3034,15 +2976,7 @@ print_operand_address (FILE *file, rtx addr)
&& INTVAL (addr) < 0x8000 && INTVAL (addr) < 0x8000
&& INTVAL (addr) >= -0x8000) && INTVAL (addr) >= -0x8000)
{ {
if (MOTOROLA) fprintf (file, MOTOROLA ? "%d.w" : "%d:w", (int) INTVAL (addr));
#ifdef SGS
/* Many SGS assemblers croak on size specifiers for constants. */
fprintf (file, "%d", (int) INTVAL (addr));
#else
fprintf (file, "%d.w", (int) INTVAL (addr));
#endif
else /* !MOTOROLA */
fprintf (file, "%d:w", (int) INTVAL (addr));
} }
else if (GET_CODE (addr) == CONST_INT) else if (GET_CODE (addr) == CONST_INT)
{ {
......
gcc/config/m68k/m68k.h
...@@ -1629,8 +1629,6 @@ do { if (cc_prev_status.flags & CC_IN_68881) \ ...@@ -1629,8 +1629,6 @@ do { if (cc_prev_status.flags & CC_IN_68881) \
sp@+, (sp)+ or (%sp)+ depending on the style of syntax. sp@+, (sp)+ or (%sp)+ depending on the style of syntax.
'@' for a reference to the top word on the stack: '@' for a reference to the top word on the stack:
sp@, (sp) or (%sp) depending on the style of syntax. sp@, (sp) or (%sp) depending on the style of syntax.
'#' for an immediate operand prefix (# in MIT and Motorola syntax
but & in SGS syntax).
'!' for the fpcr register (used in some float-to-fixed conversions). '!' for the fpcr register (used in some float-to-fixed conversions).
'$' for the letter `s' in an op code, but only on the 68040. '$' for the letter `s' in an op code, but only on the 68040.
'&' for the letter `d' in an op code, but only on the 68040. '&' for the letter `d' in an op code, but only on the 68040.
...@@ -1645,9 +1643,8 @@ do { if (cc_prev_status.flags & CC_IN_68881) \ ...@@ -1645,9 +1643,8 @@ do { if (cc_prev_status.flags & CC_IN_68881) \
or print pair of registers as rx:ry. */ or print pair of registers as rx:ry. */
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \ ((CODE) == '.' || (CODE) == '-' || (CODE) == '+' || (CODE) == '@' \
|| (CODE) == '+' || (CODE) == '@' || (CODE) == '!' \ || (CODE) == '!' || (CODE) == '$' || (CODE) == '&' || (CODE) == '/')
|| (CODE) == '$' || (CODE) == '&' || (CODE) == '/')
/* A C compound statement to output to stdio stream STREAM the /* A C compound statement to output to stdio stream STREAM the
assembler syntax for an instruction operand X. X is an RTL assembler syntax for an instruction operand X. X is an RTL
......
gcc/config/m68k/m68k.md
...@@ -69,7 +69,6 @@ ...@@ -69,7 +69,6 @@
;;- Assembler specs: ;;- Assembler specs:
;;- "%." size separator ("." or "") move%.l d0,d1 ;;- "%." size separator ("." or "") move%.l d0,d1
;;- "%#" immediate separator ("#" or "") move%.l %#0,d0
;;- "%-" push operand "sp@-" move%.l d0,%- ;;- "%-" push operand "sp@-" move%.l d0,%-
;;- "%+" pop operand "sp@+" move%.l d0,%+ ;;- "%+" pop operand "sp@+" move%.l d0,%+
;;- "%@" top of stack "sp@" move%.l d0,%@ ;;- "%@" top of stack "sp@" move%.l d0,%@
...@@ -201,11 +200,7 @@ ...@@ -201,11 +200,7 @@
/* If you think that the 68020 does not support tstl a0, /* If you think that the 68020 does not support tstl a0,
reread page B-167 of the 68020 manual more carefully. */ reread page B-167 of the 68020 manual more carefully. */
/* On an address reg, cmpw may replace cmpl. */ /* On an address reg, cmpw may replace cmpl. */
#ifdef SGS_CMP_ORDER return "cmp%.w #0,%0";
return "cmp%.w %0,%#0";
#else
return "cmp%.w %#0,%0";
#endif
}) })
;; This can't use an address register, because comparisons ;; This can't use an address register, because comparisons
...@@ -330,36 +325,19 @@ ...@@ -330,36 +325,19 @@
"!TARGET_COLDFIRE" "!TARGET_COLDFIRE"
{ {
if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
#ifdef SGS_CMP_ORDER
return "cmpm%.l %0,%1";
#else
return "cmpm%.l %1,%0"; return "cmpm%.l %1,%0";
#endif
if (REG_P (operands[1]) if (REG_P (operands[1])
|| (!REG_P (operands[0]) && GET_CODE (operands[0]) != MEM)) || (!REG_P (operands[0]) && GET_CODE (operands[0]) != MEM))
{ cc_status.flags |= CC_REVERSED; {
#ifdef SGS_CMP_ORDER cc_status.flags |= CC_REVERSED;
return "cmp%.l %d1,%d0";
#else
return "cmp%.l %d0,%d1"; return "cmp%.l %d0,%d1";
#endif
} }
if (ADDRESS_REG_P (operands[0]) if (ADDRESS_REG_P (operands[0])
&& GET_CODE (operands[1]) == CONST_INT && GET_CODE (operands[1]) == CONST_INT
&& INTVAL (operands[1]) < 0x8000 && INTVAL (operands[1]) < 0x8000
&& INTVAL (operands[1]) >= -0x8000) && INTVAL (operands[1]) >= -0x8000)
{ return "cmp%.w %1,%0";
#ifdef SGS_CMP_ORDER
return "cmp%.w %0,%1";
#else
return "cmp%.w %1,%0";
#endif
}
#ifdef SGS_CMP_ORDER
return "cmp%.l %d0,%d1";
#else
return "cmp%.l %d1,%d0"; return "cmp%.l %d1,%d0";
#endif
}) })
(define_insn "" (define_insn ""
...@@ -370,18 +348,11 @@ ...@@ -370,18 +348,11 @@
{ {
if (REG_P (operands[1]) if (REG_P (operands[1])
|| (!REG_P (operands[0]) && GET_CODE (operands[0]) != MEM)) || (!REG_P (operands[0]) && GET_CODE (operands[0]) != MEM))
{ cc_status.flags |= CC_REVERSED; {
#ifdef SGS_CMP_ORDER cc_status.flags |= CC_REVERSED;
return "cmp%.l %d1,%d0";
#else
return "cmp%.l %d0,%d1"; return "cmp%.l %d0,%d1";
#endif
} }
#ifdef SGS_CMP_ORDER
return "cmp%.l %d0,%d1";
#else
return "cmp%.l %d1,%d0"; return "cmp%.l %d1,%d0";
#endif
}) })
(define_expand "cmphi" (define_expand "cmphi"
...@@ -398,25 +369,14 @@ ...@@ -398,25 +369,14 @@
"!TARGET_COLDFIRE" "!TARGET_COLDFIRE"
{ {
if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
#ifdef SGS_CMP_ORDER
return "cmpm%.w %0,%1";
#else
return "cmpm%.w %1,%0"; return "cmpm%.w %1,%0";
#endif
if ((REG_P (operands[1]) && !ADDRESS_REG_P (operands[1])) if ((REG_P (operands[1]) && !ADDRESS_REG_P (operands[1]))
|| (!REG_P (operands[0]) && GET_CODE (operands[0]) != MEM)) || (!REG_P (operands[0]) && GET_CODE (operands[0]) != MEM))
{ cc_status.flags |= CC_REVERSED; {
#ifdef SGS_CMP_ORDER cc_status.flags |= CC_REVERSED;
return "cmp%.w %d1,%d0";
#else
return "cmp%.w %d0,%d1"; return "cmp%.w %d0,%d1";
#endif
} }
#ifdef SGS_CMP_ORDER
return "cmp%.w %d0,%d1";
#else
return "cmp%.w %d1,%d0"; return "cmp%.w %d1,%d0";
#endif
}) })
(define_expand "cmpqi" (define_expand "cmpqi"
...@@ -433,25 +393,14 @@ ...@@ -433,25 +393,14 @@
"!TARGET_COLDFIRE" "!TARGET_COLDFIRE"
{ {
if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
#ifdef SGS_CMP_ORDER
return "cmpm%.b %0,%1";
#else
return "cmpm%.b %1,%0"; return "cmpm%.b %1,%0";
#endif
if (REG_P (operands[1]) if (REG_P (operands[1])
|| (!REG_P (operands[0]) && GET_CODE (operands[0]) != MEM)) || (!REG_P (operands[0]) && GET_CODE (operands[0]) != MEM))
{ cc_status.flags |= CC_REVERSED; {
#ifdef SGS_CMP_ORDER cc_status.flags |= CC_REVERSED;
return "cmp%.b %d1,%d0";
#else
return "cmp%.b %d0,%d1"; return "cmp%.b %d0,%d1";
#endif
} }
#ifdef SGS_CMP_ORDER
return "cmp%.b %d0,%d1";
#else
return "cmp%.b %d1,%d0"; return "cmp%.b %d1,%d0";
#endif
}) })
(define_expand "cmpdf" (define_expand "cmpdf"
...@@ -471,17 +420,6 @@ ...@@ -471,17 +420,6 @@
"TARGET_68881" "TARGET_68881"
{ {
cc_status.flags = CC_IN_68881; cc_status.flags = CC_IN_68881;
#ifdef SGS_CMP_ORDER
if (REG_P (operands[0]))
{
if (REG_P (operands[1]))
return "fcmp%.x %0,%1";
else
return "fcmp%.d %0,%f1";
}
cc_status.flags |= CC_REVERSED;
return "fcmp%.d %1,%f0";
#else
if (REG_P (operands[0])) if (REG_P (operands[0]))
{ {
if (REG_P (operands[1])) if (REG_P (operands[1]))
...@@ -491,7 +429,6 @@ ...@@ -491,7 +429,6 @@
} }
cc_status.flags |= CC_REVERSED; cc_status.flags |= CC_REVERSED;
return "fcmp%.d %f0,%1"; return "fcmp%.d %f0,%1";
#endif
}) })
(define_expand "cmpsf" (define_expand "cmpsf"
...@@ -511,17 +448,6 @@ ...@@ -511,17 +448,6 @@
"TARGET_68881" "TARGET_68881"
{ {
cc_status.flags = CC_IN_68881; cc_status.flags = CC_IN_68881;
#ifdef SGS_CMP_ORDER
if (FP_REG_P (operands[0]))
{
if (FP_REG_P (operands[1]))
return "fcmp%.x %0,%1";
else
return "fcmp%.s %0,%f1";
}
cc_status.flags |= CC_REVERSED;
return "fcmp%.s %1,%f0";
#else
if (FP_REG_P (operands[0])) if (FP_REG_P (operands[0]))
{ {
if (FP_REG_P (operands[1])) if (FP_REG_P (operands[1]))
...@@ -531,7 +457,6 @@ ...@@ -531,7 +457,6 @@
} }
cc_status.flags |= CC_REVERSED; cc_status.flags |= CC_REVERSED;
return "fcmp%.s %f0,%1"; return "fcmp%.s %f0,%1";
#endif
}) })
;; Recognizers for btst instructions. ;; Recognizers for btst instructions.
...@@ -691,18 +616,11 @@ ...@@ -691,18 +616,11 @@
if (!TARGET_68040 && !TARGET_68060) if (!TARGET_68040 && !TARGET_68060)
return "sub%.l %0,%0"; return "sub%.l %0,%0";
else else
return MOTOROLA ? return MOTOROLA ? "lea 0.w,%0" : "lea 0:w,%0";
#ifdef SGS
/* Many SGS assemblers croak on size specifiers for constants. */
"lea 0,%0" :
#else
"lea 0.w,%0" :
#endif
"lea 0:w,%0";
} }
/* moveq is faster on the 68000. */ /* moveq is faster on the 68000. */
if (DATA_REG_P (operands[0]) && (!TARGET_68020 && !TARGET_COLDFIRE)) if (DATA_REG_P (operands[0]) && (!TARGET_68020 && !TARGET_COLDFIRE))
return "moveq %#0,%0"; return "moveq #0,%0";
return "clr%.l %0"; return "clr%.l %0";
}) })
...@@ -893,19 +811,12 @@ ...@@ -893,19 +811,12 @@
if (!TARGET_68040 && !TARGET_68060) if (!TARGET_68040 && !TARGET_68060)
return "sub%.l %0,%0"; return "sub%.l %0,%0";
else else
return MOTOROLA ? return MOTOROLA ? "lea 0.w,%0" : "lea 0:w,%0";
#ifdef SGS
/* Many SGS assemblers croak on size specifiers for constants. */
"lea 0,%0" :
#else
"lea 0.w,%0" :
#endif
"lea 0:w,%0";
} }
/* moveq is faster on the 68000. */ /* moveq is faster on the 68000. */
if (DATA_REG_P (operands[0]) && !(TARGET_68020 || TARGET_COLDFIRE)) if (DATA_REG_P (operands[0]) && !(TARGET_68020 || TARGET_COLDFIRE))
{ {
return "moveq %#0,%0"; return "moveq #0,%0";
} }
return "clr%.l %0"; return "clr%.l %0";
} }
...@@ -1225,7 +1136,7 @@ ...@@ -1225,7 +1136,7 @@
{ {
CC_STATUS_INIT; CC_STATUS_INIT;
operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
return "moveq %#0,%0\;moveq %#0,%2\;move%.b %1,%2"; return "moveq #0,%0\;moveq #0,%2\;move%.b %1,%2";
}) })
(define_insn "zero_extendhidi2" (define_insn "zero_extendhidi2"
...@@ -1235,7 +1146,7 @@ ...@@ -1235,7 +1146,7 @@
{ {
CC_STATUS_INIT; CC_STATUS_INIT;
operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
return "moveq %#0,%0\;moveq %#0,%2\;move%.w %1,%2"; return "moveq #0,%0\;moveq #0,%2\;move%.w %1,%2";
}) })
;; this is the canonical form for (lshiftrt:DI x 32) ;; this is the canonical form for (lshiftrt:DI x 32)
...@@ -1341,9 +1252,9 @@ ...@@ -1341,9 +1252,9 @@
{ {
if (GET_CODE (operands[1]) == REG if (GET_CODE (operands[1]) == REG
&& REGNO (operands[0]) == REGNO (operands[1])) && REGNO (operands[0]) == REGNO (operands[1]))
return "and%.l %#0xFFFF,%0"; return "and%.l #0xFFFF,%0";
if (reg_mentioned_p (operands[0], operands[1])) if (reg_mentioned_p (operands[0], operands[1]))
return "move%.w %1,%0\;and%.l %#0xFFFF,%0"; return "move%.w %1,%0\;and%.l #0xFFFF,%0";
return "clr%.l %0\;move%.w %1,%0"; return "clr%.l %0\;move%.w %1,%0";
} }
else if (GET_CODE (operands[0]) == MEM else if (GET_CODE (operands[0]) == MEM
...@@ -1369,10 +1280,10 @@ ...@@ -1369,10 +1280,10 @@
{ {
if (GET_CODE (operands[1]) == REG if (GET_CODE (operands[1]) == REG
&& REGNO (operands[0]) == REGNO (operands[1])) && REGNO (operands[0]) == REGNO (operands[1]))
return (!TARGET_COLDFIRE ? "and%.w %#0xFF,%0" : "and%.l %#0xFF,%0"); return (!TARGET_COLDFIRE ? "and%.w #0xFF,%0" : "and%.l #0xFF,%0");
if (reg_mentioned_p (operands[0], operands[1])) if (reg_mentioned_p (operands[0], operands[1]))
return (!TARGET_COLDFIRE ? "move%.b %1,%0\;and%.w %#0xFF,%0" return (!TARGET_COLDFIRE ? "move%.b %1,%0\;and%.w #0xFF,%0"
: "move%.b %1,%0\;and%.l %#0xFF,%0"); : "move%.b %1,%0\;and%.l #0xFF,%0");
return "clr%.w %0\;move%.b %1,%0"; return "clr%.w %0\;move%.b %1,%0";
} }
else if (GET_CODE (operands[0]) == MEM else if (GET_CODE (operands[0]) == MEM
...@@ -1409,9 +1320,9 @@ ...@@ -1409,9 +1320,9 @@
{ {
if (GET_CODE (operands[1]) == REG if (GET_CODE (operands[1]) == REG
&& REGNO (operands[0]) == REGNO (operands[1])) && REGNO (operands[0]) == REGNO (operands[1]))
return "and%.l %#0xFF,%0"; return "and%.l #0xFF,%0";
if (reg_mentioned_p (operands[0], operands[1])) if (reg_mentioned_p (operands[0], operands[1]))
return "move%.b %1,%0\;and%.l %#0xFF,%0"; return "move%.b %1,%0\;and%.l #0xFF,%0";
return "clr%.l %0\;move%.b %1,%0"; return "clr%.l %0\;move%.b %1,%0";
} }
else if (GET_CODE (operands[0]) == MEM else if (GET_CODE (operands[0]) == MEM
...@@ -1419,11 +1330,7 @@ ...@@ -1419,11 +1330,7 @@
{ {
operands[0] = XEXP (XEXP (operands[0], 0), 0); operands[0] = XEXP (XEXP (operands[0], 0), 0);
return MOTOROLA ? return MOTOROLA ?
#ifdef SGS
"clr%.l -(%0)\;move%.b %1,3(%0)" :
#else
"clr%.l -(%0)\;move%.b %1,(3,%0)" : "clr%.l -(%0)\;move%.b %1,(3,%0)" :
#endif
"clrl %0@-\;moveb %1,%0@(3)"; "clrl %0@-\;moveb %1,%0@(3)";
} }
else if (GET_CODE (operands[0]) == MEM else if (GET_CODE (operands[0]) == MEM
...@@ -1431,11 +1338,7 @@ ...@@ -1431,11 +1338,7 @@
{ {
operands[0] = XEXP (XEXP (operands[0], 0), 0); operands[0] = XEXP (XEXP (operands[0], 0), 0);
return MOTOROLA ? return MOTOROLA ?
#ifdef SGS
"clr%.l (%0)+\;move%.b %1,-1(%0)" :
#else
"clr%.l (%0)+\;move%.b %1,(-1,%0)" : "clr%.l (%0)+\;move%.b %1,(-1,%0)" :
#endif
"clrl %0@+\;moveb %1,%0@(-1)"; "clrl %0@+\;moveb %1,%0@(-1)";
} }
else else
...@@ -1678,7 +1581,7 @@ ...@@ -1678,7 +1581,7 @@
"TARGET_68881 && TARGET_68040" "TARGET_68881 && TARGET_68040"
{ {
CC_STATUS_INIT; CC_STATUS_INIT;
return "fmovem%.l %!,%2\;moveq %#16,%3\;or%.l %2,%3\;and%.w %#-33,%3\;fmovem%.l %3,%!\;fmove%.l %1,%0\;fmovem%.l %2,%!"; return "fmovem%.l %!,%2\;moveq #16,%3\;or%.l %2,%3\;and%.w #-33,%3\;fmovem%.l %3,%!\;fmove%.l %1,%0\;fmovem%.l %2,%!";
}) })
(define_insn "fix_truncdfhi2" (define_insn "fix_truncdfhi2"
...@@ -1689,7 +1592,7 @@ ...@@ -1689,7 +1592,7 @@
"TARGET_68881 && TARGET_68040" "TARGET_68881 && TARGET_68040"
{ {
CC_STATUS_INIT; CC_STATUS_INIT;
return "fmovem%.l %!,%2\;moveq %#16,%3\;or%.l %2,%3\;and%.w %#-33,%3\;fmovem%.l %3,%!\;fmove%.w %1,%0\;fmovem%.l %2,%!"; return "fmovem%.l %!,%2\;moveq #16,%3\;or%.l %2,%3\;and%.w #-33,%3\;fmovem%.l %3,%!\;fmove%.w %1,%0\;fmovem%.l %2,%!";
}) })
(define_insn "fix_truncdfqi2" (define_insn "fix_truncdfqi2"
...@@ -1700,7 +1603,7 @@ ...@@ -1700,7 +1603,7 @@
"TARGET_68881 && TARGET_68040" "TARGET_68881 && TARGET_68040"
{ {
CC_STATUS_INIT; CC_STATUS_INIT;
return "fmovem%.l %!,%2\;moveq %#16,%3\;or%.l %2,%3\;and%.w %#-33,%3\;fmovem%.l %3,%!\;fmove%.b %1,%0\;fmovem%.l %2,%!"; return "fmovem%.l %!,%2\;moveq #16,%3\;or%.l %2,%3\;and%.w #-33,%3\;fmovem%.l %3,%!\;fmove%.b %1,%0\;fmovem%.l %2,%!";
}) })
;; Convert a float to a float whose value is an integer. ;; Convert a float to a float whose value is an integer.
...@@ -1952,7 +1855,7 @@ ...@@ -1952,7 +1855,7 @@
} }
output_asm_insn ("move%.l %1,%0", operands); output_asm_insn ("move%.l %1,%0", operands);
output_asm_insn (MOTOROLA ? "jbpl %l3" : "jpl %l3", operands); output_asm_insn (MOTOROLA ? "jbpl %l3" : "jpl %l3", operands);
output_asm_insn ("addq%.l %#1,%2", operands); output_asm_insn ("addq%.l #1,%2", operands);
(*targetm.asm_out.internal_label) (asm_out_file, "L", (*targetm.asm_out.internal_label) (asm_out_file, "L",
CODE_LABEL_NUMBER (operands[3])); CODE_LABEL_NUMBER (operands[3]));
return ""; return "";
...@@ -2027,13 +1930,13 @@ ...@@ -2027,13 +1930,13 @@
&& INTVAL (operands[2]) <= 16) && INTVAL (operands[2]) <= 16)
{ {
operands[2] = GEN_INT (INTVAL (operands[2]) - 8); operands[2] = GEN_INT (INTVAL (operands[2]) - 8);
return "addq%.w %#8,%0\;addq%.w %2,%0"; return "addq%.w #8,%0\;addq%.w %2,%0";
} }
if (INTVAL (operands[2]) < -8 if (INTVAL (operands[2]) < -8
&& INTVAL (operands[2]) >= -16) && INTVAL (operands[2]) >= -16)
{ {
operands[2] = GEN_INT (- INTVAL (operands[2]) - 8); operands[2] = GEN_INT (- INTVAL (operands[2]) - 8);
return "subq%.w %#8,%0\;subq%.w %2,%0"; return "subq%.w #8,%0\;subq%.w %2,%0";
} }
} }
if (ADDRESS_REG_P (operands[0]) && !TARGET_68040) if (ADDRESS_REG_P (operands[0]) && !TARGET_68040)
...@@ -2082,13 +1985,13 @@ ...@@ -2082,13 +1985,13 @@
&& INTVAL (operands[1]) <= 16) && INTVAL (operands[1]) <= 16)
{ {
operands[1] = GEN_INT (INTVAL (operands[1]) - 8); operands[1] = GEN_INT (INTVAL (operands[1]) - 8);
return "addq%.w %#8,%0\;addq%.w %1,%0"; return "addq%.w #8,%0\;addq%.w %1,%0";
} }
if (INTVAL (operands[1]) < -8 if (INTVAL (operands[1]) < -8
&& INTVAL (operands[1]) >= -16) && INTVAL (operands[1]) >= -16)
{ {
operands[1] = GEN_INT (- INTVAL (operands[1]) - 8); operands[1] = GEN_INT (- INTVAL (operands[1]) - 8);
return "subq%.w %#8,%0\;subq%.w %1,%0"; return "subq%.w #8,%0\;subq%.w %1,%0";
} }
} }
if (ADDRESS_REG_P (operands[0]) && !TARGET_68040) if (ADDRESS_REG_P (operands[0]) && !TARGET_68040)
...@@ -2131,13 +2034,13 @@ ...@@ -2131,13 +2034,13 @@
&& INTVAL (operands[1]) <= 16) && INTVAL (operands[1]) <= 16)
{ {
operands[1] = GEN_INT (INTVAL (operands[1]) - 8); operands[1] = GEN_INT (INTVAL (operands[1]) - 8);
return "addq%.w %#8,%0\;addq%.w %1,%0"; return "addq%.w #8,%0\;addq%.w %1,%0";
} }
if (INTVAL (operands[1]) < -8 if (INTVAL (operands[1]) < -8
&& INTVAL (operands[1]) >= -16) && INTVAL (operands[1]) >= -16)
{ {
operands[1] = GEN_INT (- INTVAL (operands[1]) - 8); operands[1] = GEN_INT (- INTVAL (operands[1]) - 8);
return "subq%.w %#8,%0\;subq%.w %1,%0"; return "subq%.w #8,%0\;subq%.w %1,%0";
} }
} }
if (ADDRESS_REG_P (operands[0]) && !TARGET_68040) if (ADDRESS_REG_P (operands[0]) && !TARGET_68040)
...@@ -3083,8 +2986,8 @@ ...@@ -3083,8 +2986,8 @@
"!TARGET_COLDFIRE || TARGET_CF_HWDIV" "!TARGET_COLDFIRE || TARGET_CF_HWDIV"
{ {
output_asm_insn (MOTOROLA ? output_asm_insn (MOTOROLA ?
"and%.l %#0xFFFF,%0\;divu%.w %2,%0" : "and%.l #0xFFFF,%0\;divu%.w %2,%0" :
"and%.l %#0xFFFF,%0\;divu %2,%0", "and%.l #0xFFFF,%0\;divu %2,%0",
operands); operands);
if (!find_reg_note(insn, REG_UNUSED, operands[3])) if (!find_reg_note(insn, REG_UNUSED, operands[3]))
{ {
...@@ -3281,7 +3184,7 @@ ...@@ -3281,7 +3184,7 @@
case -1 : case -1 :
/* FIXME : a scratch register would be welcome here if operand[0] /* FIXME : a scratch register would be welcome here if operand[0]
is not a register */ is not a register */
output_asm_insn ("move%.l %#-1,%0", operands); output_asm_insn ("move%.l #-1,%0", operands);
break; break;
default : default :
{ {
...@@ -3303,7 +3206,7 @@ ...@@ -3303,7 +3206,7 @@
case -1 : case -1 :
/* FIXME : a scratch register would be welcome here if operand[0] /* FIXME : a scratch register would be welcome here if operand[0]
is not a register */ is not a register */
output_asm_insn ("move%.l %#-1,%0", operands); output_asm_insn ("move%.l #-1,%0", operands);
break; break;
default : default :
{ {
...@@ -4019,7 +3922,7 @@ ...@@ -4019,7 +3922,7 @@
if (INTVAL (operands[2]) == 1) if (INTVAL (operands[2]) == 1)
return "add%.l %1,%1\;addx%.l %0,%0"; return "add%.l %1,%1\;addx%.l %0,%0";
else if (INTVAL (operands[2]) == 8) else if (INTVAL (operands[2]) == 8)
return "rol%.l %#8,%1\;rol%.l %#8,%0\;move%.b %1,%0\;clr%.b %1"; return "rol%.l #8,%1\;rol%.l #8,%0\;move%.b %1,%0\;clr%.b %1";
else if (INTVAL (operands[2]) == 16) else if (INTVAL (operands[2]) == 16)
return "swap %1\;swap %0\;move%.w %1,%0\;clr%.w %1"; return "swap %1\;swap %0\;move%.w %1,%0\;clr%.w %1";
else if (INTVAL (operands[2]) == 48) else if (INTVAL (operands[2]) == 48)
...@@ -4033,7 +3936,7 @@ ...@@ -4033,7 +3936,7 @@
operands[2] = GEN_INT (INTVAL (operands[2]) - 32); operands[2] = GEN_INT (INTVAL (operands[2]) - 32);
output_asm_insn (INTVAL (operands[2]) <= 8 ? "asl%.l %2,%1" : output_asm_insn (INTVAL (operands[2]) <= 8 ? "asl%.l %2,%1" :
"moveq %2,%0\;asl%.l %0,%1", operands); "moveq %2,%0\;asl%.l %0,%1", operands);
return "mov%.l %1,%0\;moveq %#0,%1"; return "mov%.l %1,%0\;moveq #0,%1";
} }
}) })
...@@ -4215,9 +4118,9 @@ ...@@ -4215,9 +4118,9 @@
return "add%.l %0,%0\;subx%.l %0,%0\;move%.l %0,%1"; return "add%.l %0,%0\;subx%.l %0,%0\;move%.l %0,%1";
CC_STATUS_INIT; CC_STATUS_INIT;
if (INTVAL (operands[2]) == 1) if (INTVAL (operands[2]) == 1)
return "asr%.l %#1,%0\;roxr%.l %#1,%1"; return "asr%.l #1,%0\;roxr%.l #1,%1";
else if (INTVAL (operands[2]) == 8) else if (INTVAL (operands[2]) == 8)
return "move%.b %0,%1\;asr%.l %#8,%0\;ror%.l %#8,%1"; return "move%.b %0,%1\;asr%.l #8,%0\;ror%.l #8,%1";
else if (INTVAL (operands[2]) == 16) else if (INTVAL (operands[2]) == 16)
return "move%.w %0,%1\;swap %0\;ext%.l %0\;swap %1"; return "move%.w %0,%1\;swap %0\;ext%.l %0\;swap %1";
else if (INTVAL (operands[2]) == 48) else if (INTVAL (operands[2]) == 48)
...@@ -4225,9 +4128,9 @@ ...@@ -4225,9 +4128,9 @@
else if (INTVAL (operands[2]) == 31) else if (INTVAL (operands[2]) == 31)
return "add%.l %1,%1\;addx%.l %0,%0\;move%.l %0,%1\;subx%.l %0,%0"; return "add%.l %1,%1\;addx%.l %0,%0\;move%.l %0,%1\;subx%.l %0,%0";
else if (INTVAL (operands[2]) == 2) else if (INTVAL (operands[2]) == 2)
return "asr%.l %#1,%0\;roxr%.l %#1,%1\;asr%.l %#1,%0\;roxr%.l %#1,%1"; return "asr%.l #1,%0\;roxr%.l #1,%1\;asr%.l #1,%0\;roxr%.l #1,%1";
else if (INTVAL (operands[2]) == 3) else if (INTVAL (operands[2]) == 3)
return "asr%.l %#1,%0\;roxr%.l %#1,%1\;asr%.l %#1,%0\;roxr%.l %#1,%1\;asr%.l %#1,%0\;roxr%.l %#1,%1"; return "asr%.l #1,%0\;roxr%.l #1,%1\;asr%.l #1,%0\;roxr%.l #1,%1\;asr%.l #1,%0\;roxr%.l #1,%1";
else /* 32 < INTVAL (operands[2]) <= 63 */ else /* 32 < INTVAL (operands[2]) <= 63 */
{ {
operands[2] = GEN_INT (INTVAL (operands[2]) - 32); operands[2] = GEN_INT (INTVAL (operands[2]) - 32);
...@@ -4381,23 +4284,23 @@ ...@@ -4381,23 +4284,23 @@
return "add%.l %0,%0\;clr%.l %0\;clr%.l %1\;addx%.l %1,%1"; return "add%.l %0,%0\;clr%.l %0\;clr%.l %1\;addx%.l %1,%1";
CC_STATUS_INIT; CC_STATUS_INIT;
if (INTVAL (operands[2]) == 1) if (INTVAL (operands[2]) == 1)
return "lsr%.l %#1,%0\;roxr%.l %#1,%1"; return "lsr%.l #1,%0\;roxr%.l #1,%1";
else if (INTVAL (operands[2]) == 8) else if (INTVAL (operands[2]) == 8)
return "move%.b %0,%1\;lsr%.l %#8,%0\;ror%.l %#8,%1"; return "move%.b %0,%1\;lsr%.l #8,%0\;ror%.l #8,%1";
else if (INTVAL (operands[2]) == 16) else if (INTVAL (operands[2]) == 16)
return "move%.w %0,%1\;clr%.w %0\;swap %1\;swap %0"; return "move%.w %0,%1\;clr%.w %0\;swap %1\;swap %0";
else if (INTVAL (operands[2]) == 48) else if (INTVAL (operands[2]) == 48)
return "move%.l %0,%1\;clr%.w %1\;clr%.l %0\;swap %1"; return "move%.l %0,%1\;clr%.w %1\;clr%.l %0\;swap %1";
else if (INTVAL (operands[2]) == 2) else if (INTVAL (operands[2]) == 2)
return "lsr%.l %#1,%0\;roxr%.l %#1,%1\;lsr%.l %#1,%0\;roxr%.l %#1,%1"; return "lsr%.l #1,%0\;roxr%.l #1,%1\;lsr%.l #1,%0\;roxr%.l #1,%1";
else if (INTVAL (operands[2]) == 3) else if (INTVAL (operands[2]) == 3)
return "lsr%.l %#1,%0\;roxr%.l %#1,%1\;lsr%.l %#1,%0\;roxr%.l %#1,%1\;lsr%.l %#1,%0\;roxr%.l %#1,%1"; return "lsr%.l #1,%0\;roxr%.l #1,%1\;lsr%.l #1,%0\;roxr%.l #1,%1\;lsr%.l #1,%0\;roxr%.l #1,%1";
else /* 32 < INTVAL (operands[2]) <= 63 */ else /* 32 < INTVAL (operands[2]) <= 63 */
{ {
operands[2] = GEN_INT (INTVAL (operands[2]) - 32); operands[2] = GEN_INT (INTVAL (operands[2]) - 32);
output_asm_insn (INTVAL (operands[2]) <= 8 ? "lsr%.l %2,%0" : output_asm_insn (INTVAL (operands[2]) <= 8 ? "lsr%.l %2,%0" :
"moveq %2,%1\;lsr%.l %1,%0", operands); "moveq %2,%1\;lsr%.l %1,%0", operands);
return "mov%.l %0,%1\;moveq %#0,%0"; return "mov%.l %0,%1\;moveq #0,%0";
} }
}) })
...@@ -5527,13 +5430,9 @@ ...@@ -5527,13 +5430,9 @@
else else
{ {
if (MOTOROLA) if (MOTOROLA)
#ifdef SGS_CMP_ORDER output_asm_insn ("cmp%.w #0,%0\;jbne %l4\;cmp%.w #0,%3\;jbeq %l1", operands);
output_asm_insn ("cmp%.w %0,%#0\;jbne %l4\;cmp%.w %3,%#0\;jbeq %l1", operands);
#else
output_asm_insn ("cmp%.w %#0,%0\;jbne %l4\;cmp%.w %#0,%3\;jbeq %l1", operands);
#endif
else else
output_asm_insn ("cmp%.w %#0,%0\;jne %l4\;cmp%.w %#0,%3\;jeq %l1", operands); output_asm_insn ("cmp%.w #0,%0\;jne %l4\;cmp%.w #0,%3\;jeq %l1", operands);
} }
(*targetm.asm_out.internal_label) (asm_out_file, "L", (*targetm.asm_out.internal_label) (asm_out_file, "L",
CODE_LABEL_NUMBER (operands[4])); CODE_LABEL_NUMBER (operands[4]));
...@@ -5596,13 +5495,9 @@ ...@@ -5596,13 +5495,9 @@
else else
{ {
if (MOTOROLA) if (MOTOROLA)
#ifdef SGS_CMP_ORDER return "cmp%.w #0,%0\;jbne %l1\;cmp%.w #0,%3\;jbne %l1";
return "cmp%.w %0,%#0\;jbne %l1\;cmp%.w %3,%#0\;jbne %l1";
#else
return "cmp%.w %#0,%0\;jbne %l1\;cmp%.w %#0,%3\;jbne %l1";
#endif
else else
return "cmp%.w %#0,%0\;jne %l1\;cmp%.w %#0,%3\;jne %l1"; return "cmp%.w #0,%0\;jne %l1\;cmp%.w #0,%3\;jne %l1";
} }
}) })
...@@ -5635,13 +5530,8 @@ ...@@ -5635,13 +5530,8 @@
else else
{ {
/* On an address reg, cmpw may replace cmpl. */ /* On an address reg, cmpw may replace cmpl. */
#ifdef SGS_CMP_ORDER output_asm_insn("cmp%.w #0,%0", operands);
output_asm_insn("cmp%.w %0,%#0", operands);
#else
output_asm_insn("cmp%.w %#0,%0", operands);
#endif
} }
return MOTOROLA ? "jbpl %l1" : "jpl %l1"; return MOTOROLA ? "jbpl %l1" : "jpl %l1";
}) })
...@@ -5674,11 +5564,7 @@ ...@@ -5674,11 +5564,7 @@
else else
{ {
/* On an address reg, cmpw may replace cmpl. */ /* On an address reg, cmpw may replace cmpl. */
#ifdef SGS_CMP_ORDER output_asm_insn("cmp%.w #0,%0", operands);
output_asm_insn("cmp%.w %0,%#0", operands);
#else
output_asm_insn("cmp%.w %#0,%0", operands);
#endif
} }
return MOTOROLA ? "jbmi %l1" : "jmi %l1"; return MOTOROLA ? "jbmi %l1" : "jmi %l1";
...@@ -6163,45 +6049,17 @@ ...@@ -6163,45 +6049,17 @@
#ifdef ASM_RETURN_CASE_JUMP #ifdef ASM_RETURN_CASE_JUMP
ASM_RETURN_CASE_JUMP; ASM_RETURN_CASE_JUMP;
#else #else
#ifdef SGS
#ifdef ASM_OUTPUT_CASE_LABEL
if (TARGET_COLDFIRE)
{
if (ADDRESS_REG_P (operands[0]))
return "jmp 6(%%pc,%0.l)";
else
return "ext%.l %0\;jmp 6(%%pc,%0.l)";
}
else
return "jmp 6(%%pc,%0.w)";
#else
if (TARGET_COLDFIRE)
{
if (ADDRESS_REG_P (operands[0]))
return "jmp 2(%%pc,%0.l)";
else
return "extl %0\;jmp 2(%%pc,%0.l)";
}
else
return "jmp 2(%%pc,%0.w)";
#endif
#else /* not SGS */
if (TARGET_COLDFIRE) if (TARGET_COLDFIRE)
{ {
if (ADDRESS_REG_P (operands[0])) if (ADDRESS_REG_P (operands[0]))
{ return MOTOROLA ? "jmp (2,pc,%0.l)" : "jmp pc@(2,%0:l)";
return MOTOROLA ? "jmp (2,pc,%0.l)" : "jmp pc@(2,%0:l)";
}
else if (MOTOROLA) else if (MOTOROLA)
return "ext%.l %0\;jmp (2,pc,%0.l)"; return "ext%.l %0\;jmp (2,pc,%0.l)";
else else
return "extl %0\;jmp pc@(2,%0:l)"; return "extl %0\;jmp pc@(2,%0:l)";
} }
else else
{ return MOTOROLA ? "jmp (2,pc,%0.w)" : "jmp pc@(2,%0:w)";
return MOTOROLA ? "jmp (2,pc,%0.w)" : "jmp pc@(2,%0:w)";
}
#endif
#endif #endif
}) })
...@@ -6222,20 +6080,12 @@ ...@@ -6222,20 +6080,12 @@
if (DATA_REG_P (operands[0])) if (DATA_REG_P (operands[0]))
return "dbra %0,%l1"; return "dbra %0,%l1";
if (GET_CODE (operands[0]) == MEM) if (GET_CODE (operands[0]) == MEM)
{ return MOTOROLA ?
if (MOTOROLA) "subq%.w #1,%0\;jbcc %l1" :
return "subq%.w %#1,%0\;jbcc %l1"; "subqw #1,%0\;jcc %l1";
else return MOTOROLA ?
return "subqw %#1,%0\;jcc %l1"; "subq%.w #1,%0\;cmp%.w #-1,%0\;jbne %l1" :
} "subqw #1,%0\;cmpw #-1,%0\;jne %l1";
if (MOTOROLA)
#ifdef SGS_CMP_ORDER
return "subq%.w %#1,%0\;cmp%.w %0,%#-1\;jbne %l1";
#else /* not SGS_CMP_ORDER */
return "subq%.w %#1,%0\;cmp%.w %#-1,%0\;jbne %l1";
#endif
else
return "subqw %#1,%0\;cmpw %#-1,%0\;jne %l1";
}) })
(define_insn "" (define_insn ""
...@@ -6251,26 +6101,17 @@ ...@@ -6251,26 +6101,17 @@
"!TARGET_COLDFIRE" "!TARGET_COLDFIRE"
{ {
CC_STATUS_INIT; CC_STATUS_INIT;
if (MOTOROLA) if (DATA_REG_P (operands[0]))
{ return MOTOROLA ?
if (DATA_REG_P (operands[0])) "dbra %0,%l1\;clr%.w %0\;subq%.l #1,%0\;jbcc %l1" :
return "dbra %0,%l1\;clr%.w %0\;subq%.l %#1,%0\;jbcc %l1"; "dbra %0,%l1\;clr%.w %0\;subq%.l #1,%0\;jcc %l1";
if (GET_CODE (operands[0]) == MEM) if (GET_CODE (operands[0]) == MEM)
return "subq%.l %#1,%0\;jbcc %l1"; return MOTOROLA ?
#ifdef SGS_CMP_ORDER "subq%.l #1,%0\;jbcc %l1" :
return "subq.l %#1,%0\;cmp.l %0,%#-1\;jbne %l1"; "subq%.l #1,%0\;jcc %l1";
#else /* not SGS_CMP_ORDER */ return MOTOROLA ?
return "subq.l %#1,%0\;cmp.l %#-1,%0\;jbne %l1"; "subq.l #1,%0\;cmp.l #-1,%0\;jbne %l1" :
#endif /* not SGS_CMP_ORDER */ "subql #1,%0\;cmpl #-1,%0\;jne %l1";
}
else
{
if (DATA_REG_P (operands[0]))
return "dbra %0,%l1\;clr%.w %0\;subql %#1,%0\;jcc %l1";
if (GET_CODE (operands[0]) == MEM)
return "subql %#1,%0\;jcc %l1";
return "subql %#1,%0\;cmpl %#-1,%0\;jne %l1";
}
}) })
;; Two dbra patterns that use REG_NOTES info generated by strength_reduce. ;; Two dbra patterns that use REG_NOTES info generated by strength_reduce.
...@@ -6289,26 +6130,15 @@ ...@@ -6289,26 +6130,15 @@
"!TARGET_COLDFIRE && find_reg_note (insn, REG_NONNEG, 0)" "!TARGET_COLDFIRE && find_reg_note (insn, REG_NONNEG, 0)"
{ {
CC_STATUS_INIT; CC_STATUS_INIT;
if (MOTOROLA) if (DATA_REG_P (operands[0]))
{ return "dbra %0,%l1";
if (DATA_REG_P (operands[0])) if (GET_CODE (operands[0]) == MEM)
return "dbra %0,%l1"; return MOTOROLA ?
if (GET_CODE (operands[0]) == MEM) "subq%.w #1,%0\;jbcc %l1" :
return "subq%.w %#1,%0\;jbcc %l1"; "subq%.w #1,%0\;jcc %l1";
#ifdef SGS_CMP_ORDER return MOTOROLA ?
return "subq.w %#1,%0\;cmp.w %0,%#-1\;jbne %l1"; "subq.w #1,%0\;cmp.w #-1,%0\;jbne %l1" :
#else /* not SGS_CMP_ORDER */ "subqw #1,%0\;cmpw #-1,%0\;jne %l1";
return "subq.w %#1,%0\;cmp.w %#-1,%0\;jbne %l1";
#endif /* not SGS_CMP_ORDER */
}
else
{
if (DATA_REG_P (operands[0]))
return "dbra %0,%l1";
if (GET_CODE (operands[0]) == MEM)
return "subqw %#1,%0\;jcc %l1";
return "subqw %#1,%0\;cmpw %#-1,%0\;jne %l1";
}
}) })
(define_expand "decrement_and_branch_until_zero" (define_expand "decrement_and_branch_until_zero"
...@@ -6339,26 +6169,17 @@ ...@@ -6339,26 +6169,17 @@
"!TARGET_COLDFIRE && find_reg_note (insn, REG_NONNEG, 0)" "!TARGET_COLDFIRE && find_reg_note (insn, REG_NONNEG, 0)"
{ {
CC_STATUS_INIT; CC_STATUS_INIT;
if (MOTOROLA) if (DATA_REG_P (operands[0]))
{ return MOTOROLA ?
if (DATA_REG_P (operands[0])) "dbra %0,%l1\;clr%.w %0\;subq%.l #1,%0\;jbcc %l1" :
return "dbra %0,%l1\;clr%.w %0\;subq%.l %#1,%0\;jbcc %l1"; "dbra %0,%l1\;clr%.w %0\;subql #1,%0\;jcc %l1";
if (GET_CODE (operands[0]) == MEM) if (GET_CODE (operands[0]) == MEM)
return "subq%.l %#1,%0\;jbcc %l1"; return MOTOROLA ?
#ifdef SGS_CMP_ORDER "subq%.l #1,%0\;jbcc %l1" :
return "subq.l %#1,%0\;cmp.l %0,%#-1\;jbne %l1"; "subql #1,%0\;jcc %l1";
#else /* not SGS_CMP_ORDER */ return MOTOROLA ?
return "subq.l %#1,%0\;cmp.l %#-1,%0\;jbne %l1"; "subq.l #1,%0\;cmp.l #-1,%0\;jbne %l1" :
#endif /* not SGS_CMP_ORDER */ "subql #1,%0\;cmpl #-1,%0\;jne %l1";
}
else
{
if (DATA_REG_P (operands[0]))
return "dbra %0,%l1\;clr%.w %0\;subql %#1,%0\;jcc %l1";
if (GET_CODE (operands[0]) == MEM)
return "subql %#1,%0\;jcc %l1";
return "subql %#1,%0\;cmpl %#-1,%0\;jne %l1";
}
}) })
...@@ -6556,25 +6377,13 @@ ...@@ -6556,25 +6377,13 @@
&& GET_CODE (XEXP (operands[1], 0)) != PLUS) && GET_CODE (XEXP (operands[1], 0)) != PLUS)
{ {
rtx labelref = XEXP (operands[1], 1); rtx labelref = XEXP (operands[1], 1);
#if MOTOROLA && !defined (SGS_SWITCH_TABLES) if (MOTOROLA)
#ifdef SGS asm_fprintf (asm_out_file, "\\t.set %LLI%d,.+2\\n",
asm_fprintf (asm_out_file, "\\tset %LLI%d,.+2\\n", CODE_LABEL_NUMBER (XEXP (labelref, 0)));
CODE_LABEL_NUMBER (XEXP (labelref, 0))); else
#else /* not SGS */ (*targetm.asm_out.internal_label) (asm_out_file, "LI",
asm_fprintf (asm_out_file, "\\t.set %LLI%d,.+2\\n", CODE_LABEL_NUMBER (XEXP (labelref, 0)));
CODE_LABEL_NUMBER (XEXP (labelref, 0)));
#endif /* not SGS */
#else /* SGS_SWITCH_TABLES or not MOTOROLA */
(*targetm.asm_out.internal_label) (asm_out_file, "LI",
CODE_LABEL_NUMBER (XEXP (labelref, 0)));
#ifdef SGS_SWITCH_TABLES
/* Set flag saying we need to define the symbol
LD%n (with value L%n-LI%n) at the end of the switch table. */
switch_table_difference_label_flag = 1;
#endif /* SGS_SWITCH_TABLES */
#endif /* SGS_SWITCH_TABLES or not MOTOROLA */
} }
return "lea %a1,%0"; return "lea %a1,%0";
}) })
...@@ -6623,7 +6432,7 @@ ...@@ -6623,7 +6432,7 @@
else if (TARGET_CPU32 && INTVAL (xoperands[1]) <= 16) else if (TARGET_CPU32 && INTVAL (xoperands[1]) <= 16)
{ {
xoperands[1] = GEN_INT (INTVAL (xoperands[1]) - 8); xoperands[1] = GEN_INT (INTVAL (xoperands[1]) - 8);
output_asm_insn ("addq%.w %#8,%0\;addq%.w %1,%0", xoperands); output_asm_insn ("addq%.w #8,%0\;addq%.w %1,%0", xoperands);
} }
else if (INTVAL (xoperands[1]) <= 0x7FFF) else if (INTVAL (xoperands[1]) <= 0x7FFF)
{ {
...@@ -6667,7 +6476,7 @@ ...@@ -6667,7 +6476,7 @@
else if (TARGET_CPU32 && INTVAL (xoperands[1]) <= 16) else if (TARGET_CPU32 && INTVAL (xoperands[1]) <= 16)
{ {
xoperands[1] = GEN_INT (INTVAL (xoperands[1]) - 8); xoperands[1] = GEN_INT (INTVAL (xoperands[1]) - 8);
output_asm_insn ("addq%.w %#8,%0\;addq%.w %1,%0", xoperands); output_asm_insn ("addq%.w #8,%0\;addq%.w %1,%0", xoperands);
} }
else if (INTVAL (xoperands[1]) <= 0x7FFF) else if (INTVAL (xoperands[1]) <= 0x7FFF)
{ {
...@@ -6704,9 +6513,9 @@ ...@@ -6704,9 +6513,9 @@
= gen_rtx_MEM (QImode, plus_constant (stack_pointer_rtx, 3)); = gen_rtx_MEM (QImode, plus_constant (stack_pointer_rtx, 3));
xoperands[3] = stack_pointer_rtx; xoperands[3] = stack_pointer_rtx;
if (!TARGET_COLDFIRE) if (!TARGET_COLDFIRE)
output_asm_insn ("subq%.w %#4,%3\;move%.b %1,%2", xoperands); output_asm_insn ("subq%.w #4,%3\;move%.b %1,%2", xoperands);
else else
output_asm_insn ("subq%.l %#4,%3\;move%.b %1,%2", xoperands); output_asm_insn ("subq%.l #4,%3\;move%.b %1,%2", xoperands);
return ""; return "";
}) })
...@@ -6869,17 +6678,6 @@ ...@@ -6869,17 +6678,6 @@
"TARGET_68881" "TARGET_68881"
{ {
cc_status.flags = CC_IN_68881; cc_status.flags = CC_IN_68881;
#ifdef SGS_CMP_ORDER
if (REG_P (operands[0]))
{
if (REG_P (operands[1]))
return "fcmp%.x %0,%1";
else
return "fcmp%.x %0,%f1";
}
cc_status.flags |= CC_REVERSED;
return "fcmp%.x %1,%f0";
#else
if (REG_P (operands[0])) if (REG_P (operands[0]))
{ {
if (REG_P (operands[1])) if (REG_P (operands[1]))
...@@ -6889,7 +6687,6 @@ ...@@ -6889,7 +6687,6 @@
} }
cc_status.flags |= CC_REVERSED; cc_status.flags |= CC_REVERSED;
return "fcmp%.x %f0,%1"; return "fcmp%.x %f0,%1";
#endif
}) })
(define_insn "extendsfxf2" (define_insn "extendsfxf2"
...@@ -7311,7 +7108,7 @@ ...@@ -7311,7 +7108,7 @@
(define_insn "trap" (define_insn "trap"
[(trap_if (const_int -1) (const_int 7))] [(trap_if (const_int -1) (const_int 7))]
"" ""
"trap %#7") "trap #7")
(define_insn "conditional_trap" (define_insn "conditional_trap"
[(trap_if (match_operator 0 "valid_dbcc_comparison_p" [(trap_if (match_operator 0 "valid_dbcc_comparison_p"
......
gcc/config/m68k/m68kelf.h
...@@ -191,19 +191,6 @@ do { \ ...@@ -191,19 +191,6 @@ do { \
putc ('\n', (FILE)); \ putc ('\n', (FILE)); \
} while (0) } while (0)
/* SVR4 m68k assembler is bitching on the syntax `2.b'.
So use the "LLDnnn-LLnnn" format. Define LLDnnn after the table. */
#undef ASM_OUTPUT_CASE_END
#define ASM_OUTPUT_CASE_END(FILE,NUM,TABLE) \
do { \
if (switch_table_difference_label_flag) \
asm_fprintf ((FILE), "%s%LLD%d,%LL%d\n", SET_ASM_OP, (NUM), (NUM)); \
switch_table_difference_label_flag = 0; \
} while (0)
extern int switch_table_difference_label_flag;
#undef ASM_OUTPUT_COMMON #undef ASM_OUTPUT_COMMON
#undef ASM_OUTPUT_LOCAL #undef ASM_OUTPUT_LOCAL
#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
......
gcc/config/m68k/math-68881.h
...@@ -57,7 +57,7 @@ ...@@ -57,7 +57,7 @@
({ \ ({ \
double huge_val; \ double huge_val; \
\ \
__asm ("fmove%.d %#0x7ff0000000000000,%0" /* Infinity */ \ __asm ("fmove%.d #0x7ff0000000000000,%0" /* Infinity */ \
: "=f" (huge_val) \ : "=f" (huge_val) \
: /* no inputs */); \ : /* no inputs */); \
huge_val; \ huge_val; \
...@@ -135,10 +135,10 @@ atan2 (double y, double x) ...@@ -135,10 +135,10 @@ atan2 (double y, double x)
{ {
double pi, pi_over_2; double pi, pi_over_2;
__asm ("fmovecr%.x %#0,%0" /* extended precision pi */ __asm ("fmovecr%.x #0,%0" /* extended precision pi */
: "=f" (pi) : "=f" (pi)
: /* no inputs */ ); : /* no inputs */ );
__asm ("fscale%.b %#-1,%0" /* no loss of accuracy */ __asm ("fscale%.b #-1,%0" /* no loss of accuracy */
: "=f" (pi_over_2) : "=f" (pi_over_2)
: "0" (pi)); : "0" (pi));
if (x > 0) if (x > 0)
...@@ -178,7 +178,7 @@ atan2 (double y, double x) ...@@ -178,7 +178,7 @@ atan2 (double y, double x)
double value; double value;
errno = EDOM; errno = EDOM;
__asm ("fmove%.d %#0x7fffffffffffffff,%0" /* quiet NaN */ __asm ("fmove%.d #0x7fffffffffffffff,%0" /* quiet NaN */
: "=f" (value) : "=f" (value)
: /* no inputs */); : /* no inputs */);
return value; return value;
...@@ -317,7 +317,7 @@ pow (double x, double y) ...@@ -317,7 +317,7 @@ pow (double x, double y)
double value; double value;
errno = EDOM; errno = EDOM;
__asm ("fmove%.d %#0x7fffffffffffffff,%0" /* quiet NaN */ __asm ("fmove%.d #0x7fffffffffffffff,%0" /* quiet NaN */
: "=f" (value) : "=f" (value)
: /* no inputs */); : /* no inputs */);
return value; return value;
...@@ -333,7 +333,7 @@ pow (double x, double y) ...@@ -333,7 +333,7 @@ pow (double x, double y)
if (y == temp) if (y == temp)
{ {
int i = (int) y; int i = (int) y;
if ((i & 1) == 0) /* even */ if ((i & 1) == 0) /* even */
return exp (y * log (-x)); return exp (y * log (-x));
else else
...@@ -344,7 +344,7 @@ pow (double x, double y) ...@@ -344,7 +344,7 @@ pow (double x, double y)
double value; double value;
errno = EDOM; errno = EDOM;
__asm ("fmove%.d %#0x7fffffffffffffff,%0" /* quiet NaN */ __asm ("fmove%.d #0x7fffffffffffffff,%0" /* quiet NaN */
: "=f" (value) : "=f" (value)
: /* no inputs */); : /* no inputs */);
return value; return value;
...@@ -497,7 +497,7 @@ frexp (double x, int *exp) ...@@ -497,7 +497,7 @@ frexp (double x, int *exp)
double mantissa; double mantissa;
__asm ("fgetexp%.x %1,%0" __asm ("fgetexp%.x %1,%0"
: "=f" (float_exponent) /* integer-valued float */ : "=f" (float_exponent) /* integer-valued float */
: "f" (x)); : "f" (x));
int_exponent = (int) float_exponent; int_exponent = (int) float_exponent;
__asm ("fgetman%.x %1,%0" __asm ("fgetman%.x %1,%0"
...@@ -505,7 +505,7 @@ frexp (double x, int *exp) ...@@ -505,7 +505,7 @@ frexp (double x, int *exp)
: "f" (x)); : "f" (x));
if (mantissa != 0) if (mantissa != 0)
{ {
__asm ("fscale%.b %#-1,%0" __asm ("fscale%.b #-1,%0"
: "=f" (mantissa) /* mantissa /= 2.0 */ : "=f" (mantissa) /* mantissa /= 2.0 */
: "0" (mantissa)); : "0" (mantissa));
int_exponent += 1; int_exponent += 1;
......
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