Commit 3a8699c7 by Alexandre Oliva Committed by Nick Clifton

Add sh2e support:

    2002-08-12  Alexandre Oliva  <aoliva@redhat.com>

        * config/sh/sh.c (output_branch) [TARGET_SH2E]: Handle
        med_cbranches.  Fix logic in short_cbranches.

    2002-04-03  Alexandre Oliva  <aoliva@redhat.com>

        * config/sh/sh.md (delay for cbranch): Don't annul delay
        slots on SH2e.
        * config/sh/sh.c (sh_insn_length_adjustment): Add 2 for
        cbranch with unfilled delay slot on SH2e.
        (output_branch): Fill with a nop the delay slot of a
        branch that required a delay slot but didn't get one.

    2002-04-02  Alexandre Oliva  <aoliva@redhat.com>

        * doc/invoke.texi (SH options): Document -m2e.
        * config/sh/crt1.asm: Add __SH2E__ Next to __SH3E__.
        * config/sh/lib1funcs.asm: Likewise.
        * config/sh/sh.c: Replace all uses of TARGET_SH3E with SH2E.
        * config/sh/sh.h (CPP_SPEC): Define __SH2E__ for -m2e, and
        not __sh1__.
        (CONDITIONAL_REGISTER_USAGE): Don't disable FP regs from
        SH2E up.
        (SH3E_BIT): Renamed to...
        (SH_E_BIT): ... this.  Replace all uses.
        (TARGET_SH2E): Define from SH_E_BIT and TARGET_SH2.
        Replace all uses of TARGET_SH3E with TARGET_SH2E.
        (TARGET_SWITCHES): Added 2e.
        (OVERRIDE_OPTIONS): Set sh_cpu for SH2E.
        (processor_type): Added PROCESSOR_SH2E.
        * config/sh/sh.md: Replace all uses of TARGET_SH3E with
        TARGET_SH2E, except in sqrtsf2_i.
        (attribute cpu): Added sh2e.
        * config/sh/t-sh (MULTILIB_OPTIONS): Replace m3e with m2e.
        (MULTILIB_MATCHES): Use m2e multilib for m3e.
        * config.gcc: Add sh2e target support.

From-SVN: r61697
parent 65ca2d60
......@@ -2207,6 +2207,7 @@ sh-*-elf* | sh[2346l]*-*-elf*)
sh4*) target_cpu_default="SELECT_SH4" ;;
sh3e*) target_cpu_default="SELECT_SH3E" ;;
sh3*) target_cpu_default="SELECT_SH3" ;;
sh2e*) target_cpu_default="SELECT_SH2E" ;;
sh2*) target_cpu_default="SELECT_SH2" ;;
esac
case $machine in
......@@ -2251,6 +2252,9 @@ sh-*-linux* | sh[2346lbe]*-*-linux*)
sh3e[lb]*) target_cpu_default="SELECT_SH3" ;;
sh3e*) target_cpu_default="SELECT_SH3E" ;;
sh3*) target_cpu_default="SELECT_SH3" ;;
sh2e[lb]e*) target_cpu_default="SELECT_SH2E" ;;
sh2e[lb]*) target_cpu_default="SELECT_SH2" ;;
sh2e*) target_cpu_default="SELECT_SH2E" ;;
sh2*) target_cpu_default="SELECT_SH2" ;;
esac
case $machine in
......@@ -2273,7 +2277,7 @@ sh-*-netbsdelf* | shl*-*-netbsdelf* | sh5-*-netbsd* | sh5l*-*-netbsd* | \
case $machine in
sh5*-*)
# SHmedia, 32-bit ABI
target_cpu_default="SH5_BIT|SH4_BIT|SH3E_BIT"
target_cpu_default="SH5_BIT|SH4_BIT|SH3_BIT|SH_E_BIT"
tmake_file="${tmake_file} sh/t-sh64 sh/t-netbsd-sh5"
;;
sh64*-*)
......
/* Copyright (C) 2000, 2001 Free Software Foundation, Inc.
/* Copyright (C) 2000, 2001, 2003 Free Software Foundation, Inc.
This file was pretty much copied from newlib.
This file is part of GNU CC.
......@@ -116,12 +116,12 @@ start_l:
cmp/ge r0,r1
bt start_l
#if defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__)
#if defined (__SH2E__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__)
mov.l set_fpscr_k, r1
jsr @r1
mov #0,r4
lds r3,fpscr
#endif /* defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) */
#endif /* defined (__SH2E__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) */
! arrange for exit to call fini
mov.l atexit_k,r0
......@@ -146,10 +146,11 @@ start_l:
nop
.align 2
#if defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__)
#if defined (__SH2E__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__)
set_fpscr_k:
.long ___set_fpscr
#endif /* defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) */
#endif /* defined (__SH2E__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) */
stack_k:
.long _stack
edata_k:
......
/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002
/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003
Free Software Foundation, Inc.
This file is free software; you can redistribute it and/or modify it
......@@ -1044,7 +1044,7 @@ GLOBAL(sdivsi3_i4):
#ifdef L_sdivsi3
/* __SH4_SINGLE_ONLY__ keeps this part for link compatibility with
sh3e code. */
sh2e/sh3e code. */
#if (! defined(__SH4__) && ! defined (__SH4_SINGLE__)) || defined (__linux__)
!!
!! Steve Chamberlain
......@@ -1433,7 +1433,7 @@ L1:
#ifdef L_udivsi3
/* __SH4_SINGLE_ONLY__ keeps this part for link compatibility with
sh3e code. */
sh2e/sh3e code. */
#if (! defined(__SH4__) && ! defined (__SH4_SINGLE__)) || defined (__linux__)
!! args in r4 and r5, result in r0, clobbers r4, pr, and t bit
......@@ -1928,7 +1928,7 @@ GLOBAL(moddi3):
#endif /* L_moddi3 */
#ifdef L_set_fpscr
#if defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) || __SH5__ == 32
#if defined (__SH2E__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) || __SH5__ == 32
#ifdef __SH5__
.mode SHcompact
#endif
......@@ -1945,7 +1945,7 @@ GLOBAL(set_fpscr):
#if defined(__SH4__)
swap.w r0,r3
mov.l r3,@(4,r1)
#else /* defined(__SH3E__) || defined(__SH4_SINGLE*__) */
#else /* defined (__SH2E__) || defined(__SH3E__) || defined(__SH4_SINGLE*__) */
swap.w r0,r2
mov.l r2,@r1
#endif
......@@ -1958,7 +1958,7 @@ GLOBAL(set_fpscr):
swap.w r0,r2
rts
mov.l r2,@r1
#else /* defined(__SH3E__) || defined(__SH4_SINGLE*__) */
#else /* defined(__SH2E__) || defined(__SH3E__) || defined(__SH4_SINGLE*__) */
swap.w r0,r3
rts
mov.l r3,@(4,r1)
......@@ -1975,7 +1975,7 @@ LOCAL(set_fpscr_L1):
.comm GLOBAL(fpscr_values),8
#endif /* ELF */
#endif /* NO_FPSCR_VALUES */
#endif /* SH3E / SH4 */
#endif /* SH2E / SH3E / SH4 */
#endif /* L_set_fpscr */
#ifdef L_ic_invalidate
#if __SH5__ == 32
......
/* Output routines for GCC for Hitachi / SuperH SH.
Copyright (C) 1993, 1994, 1995, 1997, 1997, 1998, 1999, 2000, 2001, 2002
Copyright (C) 1993, 1994, 1995, 1997, 1997, 1998, 1999, 2000, 2001, 2002, 2003
Free Software Foundation, Inc.
Contributed by Steve Chamberlain (sac@cygnus.com).
Improved by Jim Wilson (wilson@cygnus.com).
......@@ -794,7 +794,7 @@ prepare_scc_operands (code)
&& (sh_compare_op1 != const0_rtx
|| code == GTU || code == GEU || code == LTU || code == LEU))
|| (mode == DImode && sh_compare_op1 != const0_rtx)
|| (TARGET_SH3E && GET_MODE_CLASS (mode) == MODE_FLOAT))
|| (TARGET_SH2E && GET_MODE_CLASS (mode) == MODE_FLOAT))
sh_compare_op1 = force_reg (mode, sh_compare_op1);
if (TARGET_SH4 && GET_MODE_CLASS (mode) == MODE_FLOAT)
......@@ -825,16 +825,16 @@ from_compare (operands, code)
mode = GET_MODE (sh_compare_op1);
if (code != EQ
|| mode == DImode
|| (TARGET_SH3E && GET_MODE_CLASS (mode) == MODE_FLOAT))
|| (TARGET_SH2E && GET_MODE_CLASS (mode) == MODE_FLOAT))
{
/* Force args into regs, since we can't use constants here. */
sh_compare_op0 = force_reg (mode, sh_compare_op0);
if (sh_compare_op1 != const0_rtx
|| code == GTU || code == GEU
|| (TARGET_SH3E && GET_MODE_CLASS (mode) == MODE_FLOAT))
|| (TARGET_SH2E && GET_MODE_CLASS (mode) == MODE_FLOAT))
sh_compare_op1 = force_reg (mode, sh_compare_op1);
}
if (TARGET_SH3E && GET_MODE_CLASS (mode) == MODE_FLOAT && code == GE)
if (TARGET_SH2E && GET_MODE_CLASS (mode) == MODE_FLOAT && code == GE)
{
from_compare (operands, GT);
insn = gen_ieee_ccmpeqsf_t (sh_compare_op0, sh_compare_op1);
......@@ -1091,6 +1091,39 @@ output_branch (logic, insn, operands)
will fix it up if it still doesn't fit after relaxation. */
case 2:
return logic ? "bt%.\t%l0" : "bf%.\t%l0";
/* These are for SH2e, in which we have to account for the
extra nop because of the hardware bug in annulled branches. */
case 8:
if (! TARGET_RELAX)
{
int label = lf++;
if (final_sequence
&& INSN_ANNULLED_BRANCH_P (XVECEXP (final_sequence, 0, 0)))
abort ();
asm_fprintf (asm_out_file, "b%s%ss\t%LLF%d\n",
logic ? "f" : "t",
ASSEMBLER_DIALECT ? "/" : ".", label);
fprintf (asm_out_file, "\tnop\n");
output_asm_insn ("bra\t%l0", operands);
fprintf (asm_out_file, "\tnop\n");
(*targetm.asm_out.internal_label) (asm_out_file, "LF", label);
return "";
}
/* When relaxing, fall through. */
case 4:
{
char buffer[10];
sprintf (buffer, "b%s%ss\t%%l0",
logic ? "t" : "f",
ASSEMBLER_DIALECT ? "/" : ".");
output_asm_insn (buffer, &operands[0]);
return "nop";
}
default:
/* There should be no longer branches now - that would
indicate that something has destroyed the branches set
......@@ -1945,7 +1978,7 @@ shl_sext_kind (left_rtx, size_rtx, costp)
int *costp;
{
int left, size, insize, ext;
int cost, best_cost;
int cost = 0, best_cost;
int kind;
left = INTVAL (left_rtx);
......@@ -2559,7 +2592,7 @@ broken_move (insn)
|| (GET_CODE (SET_SRC (pat)) == UNSPEC
&& XINT (SET_SRC (pat), 1) == UNSPEC_MOVA
&& GET_CODE (XVECEXP (SET_SRC (pat), 0, 0)) == CONST))
&& ! (TARGET_SH3E
&& ! (TARGET_SH2E
&& GET_CODE (SET_SRC (pat)) == CONST_DOUBLE
&& (fp_zero_operand (SET_SRC (pat))
|| fp_one_operand (SET_SRC (pat)))
......@@ -2612,7 +2645,7 @@ find_barrier (num_mova, mova, from)
int hi_align = 2;
int si_align = 2;
int leading_mova = num_mova;
rtx barrier_before_mova, found_barrier = 0, good_barrier = 0;
rtx barrier_before_mova = 0, found_barrier = 0, good_barrier = 0;
int si_limit;
int hi_limit;
......@@ -3291,7 +3324,7 @@ barrier_align (barrier_or_label)
rtx barrier_or_label;
{
rtx next = next_real_insn (barrier_or_label), pat, prev;
int slot, credit, jump_to_next;
int slot, credit, jump_to_next = 0;
if (! next)
return 0;
......@@ -3437,7 +3470,7 @@ void
machine_dependent_reorg (first)
rtx first;
{
rtx insn, mova;
rtx insn, mova = NULL_RTX;
int num_mova;
rtx r0_rtx = gen_rtx_REG (Pmode, 0);
rtx r0_inc_rtx = gen_rtx_POST_INC (Pmode, r0_rtx);
......@@ -3732,7 +3765,7 @@ machine_dependent_reorg (first)
/* Scan ahead looking for a barrier to stick the constant table
behind. */
rtx barrier = find_barrier (num_mova, mova, insn);
rtx last_float_move, last_float = 0, *last_float_addr;
rtx last_float_move = NULL_RTX, last_float = 0, *last_float_addr = NULL;
if (num_mova && ! mova_p (mova))
{
......@@ -4321,7 +4354,7 @@ push (rn)
return NULL_RTX;
x = gen_push_4 (gen_rtx_REG (DFmode, rn));
}
else if (TARGET_SH3E && FP_REGISTER_P (rn))
else if (TARGET_SH2E && FP_REGISTER_P (rn))
x = gen_push_e (gen_rtx_REG (SFmode, rn));
else
x = gen_push (gen_rtx_REG (SImode, rn));
......@@ -4351,7 +4384,7 @@ pop (rn)
return;
x = gen_pop_4 (gen_rtx_REG (DFmode, rn));
}
else if (TARGET_SH3E && FP_REGISTER_P (rn))
else if (TARGET_SH2E && FP_REGISTER_P (rn))
x = gen_pop_e (gen_rtx_REG (SFmode, rn));
else
x = gen_pop (gen_rtx_REG (SImode, rn));
......@@ -4590,8 +4623,8 @@ sh_expand_prologue ()
/* Emit the code for SETUP_VARARGS. */
if (current_function_stdarg)
{
/* This is not used by the SH3E calling convention */
if (TARGET_SH1 && ! TARGET_SH3E && ! TARGET_SH5 && ! TARGET_HITACHI)
/* This is not used by the SH2E calling convention */
if (TARGET_SH1 && ! TARGET_SH2E && ! TARGET_SH5 && ! TARGET_HITACHI)
{
/* Push arg regs as if they'd been provided by caller in stack. */
for (i = 0; i < NPARM_REGS(SImode); i++)
......@@ -5246,7 +5279,7 @@ sh_builtin_saveregs ()
return const0_rtx;
}
if (! TARGET_SH3E && ! TARGET_SH4 && ! TARGET_SH5)
if (! TARGET_SH2E && ! TARGET_SH4 && ! TARGET_SH5)
{
error ("__builtin_saveregs not supported by this subtarget");
return const0_rtx;
......@@ -5349,7 +5382,7 @@ sh_build_va_list ()
tree f_next_o, f_next_o_limit, f_next_fp, f_next_fp_limit, f_next_stack;
tree record;
if (TARGET_SH5 || (! TARGET_SH3E && ! TARGET_SH4) || TARGET_HITACHI)
if (TARGET_SH5 || (! TARGET_SH2E && ! TARGET_SH4) || TARGET_HITACHI)
return ptr_type_node;
record = make_node (RECORD_TYPE);
......@@ -5403,7 +5436,7 @@ sh_va_start (valist, nextarg)
return;
}
if ((! TARGET_SH3E && ! TARGET_SH4) || TARGET_HITACHI)
if ((! TARGET_SH2E && ! TARGET_SH4) || TARGET_HITACHI)
{
std_expand_builtin_va_start (valist, nextarg);
return;
......@@ -5481,7 +5514,7 @@ sh_va_arg (valist, type)
if (pass_by_ref)
type = build_pointer_type (type);
if (! TARGET_SH5 && (TARGET_SH3E || TARGET_SH4) && ! TARGET_HITACHI)
if (! TARGET_SH5 && (TARGET_SH2E || TARGET_SH4) && ! TARGET_HITACHI)
{
tree f_next_o, f_next_o_limit, f_next_fp, f_next_fp_limit, f_next_stack;
tree next_o, next_o_limit, next_fp, next_fp_limit, next_stack;
......@@ -6877,6 +6910,16 @@ sh_insn_length_adjustment (insn)
&& get_attr_needs_delay_slot (insn) == NEEDS_DELAY_SLOT_YES)
return 2;
/* SH2e has a bug that prevents the use of annulled branches, so if
the delay slot is not filled, we'll have to put a NOP in it. */
if (sh_cpu == CPU_SH2E
&& GET_CODE (insn) == JUMP_INSN
&& GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC
&& GET_CODE (PATTERN (insn)) != ADDR_VEC
&& get_attr_type (insn) == TYPE_CBRANCH
&& GET_CODE (PATTERN (NEXT_INSN (PREV_INSN (insn)))) != SEQUENCE)
return 2;
/* sh-dsp parallel processing insn take four bytes instead of two. */
if (GET_CODE (insn) == INSN)
......
/* Definitions of target machine for GNU compiler for SuperH SH 5.
Copyright 2000, 2001, 2002 Free Software Foundation, Inc.
Copyright 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
Contributed by Alexandre Oliva <aoliva@redhat.com>
This file is part of GNU CC.
......@@ -35,7 +35,7 @@ Boston, MA 02111-1307, USA. */
#define LINK_DEFAULT_CPU_EMUL "32"
#undef TARGET_DEFAULT
#define TARGET_DEFAULT (SH5_BIT|SH4_BIT|SH3E_BIT|TARGET_ENDIAN_DEFAULT)
#define TARGET_DEFAULT (SH5_BIT|SH4_BIT|SH_E_BIT|TARGET_ENDIAN_DEFAULT)
#undef SH_ELF_WCHAR_TYPE
#define SH_ELF_WCHAR_TYPE "int"
......@@ -31,9 +31,9 @@ fp-bit.c: $(srcdir)/config/fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c
MULTILIB_ENDIAN = ml
MULTILIB_OPTIONS= $(MULTILIB_ENDIAN) m2/m3e/m4-single-only/m4-single/m4
MULTILIB_OPTIONS= $(MULTILIB_ENDIAN) m2/m2e/m4-single-only/m4-single/m4
MULTILIB_DIRNAMES=
MULTILIB_MATCHES = m2=m3 m2=m4-nofpu
MULTILIB_MATCHES = m2=m3 m2e=m3e m2=m4-nofpu
MULTILIB_EXCEPTIONS = ml
LIBGCC = stmp-multilib
......
......@@ -557,7 +557,7 @@ in the following sections.
@emph{SH Options}
@gccoptlist{
-m1 -m2 -m3 -m3e @gol
-m1 -m2 -m2e -m3 -m3e @gol
-m4-nofpu -m4-single-only -m4-single -m4 @gol
-m5-64media -m5-64media-nofpu @gol
-m5-32media -m5-32media-nofpu @gol
......@@ -8793,6 +8793,9 @@ Generate code for the SH1.
@opindex m2
Generate code for the SH2.
@item -m2e
Generate code for the SH2e.
@item -m3
@opindex m3
Generate code for the SH3.
......
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