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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
39b56c2a
Commit
39b56c2a
authored
Oct 28, 1992
by
Richard Kenner
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(gen_input_reload): In PLUS, if OP0 and OP1 are the same, use
RELOADREG when generating the addition. From-SVN: r2643
parent
3c80f7ed
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gcc/reload1.c
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39b56c2a
...
@@ -5753,6 +5753,14 @@ gen_input_reload (reloadreg, in, before_insn)
...
@@ -5753,6 +5753,14 @@ gen_input_reload (reloadreg, in, before_insn)
tem
=
op0
,
op0
=
op1
,
op1
=
tem
;
tem
=
op0
,
op0
=
op1
,
op1
=
tem
;
emit_insn_before
(
gen_move_insn
(
reloadreg
,
op0
),
before_insn
);
emit_insn_before
(
gen_move_insn
(
reloadreg
,
op0
),
before_insn
);
/* If OP0 and OP1 are the same, we can use RELOADREG for OP1.
This fixes a problem on the 32K where the stack pointer cannot
be used as an operand of an add insn. */
if
(
rtx_equal_p
(
op0
,
op1
))
op1
=
reloadreg
;
emit_insn_before
(
gen_add2_insn
(
reloadreg
,
op1
),
before_insn
);
emit_insn_before
(
gen_add2_insn
(
reloadreg
,
op1
),
before_insn
);
}
}
...
...
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