Skip to content

R
riscv-gcc-1
Commit 39403d82 by David Edelsohn
Options

expr.h (STACK_SIZE_MODE): New macro. 

        * expr.h (STACK_SIZE_MODE): New macro.
        * explow.c (allocate_dynamic_stack_space): Use it for
        mode of allocate_stack pattern increment operand.
        * tm.texi (STACK_SAVEAREA_MODE, STACK_SIZE_MODE): Document.
        * md.texi (stack_save_block, ...): Reflect use of macro.
        * rs6000.h (PROMOTE_MODE): Always promote to word_mode.
        (PROMOTE_FUNCTION_ARGS): Define.
        (PROMOTE_FUNCTION_RETURN): Define.
        (FUNCTION_VALUE): Promote to word_mode if smaller.
        Convert to gen_rtx_FOO.
        * rs6000.md (call_indirect): Store doubleword in 64-bit mode.
        Convert to gen_rtx_FOO.

From-SVN: r20893
parent 848205e6
Showing with 195 additions and 146 deletions
gcc/ChangeLog
Thu Jul 2 14:34:48 1998 David Edelsohn <edelsohn@mhpcc.edu>
* expr.h (STACK_SIZE_MODE): New macro.
* explow.c (allocate_dynamic_stack_space): Use it for
mode of allocate_stack pattern increment operand.
* tm.texi (STACK_SAVEAREA_MODE, STACK_SIZE_MODE): Document.
* md.texi (stack_save_block, ...): Reflect use of macro.
* rs6000.h (PROMOTE_MODE): Always promote to word_mode.
(PROMOTE_FUNCTION_ARGS): Define.
(PROMOTE_FUNCTION_RETURN): Define.
(FUNCTION_VALUE): Promote to word_mode if smaller.
Convert to gen_rtx_FOO.
* rs6000.md (call_indirect): Store doubleword in 64-bit mode.
Convert to gen_rtx_FOO.
* rs6000.c: Convert to gen_rtx_FOO.
Thu Jul 2 14:16:11 1998 Michael Meissner <meissner@cygnus.com> Thu Jul 2 14:16:11 1998 Michael Meissner <meissner@cygnus.com>
* varray.{c,h}: New files to provide virtual array support. * varray.{c,h}: New files to provide virtual array support.
...@@ -344,7 +361,7 @@ Sat Jun 27 20:20:00 1998 John Carr <jfc@mit.edu> ...@@ -344,7 +361,7 @@ Sat Jun 27 20:20:00 1998 John Carr <jfc@mit.edu>
Sat Jun 27 20:18:34 1998 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> Sat Jun 27 20:18:34 1998 Franz Sirl <Franz.Sirl-kernel@lauterbach.com>
* rs6000.c: Add trap_comparison_operator to PREDICATE_CODES. * rs6000.h: Add trap_comparison_operator to PREDICATE_CODES.
Sat Jun 27 16:45:42 1998 Jeffrey A Law (law@cygnus.com) Sat Jun 27 16:45:42 1998 Jeffrey A Law (law@cygnus.com)
......
gcc/config/rs6000/rs6000.c
...@@ -1445,12 +1445,12 @@ function_arg (cum, mode, type, named) ...@@ -1445,12 +1445,12 @@ function_arg (cum, mode, type, named)
&& (DEFAULT_ABI != ABI_AIX && (DEFAULT_ABI != ABI_AIX
|| ! TARGET_XL_CALL || ! TARGET_XL_CALL
|| (align_words < GP_ARG_NUM_REG)))) || (align_words < GP_ARG_NUM_REG))))
return gen_rtx (REG, mode, cum->fregno); return gen_rtx_REG (mode, cum->fregno);
return gen_rtx (PARALLEL, mode, return gen_rtx_PARALLEL (mode,
gen_rtvec gen_rtvec
(2, (2,
gen_rtx (EXPR_LIST, VOIDmode, gen_rtx_EXPR_LIST (VOIDmode,
((align_words >= GP_ARG_NUM_REG) ((align_words >= GP_ARG_NUM_REG)
? NULL_RTX ? NULL_RTX
: (align_words : (align_words
...@@ -1459,13 +1459,13 @@ function_arg (cum, mode, type, named) ...@@ -1459,13 +1459,13 @@ function_arg (cum, mode, type, named)
/* If this is partially on the stack, then /* If this is partially on the stack, then
we only include the portion actually we only include the portion actually
in registers here. */ in registers here. */
? gen_rtx (REG, SImode, ? gen_rtx_REG (SImode,
GP_ARG_MIN_REG + align_words) GP_ARG_MIN_REG + align_words)
: gen_rtx (REG, mode, : gen_rtx_REG (mode,
GP_ARG_MIN_REG + align_words))), GP_ARG_MIN_REG + align_words))),
const0_rtx), const0_rtx),
gen_rtx (EXPR_LIST, VOIDmode, gen_rtx_EXPR_LIST (VOIDmode,
gen_rtx (REG, mode, cum->fregno), gen_rtx_REG (mode, cum->fregno),
const0_rtx))); const0_rtx)));
} }
...@@ -1479,7 +1479,7 @@ function_arg (cum, mode, type, named) ...@@ -1479,7 +1479,7 @@ function_arg (cum, mode, type, named)
} }
else if (align_words < GP_ARG_NUM_REG) else if (align_words < GP_ARG_NUM_REG)
return gen_rtx (REG, mode, GP_ARG_MIN_REG + align_words); return gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words);
return NULL_RTX; return NULL_RTX;
} }
...@@ -1601,7 +1601,7 @@ setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) ...@@ -1601,7 +1601,7 @@ setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl)
if (!no_rtl && first_reg_offset != GP_ARG_NUM_REG) if (!no_rtl && first_reg_offset != GP_ARG_NUM_REG)
move_block_from_reg move_block_from_reg
(GP_ARG_MIN_REG + first_reg_offset, (GP_ARG_MIN_REG + first_reg_offset,
gen_rtx (MEM, BLKmode, gen_rtx_MEM (BLKmode,
plus_constant (save_area, first_reg_offset * reg_size)), plus_constant (save_area, first_reg_offset * reg_size)),
GP_ARG_NUM_REG - first_reg_offset, GP_ARG_NUM_REG - first_reg_offset,
(GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD); (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD);
...@@ -1617,21 +1617,21 @@ setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) ...@@ -1617,21 +1617,21 @@ setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl)
if (num_fp_reg >= 0) if (num_fp_reg >= 0)
{ {
rtx cr1 = gen_rtx (REG, CCmode, 69); rtx cr1 = gen_rtx_REG (CCmode, 69);
rtx lab = gen_label_rtx (); rtx lab = gen_label_rtx ();
int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8); int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8);
emit_jump_insn (gen_rtx (SET, VOIDmode, emit_jump_insn (gen_rtx_SET (VOIDmode,
pc_rtx, pc_rtx,
gen_rtx (IF_THEN_ELSE, VOIDmode, gen_rtx_IF_THEN_ELSE (VOIDmode,
gen_rtx (NE, VOIDmode, cr1, const0_rtx), gen_rtx_NE (VOIDmode, cr1, const0_rtx),
gen_rtx (LABEL_REF, VOIDmode, lab), gen_rtx_LABEL_REF (VOIDmode, lab),
pc_rtx))); pc_rtx)));
while ( num_fp_reg-- >= 0) while ( num_fp_reg-- >= 0)
{ {
emit_move_insn (gen_rtx (MEM, DFmode, plus_constant (save_area, off)), emit_move_insn (gen_rtx_MEM (DFmode, plus_constant (save_area, off)),
gen_rtx (REG, DFmode, fregno++)); gen_rtx_REG (DFmode, fregno++));
off += 8; off += 8;
} }
...@@ -1673,7 +1673,7 @@ expand_block_move_mem (mode, addr, orig_mem) ...@@ -1673,7 +1673,7 @@ expand_block_move_mem (mode, addr, orig_mem)
rtx addr; rtx addr;
rtx orig_mem; rtx orig_mem;
{ {
rtx mem = gen_rtx (MEM, mode, addr); rtx mem = gen_rtx_MEM (mode, addr);
RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem); RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem);
MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (orig_mem); MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (orig_mem);
...@@ -1849,8 +1849,8 @@ expand_block_move (operands) ...@@ -1849,8 +1849,8 @@ expand_block_move (operands)
} }
else else
{ {
src_addr = gen_rtx (PLUS, Pmode, src_reg, GEN_INT (offset)); src_addr = gen_rtx_PLUS (Pmode, src_reg, GEN_INT (offset));
dest_addr = gen_rtx (PLUS, Pmode, dest_reg, GEN_INT (offset)); dest_addr = gen_rtx_PLUS (Pmode, dest_reg, GEN_INT (offset));
} }
/* Generate the appropriate load and store, saving the stores for later */ /* Generate the appropriate load and store, saving the stores for later */
...@@ -2267,7 +2267,7 @@ rs6000_got_register (value) ...@@ -2267,7 +2267,7 @@ rs6000_got_register (value)
fatal_insn ("internal error -- needed new GOT register during reload phase to load:", value); fatal_insn ("internal error -- needed new GOT register during reload phase to load:", value);
current_function_uses_pic_offset_table = 1; current_function_uses_pic_offset_table = 1;
pic_offset_table_rtx = gen_rtx (REG, Pmode, GOT_TOC_REGNUM); pic_offset_table_rtx = gen_rtx_REG (Pmode, GOT_TOC_REGNUM);
} }
return pic_offset_table_rtx; return pic_offset_table_rtx;
...@@ -2388,7 +2388,7 @@ rs6000_finalize_pic () ...@@ -2388,7 +2388,7 @@ rs6000_finalize_pic ()
rtx init = gen_init_v4_pic (reg); rtx init = gen_init_v4_pic (reg);
emit_insn_before (init, first_insn); emit_insn_before (init, first_insn);
if (!optimize && last_insn) if (!optimize && last_insn)
emit_insn_after (gen_rtx (USE, VOIDmode, reg), last_insn); emit_insn_after (gen_rtx_USE (VOIDmode, reg), last_insn);
} }
} }
} }
...@@ -2403,7 +2403,7 @@ rs6000_reorg (insn) ...@@ -2403,7 +2403,7 @@ rs6000_reorg (insn)
{ {
if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS))
{ {
rtx got_reg = gen_rtx (REG, Pmode, GOT_TOC_REGNUM); rtx got_reg = gen_rtx_REG (Pmode, GOT_TOC_REGNUM);
for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn)) for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn))
if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
&& reg_mentioned_p (got_reg, PATTERN (insn))) && reg_mentioned_p (got_reg, PATTERN (insn)))
...@@ -4925,8 +4925,8 @@ rs6000_initialize_trampoline (addr, fnaddr, cxt) ...@@ -4925,8 +4925,8 @@ rs6000_initialize_trampoline (addr, fnaddr, cxt)
abort (); abort ();
/* Macros to shorten the code expansions below. */ /* Macros to shorten the code expansions below. */
#define MEM_DEREF(addr) gen_rtx (MEM, pmode, memory_address (pmode, addr)) #define MEM_DEREF(addr) gen_rtx_MEM (pmode, memory_address (pmode, addr))
#define MEM_PLUS(addr,offset) gen_rtx (MEM, pmode, memory_address (pmode, plus_constant (addr, offset))) #define MEM_PLUS(addr,offset) gen_rtx_MEM (pmode, memory_address (pmode, plus_constant (addr, offset)))
/* Under AIX, just build the 3 word function descriptor */ /* Under AIX, just build the 3 word function descriptor */
case ABI_AIX: case ABI_AIX:
...@@ -4945,7 +4945,7 @@ rs6000_initialize_trampoline (addr, fnaddr, cxt) ...@@ -4945,7 +4945,7 @@ rs6000_initialize_trampoline (addr, fnaddr, cxt)
case ABI_V4: case ABI_V4:
case ABI_SOLARIS: case ABI_SOLARIS:
case ABI_AIX_NODESC: case ABI_AIX_NODESC:
emit_library_call (gen_rtx (SYMBOL_REF, SImode, "__trampoline_setup"), emit_library_call (gen_rtx_SYMBOL_REF (SImode, "__trampoline_setup"),
FALSE, VOIDmode, 4, FALSE, VOIDmode, 4,
addr, pmode, addr, pmode,
GEN_INT (rs6000_trampoline_size ()), SImode, GEN_INT (rs6000_trampoline_size ()), SImode,
...@@ -4962,7 +4962,7 @@ rs6000_initialize_trampoline (addr, fnaddr, cxt) ...@@ -4962,7 +4962,7 @@ rs6000_initialize_trampoline (addr, fnaddr, cxt)
rtx fn_reg = gen_reg_rtx (pmode); rtx fn_reg = gen_reg_rtx (pmode);
rtx toc_reg = gen_reg_rtx (pmode); rtx toc_reg = gen_reg_rtx (pmode);
emit_move_insn (tramp_reg, gen_rtx (SYMBOL_REF, pmode, "..LTRAMP1..0")); emit_move_insn (tramp_reg, gen_rtx_SYMBOL_REF (pmode, "..LTRAMP1..0"));
addr = force_reg (pmode, addr); addr = force_reg (pmode, addr);
emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); emit_move_insn (fn_reg, MEM_DEREF (fnaddr));
emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize)); emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize));
...@@ -4970,7 +4970,7 @@ rs6000_initialize_trampoline (addr, fnaddr, cxt) ...@@ -4970,7 +4970,7 @@ rs6000_initialize_trampoline (addr, fnaddr, cxt)
emit_move_insn (MEM_PLUS (addr, regsize), addr); emit_move_insn (MEM_PLUS (addr, regsize), addr);
emit_move_insn (MEM_PLUS (addr, 2*regsize), fn_reg); emit_move_insn (MEM_PLUS (addr, 2*regsize), fn_reg);
emit_move_insn (MEM_PLUS (addr, 3*regsize), ctx_reg); emit_move_insn (MEM_PLUS (addr, 3*regsize), ctx_reg);
emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx (REG, pmode, 2)); emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx_REG (pmode, 2));
} }
break; break;
} }
...@@ -5107,8 +5107,8 @@ rs6000_dll_import_ref (call_ref) ...@@ -5107,8 +5107,8 @@ rs6000_dll_import_ref (call_ref)
strcat (p, call_name); strcat (p, call_name);
node = get_identifier (p); node = get_identifier (p);
reg1 = force_reg (Pmode, gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node))); reg1 = force_reg (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, IDENTIFIER_POINTER (node)));
emit_move_insn (reg2, gen_rtx (MEM, Pmode, reg1)); emit_move_insn (reg2, gen_rtx_MEM (Pmode, reg1));
return reg2; return reg2;
} }
...@@ -5132,7 +5132,7 @@ rs6000_longcall_ref (call_ref) ...@@ -5132,7 +5132,7 @@ rs6000_longcall_ref (call_ref)
call_name++; call_name++;
node = get_identifier (call_name); node = get_identifier (call_name);
call_ref = gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node)); call_ref = gen_rtx_SYMBOL_REF (VOIDmode, IDENTIFIER_POINTER (node));
} }
return force_reg (Pmode, call_ref); return force_reg (Pmode, call_ref);
......
gcc/config/rs6000/rs6000.h
...@@ -483,10 +483,19 @@ extern int rs6000_debug_arg; /* debug argument handling */ ...@@ -483,10 +483,19 @@ extern int rs6000_debug_arg; /* debug argument handling */
type, but kept valid in the wider mode. The signedness of the type, but kept valid in the wider mode. The signedness of the
extension may differ from that of the type. */ extension may differ from that of the type. */
#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
if (GET_MODE_CLASS (MODE) == MODE_INT \ if (GET_MODE_CLASS (MODE) == MODE_INT \
&& GET_MODE_SIZE (MODE) < 4) \ && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
(MODE) = SImode; (MODE) = (! TARGET_POWERPC64 ? SImode : DImode);
/* Define this if function arguments should also be promoted using the above
procedure. */
#define PROMOTE_FUNCTION_ARGS
/* Likewise, if the function return value is promoted. */
#define PROMOTE_FUNCTION_RETURN
/* Define this if most significant bit is lowest numbered /* Define this if most significant bit is lowest numbered
in instructions that operate on numbered bit-fields. */ in instructions that operate on numbered bit-fields. */
...@@ -1303,15 +1312,19 @@ extern int rs6000_sysv_varargs_p; ...@@ -1303,15 +1312,19 @@ extern int rs6000_sysv_varargs_p;
On RS/6000 an integer value is in r3 and a floating-point value is in On RS/6000 an integer value is in r3 and a floating-point value is in
fp1, unless -msoft-float. */ fp1, unless -msoft-float. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \ #define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx (REG, TYPE_MODE (VALTYPE), \ gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \
TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 33 : 3) && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
|| POINTER_TYPE_P (VALTYPE) \
? word_mode : TYPE_MODE (VALTYPE), \
TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 33 : 3)
/* Define how to find the value returned by a library function /* Define how to find the value returned by a library function
assuming the value has mode MODE. */ assuming the value has mode MODE. */
#define LIBCALL_VALUE(MODE) \ #define LIBCALL_VALUE(MODE) \
gen_rtx (REG, MODE, GET_MODE_CLASS (MODE) == MODE_FLOAT && TARGET_HARD_FLOAT ? 33 : 3) gen_rtx_REG (MODE, \
GET_MODE_CLASS (MODE) == MODE_FLOAT && TARGET_HARD_FLOAT ? 33 : 3)
/* The definition of this macro implies that there are cases where /* The definition of this macro implies that there are cases where
a scalar value cannot be returned in registers. a scalar value cannot be returned in registers.
...@@ -1624,10 +1637,10 @@ typedef struct rs6000_args ...@@ -1624,10 +1637,10 @@ typedef struct rs6000_args
frame pointer. */ frame pointer. */
#define RETURN_ADDR_RTX(count, frame) \ #define RETURN_ADDR_RTX(count, frame) \
((count == -1) \ ((count == -1) \
? gen_rtx (REG, Pmode, 65) \ ? gen_rtx_REG (Pmode, 65) \
: gen_rtx (MEM, Pmode, \ : gen_rtx_MEM (Pmode, \
memory_address (Pmode, \ memory_address (Pmode, \
plus_constant (copy_to_reg (gen_rtx (MEM, Pmode, \ plus_constant (copy_to_reg (gen_rtx_MEM (Pmode, \
memory_address (Pmode, frame))), \ memory_address (Pmode, frame))), \
RETURN_ADDRESS_OFFSET)))) RETURN_ADDRESS_OFFSET))))
...@@ -1900,9 +1913,9 @@ typedef struct rs6000_args ...@@ -1900,9 +1913,9 @@ typedef struct rs6000_args
low_int = INTVAL (XEXP (X, 1)) & 0xffff; \ low_int = INTVAL (XEXP (X, 1)) & 0xffff; \
if (low_int & 0x8000) \ if (low_int & 0x8000) \
high_int += 0x10000, low_int |= ((HOST_WIDE_INT) -1) << 16; \ high_int += 0x10000, low_int |= ((HOST_WIDE_INT) -1) << 16; \
sum = force_operand (gen_rtx (PLUS, Pmode, XEXP (X, 0), \ sum = force_operand (gen_rtx_PLUS (Pmode, XEXP (X, 0), \
GEN_INT (high_int)), 0); \ GEN_INT (high_int)), 0); \
(X) = gen_rtx (PLUS, Pmode, sum, GEN_INT (low_int)); \ (X) = gen_rtx_PLUS (Pmode, sum, GEN_INT (low_int)); \
goto WIN; \ goto WIN; \
} \ } \
else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
...@@ -1911,7 +1924,7 @@ typedef struct rs6000_args ...@@ -1911,7 +1924,7 @@ typedef struct rs6000_args
&& (TARGET_64BIT || (MODE) != DImode) \ && (TARGET_64BIT || (MODE) != DImode) \
&& (MODE) != TImode) \ && (MODE) != TImode) \
{ \ { \
(X) = gen_rtx (PLUS, Pmode, XEXP (X, 0), \ (X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \
force_reg (Pmode, force_operand (XEXP (X, 1), 0))); \ force_reg (Pmode, force_operand (XEXP (X, 1), 0))); \
goto WIN; \ goto WIN; \
} \ } \
...@@ -1924,7 +1937,7 @@ typedef struct rs6000_args ...@@ -1924,7 +1937,7 @@ typedef struct rs6000_args
{ \ { \
rtx reg = gen_reg_rtx (Pmode); \ rtx reg = gen_reg_rtx (Pmode); \
emit_insn (gen_elf_high (reg, (X))); \ emit_insn (gen_elf_high (reg, (X))); \
(X) = gen_rtx (LO_SUM, Pmode, reg, (X)); \ (X) = gen_rtx_LO_SUM (Pmode, reg, (X)); \
} \ } \
} }
...@@ -3135,7 +3148,6 @@ do { \ ...@@ -3135,7 +3148,6 @@ do { \
{"trap_comparison_operator", {EQ, NE, LE, LT, GE, \ {"trap_comparison_operator", {EQ, NE, LE, LT, GE, \
GT, LEU, LTU, GEU, GTU}}, GT, LEU, LTU, GEU, GTU}},
/* uncomment for disabling the corresponding default options */ /* uncomment for disabling the corresponding default options */
/* #define MACHINE_no_sched_interblock */ /* #define MACHINE_no_sched_interblock */
/* #define MACHINE_no_sched_speculative */ /* #define MACHINE_no_sched_speculative */
......
gcc/config/rs6000/rs6000.md
...@@ -1369,11 +1369,11 @@ ...@@ -1369,11 +1369,11 @@
{ {
if (! TARGET_POWER && ! TARGET_POWERPC) if (! TARGET_POWER && ! TARGET_POWERPC)
{ {
emit_move_insn (gen_rtx (REG, SImode, 3), operands[1]); emit_move_insn (gen_rtx_REG (SImode, 3), operands[1]);
emit_move_insn (gen_rtx (REG, SImode, 4), operands[2]); emit_move_insn (gen_rtx_REG (SImode, 4), operands[2]);
emit_insn (gen_divss_call ()); emit_insn (gen_divss_call ());
emit_move_insn (operands[0], gen_rtx (REG, SImode, 3)); emit_move_insn (operands[0], gen_rtx_REG (SImode, 3));
emit_move_insn (operands[3], gen_rtx (REG, SImode, 4)); emit_move_insn (operands[3], gen_rtx_REG (SImode, 4));
DONE; DONE;
} }
}") }")
...@@ -1397,10 +1397,10 @@ ...@@ -1397,10 +1397,10 @@
{ {
if (! TARGET_POWER && ! TARGET_POWERPC) if (! TARGET_POWER && ! TARGET_POWERPC)
{ {
emit_move_insn (gen_rtx (REG, SImode, 3), operands[1]); emit_move_insn (gen_rtx_REG (SImode, 3), operands[1]);
emit_move_insn (gen_rtx (REG, SImode, 4), operands[2]); emit_move_insn (gen_rtx_REG (SImode, 4), operands[2]);
emit_insn (gen_quous_call ()); emit_insn (gen_quous_call ());
emit_move_insn (operands[0], gen_rtx (REG, SImode, 3)); emit_move_insn (operands[0], gen_rtx_REG (SImode, 3));
DONE; DONE;
} }
else if (TARGET_POWER) else if (TARGET_POWER)
...@@ -1454,10 +1454,10 @@ ...@@ -1454,10 +1454,10 @@
FAIL; FAIL;
else else
{ {
emit_move_insn (gen_rtx (REG, SImode, 3), operands[1]); emit_move_insn (gen_rtx_REG (SImode, 3), operands[1]);
emit_move_insn (gen_rtx (REG, SImode, 4), operands[2]); emit_move_insn (gen_rtx_REG (SImode, 4), operands[2]);
emit_insn (gen_quoss_call ()); emit_insn (gen_quoss_call ());
emit_move_insn (operands[0], gen_rtx (REG, SImode, 3)); emit_move_insn (operands[0], gen_rtx_REG (SImode, 3));
DONE; DONE;
} }
}") }")
...@@ -1605,11 +1605,11 @@ ...@@ -1605,11 +1605,11 @@
{ {
if (! TARGET_POWERPC) if (! TARGET_POWERPC)
{ {
emit_move_insn (gen_rtx (REG, SImode, 3), operands[1]); emit_move_insn (gen_rtx_REG (SImode, 3), operands[1]);
emit_move_insn (gen_rtx (REG, SImode, 4), operands[2]); emit_move_insn (gen_rtx_REG (SImode, 4), operands[2]);
emit_insn (gen_divus_call ()); emit_insn (gen_divus_call ());
emit_move_insn (operands[0], gen_rtx (REG, SImode, 3)); emit_move_insn (operands[0], gen_rtx_REG (SImode, 3));
emit_move_insn (operands[3], gen_rtx (REG, SImode, 4)); emit_move_insn (operands[3], gen_rtx_REG (SImode, 4));
DONE; DONE;
} }
else else
...@@ -3665,7 +3665,7 @@ ...@@ -3665,7 +3665,7 @@
" "
{ {
operands[6] = GEN_INT (0x80000000); operands[6] = GEN_INT (0x80000000);
operands[7] = gen_rtx (REG, DFmode, FPMEM_REGNUM); operands[7] = gen_rtx_REG (DFmode, FPMEM_REGNUM);
}") }")
(define_expand "floatunssidf2" (define_expand "floatunssidf2"
...@@ -3717,7 +3717,7 @@ ...@@ -3717,7 +3717,7 @@
(set (match_dup 0) (set (match_dup 0)
(minus:DF (match_dup 0) (minus:DF (match_dup 0)
(match_dup 3)))] (match_dup 3)))]
"operands[5] = gen_rtx (REG, DFmode, FPMEM_REGNUM);") "operands[5] = gen_rtx_REG (DFmode, FPMEM_REGNUM);")
;; Load up scratch register with base address + offset if needed ;; Load up scratch register with base address + offset if needed
(define_insn "*floatsidf2_loadaddr" (define_insn "*floatsidf2_loadaddr"
...@@ -3756,8 +3756,8 @@ ...@@ -3756,8 +3756,8 @@
else else
indx = stack_pointer_rtx; indx = stack_pointer_rtx;
operands[2] = gen_rtx (MEM, SImode, operands[2] = gen_rtx_MEM (SImode,
gen_rtx (PLUS, Pmode, gen_rtx_PLUS (Pmode,
indx, indx,
GEN_INT ((((rs6000_fpmem_offset & 0xffff) ^ 0x8000) - 0x8000) GEN_INT ((((rs6000_fpmem_offset & 0xffff) ^ 0x8000) - 0x8000)
+ ((WORDS_BIG_ENDIAN != 0) * 4)))); + ((WORDS_BIG_ENDIAN != 0) * 4))));
...@@ -3783,8 +3783,8 @@ ...@@ -3783,8 +3783,8 @@
else else
indx = stack_pointer_rtx; indx = stack_pointer_rtx;
operands[2] = gen_rtx (MEM, SImode, operands[2] = gen_rtx_MEM (SImode,
gen_rtx (PLUS, Pmode, gen_rtx_PLUS (Pmode,
indx, indx,
GEN_INT ((((rs6000_fpmem_offset & 0xffff) ^ 0x8000) - 0x8000) GEN_INT ((((rs6000_fpmem_offset & 0xffff) ^ 0x8000) - 0x8000)
+ ((WORDS_BIG_ENDIAN == 0) * 4)))); + ((WORDS_BIG_ENDIAN == 0) * 4))));
...@@ -3813,8 +3813,8 @@ ...@@ -3813,8 +3813,8 @@
else else
indx = stack_pointer_rtx; indx = stack_pointer_rtx;
operands[2] = gen_rtx (MEM, SImode, operands[2] = gen_rtx_MEM (SImode,
gen_rtx (PLUS, Pmode, indx, GEN_INT (offset))); gen_rtx_PLUS (Pmode, indx, GEN_INT (offset)));
return \"lfd %0,%2\"; return \"lfd %0,%2\";
}" }"
...@@ -3832,13 +3832,13 @@ ...@@ -3832,13 +3832,13 @@
if (!TARGET_POWER2 && !TARGET_POWERPC) if (!TARGET_POWER2 && !TARGET_POWERPC)
{ {
emit_insn (gen_trunc_call (operands[0], operands[1], emit_insn (gen_trunc_call (operands[0], operands[1],
gen_rtx (SYMBOL_REF, Pmode, RS6000_ITRUNC))); gen_rtx_SYMBOL_REF (Pmode, RS6000_ITRUNC)));
DONE; DONE;
} }
operands[2] = gen_reg_rtx (DImode); operands[2] = gen_reg_rtx (DImode);
operands[3] = gen_reg_rtx (Pmode); operands[3] = gen_reg_rtx (Pmode);
operands[4] = gen_rtx (REG, DImode, FPMEM_REGNUM); operands[4] = gen_rtx_REG (DImode, FPMEM_REGNUM);
}") }")
(define_insn "*fix_truncdfsi2_internal" (define_insn "*fix_truncdfsi2_internal"
...@@ -3868,7 +3868,7 @@ ...@@ -3868,7 +3868,7 @@
(set (match_operand:SI 0 "gpc_reg_operand" "") (set (match_operand:SI 0 "gpc_reg_operand" "")
(unspec [(match_dup 4) (unspec [(match_dup 4)
(match_dup 3)] 16))] (match_dup 3)] 16))]
"operands[4] = gen_rtx (REG, DImode, FPMEM_REGNUM);") "operands[4] = gen_rtx_REG (DImode, FPMEM_REGNUM);")
(define_insn "*fix_truncdfsi2_store" (define_insn "*fix_truncdfsi2_store"
[(set (reg:DI 76) [(set (reg:DI 76)
...@@ -3886,8 +3886,8 @@ ...@@ -3886,8 +3886,8 @@
else else
indx = stack_pointer_rtx; indx = stack_pointer_rtx;
operands[2] = gen_rtx (MEM, DFmode, operands[2] = gen_rtx_MEM (DFmode,
gen_rtx (PLUS, Pmode, gen_rtx_PLUS (Pmode,
indx, indx,
GEN_INT ((((rs6000_fpmem_offset & 0xffff) GEN_INT ((((rs6000_fpmem_offset & 0xffff)
^ 0x8000) - 0x8000)))); ^ 0x8000) - 0x8000))));
...@@ -3912,8 +3912,8 @@ ...@@ -3912,8 +3912,8 @@
else else
indx = stack_pointer_rtx; indx = stack_pointer_rtx;
operands[2] = gen_rtx (MEM, DFmode, operands[2] = gen_rtx_MEM (DFmode,
gen_rtx (PLUS, Pmode, gen_rtx_PLUS (Pmode,
indx, indx,
GEN_INT ((((rs6000_fpmem_offset & 0xffff) ^ 0x8000) - 0x8000) GEN_INT ((((rs6000_fpmem_offset & 0xffff) ^ 0x8000) - 0x8000)
+ ((WORDS_BIG_ENDIAN) ? 4 : 0)))); + ((WORDS_BIG_ENDIAN) ? 4 : 0))));
...@@ -3929,7 +3929,7 @@ ...@@ -3929,7 +3929,7 @@
" "
{ {
emit_insn (gen_trunc_call (operands[0], operands[1], emit_insn (gen_trunc_call (operands[0], operands[1],
gen_rtx (SYMBOL_REF, Pmode, RS6000_UITRUNC))); gen_rtx_SYMBOL_REF (Pmode, RS6000_UITRUNC)));
DONE; DONE;
}") }")
...@@ -3944,9 +3944,9 @@ ...@@ -3944,9 +3944,9 @@
rtx first = XVECEXP (insns, 0, 0); rtx first = XVECEXP (insns, 0, 0);
rtx last = XVECEXP (insns, 0, XVECLEN (insns, 0) - 1); rtx last = XVECEXP (insns, 0, XVECLEN (insns, 0) - 1);
REG_NOTES (first) = gen_rtx (INSN_LIST, REG_LIBCALL, last, REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
REG_NOTES (first)); REG_NOTES (first));
REG_NOTES (last) = gen_rtx (INSN_LIST, REG_RETVAL, first, REG_NOTES (last)); REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first, REG_NOTES (last));
emit_insn (insns); emit_insn (insns);
DONE; DONE;
...@@ -4051,17 +4051,17 @@ ...@@ -4051,17 +4051,17 @@
{ {
if (! TARGET_POWER && ! TARGET_POWERPC) if (! TARGET_POWER && ! TARGET_POWERPC)
{ {
emit_move_insn (gen_rtx (REG, SImode, 3), operands[1]); emit_move_insn (gen_rtx_REG (SImode, 3), operands[1]);
emit_move_insn (gen_rtx (REG, SImode, 4), operands[2]); emit_move_insn (gen_rtx_REG (SImode, 4), operands[2]);
emit_insn (gen_mull_call ()); emit_insn (gen_mull_call ());
if (WORDS_BIG_ENDIAN) if (WORDS_BIG_ENDIAN)
emit_move_insn (operands[0], gen_rtx (REG, DImode, 3)); emit_move_insn (operands[0], gen_rtx_REG (DImode, 3));
else else
{ {
emit_move_insn (operand_subword (operands[0], 0, 0, DImode), emit_move_insn (operand_subword (operands[0], 0, 0, DImode),
gen_rtx (REG, SImode, 3)); gen_rtx_REG (SImode, 3));
emit_move_insn (operand_subword (operands[0], 1, 0, DImode), emit_move_insn (operand_subword (operands[0], 1, 0, DImode),
gen_rtx (REG, SImode, 4)); gen_rtx_REG (SImode, 4));
} }
DONE; DONE;
} }
...@@ -4192,10 +4192,10 @@ ...@@ -4192,10 +4192,10 @@
{ {
if (! TARGET_POWER && ! TARGET_POWERPC) if (! TARGET_POWER && ! TARGET_POWERPC)
{ {
emit_move_insn (gen_rtx (REG, SImode, 3), operands[1]); emit_move_insn (gen_rtx_REG (SImode, 3), operands[1]);
emit_move_insn (gen_rtx (REG, SImode, 4), operands[2]); emit_move_insn (gen_rtx_REG (SImode, 4), operands[2]);
emit_insn (gen_mulh_call ()); emit_insn (gen_mulh_call ());
emit_move_insn (operands[0], gen_rtx (REG, SImode, 3)); emit_move_insn (operands[0], gen_rtx_REG (SImode, 3));
DONE; DONE;
} }
else if (TARGET_POWER) else if (TARGET_POWER)
...@@ -5400,7 +5400,7 @@ ...@@ -5400,7 +5400,7 @@
&& (GET_CODE (operands[1]) == SYMBOL_REF || GET_CODE (operands[1]) == CONST) && (GET_CODE (operands[1]) == SYMBOL_REF || GET_CODE (operands[1]) == CONST)
&& small_data_operand (operands[1], SImode)) && small_data_operand (operands[1], SImode))
{ {
emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1])); emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
DONE; DONE;
} }
...@@ -5430,7 +5430,7 @@ ...@@ -5430,7 +5430,7 @@
rtx new_ref; rtx new_ref;
while (*name == '.') while (*name == '.')
name++; name++;
new_ref = gen_rtx (SYMBOL_REF, Pmode, name); new_ref = gen_rtx_SYMBOL_REF (Pmode, name);
CONSTANT_POOL_ADDRESS_P (new_ref) = CONSTANT_POOL_ADDRESS_P (operands[1]); CONSTANT_POOL_ADDRESS_P (new_ref) = CONSTANT_POOL_ADDRESS_P (operands[1]);
SYMBOL_REF_FLAG (new_ref) = SYMBOL_REF_FLAG (operands[1]); SYMBOL_REF_FLAG (new_ref) = SYMBOL_REF_FLAG (operands[1]);
SYMBOL_REF_USED (new_ref) = SYMBOL_REF_USED (operands[1]); SYMBOL_REF_USED (new_ref) = SYMBOL_REF_USED (operands[1]);
...@@ -5479,7 +5479,7 @@ ...@@ -5479,7 +5479,7 @@
This should not be done for operands that contain LABEL_REFs. This should not be done for operands that contain LABEL_REFs.
For now, we just handle the obvious case. */ For now, we just handle the obvious case. */
if (GET_CODE (operands[1]) != LABEL_REF) if (GET_CODE (operands[1]) != LABEL_REF)
emit_insn (gen_rtx (USE, VOIDmode, operands[1])); emit_insn (gen_rtx_USE (VOIDmode, operands[1]));
/* If we are to limit the number of things we put in the TOC and /* If we are to limit the number of things we put in the TOC and
this is a symbol plus a constant we can add in one insn, this is a symbol plus a constant we can add in one insn,
...@@ -6102,7 +6102,7 @@ ...@@ -6102,7 +6102,7 @@
This should not be done for operands that contain LABEL_REFs. This should not be done for operands that contain LABEL_REFs.
For now, we just handle the obvious case. */ For now, we just handle the obvious case. */
if (GET_CODE (operands[1]) != LABEL_REF) if (GET_CODE (operands[1]) != LABEL_REF)
emit_insn (gen_rtx (USE, VOIDmode, operands[1])); emit_insn (gen_rtx_USE (VOIDmode, operands[1]));
/* If we are to limit the number of things we put in the TOC and /* If we are to limit the number of things we put in the TOC and
this is a symbol plus a constant we can add in one insn, this is a symbol plus a constant we can add in one insn,
...@@ -6188,8 +6188,8 @@ ...@@ -6188,8 +6188,8 @@
(set (match_dup 3) (match_dup 1))] (set (match_dup 3) (match_dup 1))]
" "
{ {
operands[2] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0); operands[2] = gen_rtx_SUBREG (SImode, operands[0], WORDS_BIG_ENDIAN == 0);
operands[3] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0); operands[3] = gen_rtx_SUBREG (SImode, operands[0], WORDS_BIG_ENDIAN != 0);
operands[4] = (INTVAL (operands[1]) & 0x80000000) ? constm1_rtx : const0_rtx; operands[4] = (INTVAL (operands[1]) & 0x80000000) ? constm1_rtx : const0_rtx;
}") }")
...@@ -6201,8 +6201,8 @@ ...@@ -6201,8 +6201,8 @@
(set (match_dup 3) (match_dup 5))] (set (match_dup 3) (match_dup 5))]
" "
{ {
operands[2] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0); operands[2] = gen_rtx_SUBREG (SImode, operands[0], WORDS_BIG_ENDIAN == 0);
operands[3] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0); operands[3] = gen_rtx_SUBREG (SImode, operands[0], WORDS_BIG_ENDIAN != 0);
operands[4] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); operands[4] = GEN_INT (CONST_DOUBLE_HIGH (operands[1]));
operands[5] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); operands[5] = GEN_INT (CONST_DOUBLE_LOW (operands[1]));
}") }")
...@@ -6563,12 +6563,12 @@ ...@@ -6563,12 +6563,12 @@
count = INTVAL (operands[2]); count = INTVAL (operands[2]);
regno = REGNO (operands[0]); regno = REGNO (operands[0]);
operands[3] = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count)); operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
from = force_reg (SImode, XEXP (operands[1], 0)); from = force_reg (SImode, XEXP (operands[1], 0));
for (i = 0; i < count; i++) for (i = 0; i < count; i++)
XVECEXP (operands[3], 0, i) XVECEXP (operands[3], 0, i)
= gen_rtx (SET, VOIDmode, gen_rtx (REG, SImode, regno + i), = gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, regno + i),
change_address (operands[1], SImode, change_address (operands[1], SImode,
plus_constant (from, i * 4))); plus_constant (from, i * 4)));
}") }")
...@@ -6604,7 +6604,7 @@ ...@@ -6604,7 +6604,7 @@
else if (i == 0) else if (i == 0)
{ {
xop[0] = operands[1]; xop[0] = operands[1];
xop[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); xop[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
xop[2] = GEN_INT (4 * (words-1)); xop[2] = GEN_INT (4 * (words-1));
output_asm_insn (\"{cal %0,4(%0)|addi %0,%0,4}\;{lsi|lswi} %1,%0,%2\;{l|lwz} %0,-4(%0)\", xop); output_asm_insn (\"{cal %0,4(%0)|addi %0,%0,4}\;{lsi|lswi} %1,%0,%2\;{l|lwz} %0,-4(%0)\", xop);
return \"\"; return \"\";
...@@ -6614,7 +6614,7 @@ ...@@ -6614,7 +6614,7 @@
for (j = 0; j < words; j++) for (j = 0; j < words; j++)
if (j != i) if (j != i)
{ {
xop[0] = gen_rtx (REG, SImode, REGNO (operands[1]) + j); xop[0] = gen_rtx_REG (SImode, REGNO (operands[1]) + j);
xop[1] = operands[2]; xop[1] = operands[2];
xop[2] = GEN_INT (j * 4); xop[2] = GEN_INT (j * 4);
output_asm_insn (\"{l|lwz} %0,%2(%1)\", xop); output_asm_insn (\"{l|lwz} %0,%2(%1)\", xop);
...@@ -6659,21 +6659,21 @@ ...@@ -6659,21 +6659,21 @@
count = INTVAL (operands[2]); count = INTVAL (operands[2]);
regno = REGNO (operands[1]); regno = REGNO (operands[1]);
operands[3] = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count + 1)); operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count + 1));
to = force_reg (SImode, XEXP (operands[0], 0)); to = force_reg (SImode, XEXP (operands[0], 0));
XVECEXP (operands[3], 0, 0) XVECEXP (operands[3], 0, 0)
= gen_rtx (SET, VOIDmode, change_address (operands[0], SImode, to), = gen_rtx_SET (VOIDmode, change_address (operands[0], SImode, to),
operands[1]); operands[1]);
XVECEXP (operands[3], 0, 1) = gen_rtx (CLOBBER, VOIDmode, XVECEXP (operands[3], 0, 1) = gen_rtx_CLOBBER (VOIDmode,
gen_rtx (SCRATCH, SImode)); gen_rtx_SCRATCH (SImode));
for (i = 1; i < count; i++) for (i = 1; i < count; i++)
XVECEXP (operands[3], 0, i + 1) XVECEXP (operands[3], 0, i + 1)
= gen_rtx (SET, VOIDmode, = gen_rtx_SET (VOIDmode,
change_address (operands[0], SImode, change_address (operands[0], SImode,
plus_constant (to, i * 4)), plus_constant (to, i * 4)),
gen_rtx (REG, SImode, regno + i)); gen_rtx_REG (SImode, regno + i));
}") }")
(define_insn "" (define_insn ""
...@@ -7233,7 +7233,7 @@ ...@@ -7233,7 +7233,7 @@
"" ""
" "
{ rtx chain = gen_reg_rtx (Pmode); { rtx chain = gen_reg_rtx (Pmode);
rtx stack_bot = gen_rtx (MEM, Pmode, stack_pointer_rtx); rtx stack_bot = gen_rtx_MEM (Pmode, stack_pointer_rtx);
rtx neg_op0; rtx neg_op0;
emit_move_insn (chain, stack_bot); emit_move_insn (chain, stack_bot);
...@@ -7245,7 +7245,7 @@ ...@@ -7245,7 +7245,7 @@
&& (GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) > 4096)) && (GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) > 4096))
{ {
rtx tmp = gen_reg_rtx (Pmode); rtx tmp = gen_reg_rtx (Pmode);
emit_library_call_value (gen_rtx (SYMBOL_REF, Pmode, \"__allocate_stack\"), emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, \"__allocate_stack\"),
tmp, 0, Pmode, 1, operands[1], Pmode); tmp, 0, Pmode, 1, operands[1], Pmode);
emit_insn (gen_set_sp (tmp)); emit_insn (gen_set_sp (tmp));
emit_move_insn (operands[0], tmp); emit_move_insn (operands[0], tmp);
...@@ -7273,7 +7273,7 @@ ...@@ -7273,7 +7273,7 @@
{ {
emit_insn ((* ((TARGET_32BIT) ? gen_addsi3 : gen_adddi3)) emit_insn ((* ((TARGET_32BIT) ? gen_addsi3 : gen_adddi3))
(stack_pointer_rtx, stack_pointer_rtx, neg_op0)); (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
emit_move_insn (gen_rtx (MEM, Pmode, stack_pointer_rtx), chain); emit_move_insn (gen_rtx_MEM (Pmode, stack_pointer_rtx), chain);
} }
emit_move_insn (operands[0], virtual_stack_dynamic_rtx); emit_move_insn (operands[0], virtual_stack_dynamic_rtx);
...@@ -7318,7 +7318,7 @@ ...@@ -7318,7 +7318,7 @@
" "
{ {
operands[2] = gen_reg_rtx (Pmode); operands[2] = gen_reg_rtx (Pmode);
operands[3] = gen_rtx (MEM, Pmode, operands[0]); operands[3] = gen_rtx_MEM (Pmode, operands[0]);
}") }")
(define_expand "save_stack_nonlocal" (define_expand "save_stack_nonlocal"
...@@ -7330,7 +7330,7 @@ ...@@ -7330,7 +7330,7 @@
rtx temp = gen_reg_rtx (Pmode); rtx temp = gen_reg_rtx (Pmode);
/* Copy the backchain to the first word, sp to the second. */ /* Copy the backchain to the first word, sp to the second. */
emit_move_insn (temp, gen_rtx (MEM, Pmode, operands[1])); emit_move_insn (temp, gen_rtx_MEM (Pmode, operands[1]));
emit_move_insn (operand_subword (operands[0], 0, 0, (TARGET_32BIT ? DImode : TImode)), emit_move_insn (operand_subword (operands[0], 0, 0, (TARGET_32BIT ? DImode : TImode)),
temp); temp);
emit_move_insn (operand_subword (operands[0], 1, 0, (TARGET_32BIT ? DImode : TImode)), emit_move_insn (operand_subword (operands[0], 1, 0, (TARGET_32BIT ? DImode : TImode)),
...@@ -7351,7 +7351,7 @@ ...@@ -7351,7 +7351,7 @@
operand_subword (operands[1], 0, 0, (TARGET_32BIT ? DImode : TImode))); operand_subword (operands[1], 0, 0, (TARGET_32BIT ? DImode : TImode)));
emit_move_insn (operands[0], emit_move_insn (operands[0],
operand_subword (operands[1], 1, 0, (TARGET_32BIT ? DImode : TImode))); operand_subword (operands[1], 1, 0, (TARGET_32BIT ? DImode : TImode)));
emit_move_insn (gen_rtx (MEM, Pmode, operands[0]), temp); emit_move_insn (gen_rtx_MEM (Pmode, operands[0]), temp);
DONE; DONE;
}") }")
...@@ -7409,7 +7409,7 @@ ...@@ -7409,7 +7409,7 @@
(clobber (match_scratch:SI 7 "=l"))] (clobber (match_scratch:SI 7 "=l"))]
"TARGET_64BIT && DEFAULT_ABI == ABI_AIX "TARGET_64BIT && DEFAULT_ABI == ABI_AIX
&& (INTVAL (operands[2]) == CALL_NORMAL || (INTVAL (operands[2]) & CALL_LONG) != 0)" && (INTVAL (operands[2]) == CALL_NORMAL || (INTVAL (operands[2]) & CALL_LONG) != 0)"
"stw %4,%a3\;ld %6,0(%0)\;ld %4,8(%0)\;mt%7 %6\;ld %5,16(%0)\;blrl\;ld %4,%a3" "std %4,%a3\;ld %6,0(%0)\;ld %4,8(%0)\;mt%7 %6\;ld %5,16(%0)\;blrl\;ld %4,%a3"
[(set_attr "type" "load") [(set_attr "type" "load")
(set_attr "length" "28")]) (set_attr "length" "28")])
...@@ -7441,7 +7441,7 @@ ...@@ -7441,7 +7441,7 @@
(clobber (match_scratch:SI 8 "=l"))] (clobber (match_scratch:SI 8 "=l"))]
"TARGET_64BIT && DEFAULT_ABI == ABI_AIX "TARGET_64BIT && DEFAULT_ABI == ABI_AIX
&& (INTVAL (operands[3]) == CALL_NORMAL || (INTVAL (operands[3]) & CALL_LONG) != 0)" && (INTVAL (operands[3]) == CALL_NORMAL || (INTVAL (operands[3]) & CALL_LONG) != 0)"
"stw %5,%a4\;ld %7,0(%1)\;ld %5,8(%1)\;mt%8 %7\;ld %6,16(%1)\;blrl\;ld %5,%a4" "std %5,%a4\;ld %7,0(%1)\;ld %5,8(%1)\;mt%8 %7\;ld %6,16(%1)\;blrl\;ld %5,%a4"
[(set_attr "type" "load") [(set_attr "type" "load")
(set_attr "length" "28")]) (set_attr "length" "28")])
...@@ -7565,13 +7565,13 @@ ...@@ -7565,13 +7565,13 @@
operands[1], operands[2])); operands[1], operands[2]));
else else
{ {
rtx toc_reg = gen_rtx (REG, Pmode, 2); rtx toc_reg = gen_rtx_REG (Pmode, 2);
rtx toc_addr = RS6000_SAVE_TOC; rtx toc_addr = RS6000_SAVE_TOC;
if (DEFAULT_ABI == ABI_AIX) if (DEFAULT_ABI == ABI_AIX)
{ {
/* AIX function pointers are really pointers to a three word area */ /* AIX function pointers are really pointers to a three word area */
rtx static_chain = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM); rtx static_chain = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
emit_call_insn (TARGET_32BIT emit_call_insn (TARGET_32BIT
? gen_call_indirect_aix32 (force_reg (Pmode, operands[0]), ? gen_call_indirect_aix32 (force_reg (Pmode, operands[0]),
operands[1], operands[2], operands[1], operands[2],
...@@ -7627,13 +7627,13 @@ ...@@ -7627,13 +7627,13 @@
operands[2], operands[3])); operands[2], operands[3]));
else else
{ {
rtx toc_reg = gen_rtx (REG, Pmode, 2); rtx toc_reg = gen_rtx_REG (Pmode, 2);
rtx toc_addr = RS6000_SAVE_TOC; rtx toc_addr = RS6000_SAVE_TOC;
if (DEFAULT_ABI == ABI_AIX) if (DEFAULT_ABI == ABI_AIX)
{ {
/* AIX function pointers are really pointers to a three word area */ /* AIX function pointers are really pointers to a three word area */
rtx static_chain = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM); rtx static_chain = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
emit_call_insn (TARGET_32BIT emit_call_insn (TARGET_32BIT
? gen_call_value_indirect_aix32 (operands[0], ? gen_call_value_indirect_aix32 (operands[0],
force_reg (Pmode, operands[1]), force_reg (Pmode, operands[1]),
...@@ -8023,7 +8023,7 @@ ...@@ -8023,7 +8023,7 @@
"" ""
" "
{ enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode;
operands[1] = gen_rtx (COMPARE, mode, operands[1] = gen_rtx_COMPARE (mode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (mode); operands[2] = gen_reg_rtx (mode);
}") }")
...@@ -8038,7 +8038,7 @@ ...@@ -8038,7 +8038,7 @@
"" ""
" "
{ enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode;
operands[1] = gen_rtx (COMPARE, mode, operands[1] = gen_rtx_COMPARE (mode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (mode); operands[2] = gen_reg_rtx (mode);
}") }")
...@@ -8053,7 +8053,7 @@ ...@@ -8053,7 +8053,7 @@
"" ""
" "
{ enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode;
operands[1] = gen_rtx (COMPARE, mode, operands[1] = gen_rtx_COMPARE (mode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (mode); operands[2] = gen_reg_rtx (mode);
}") }")
...@@ -8068,7 +8068,7 @@ ...@@ -8068,7 +8068,7 @@
"" ""
" "
{ enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode;
operands[1] = gen_rtx (COMPARE, mode, operands[1] = gen_rtx_COMPARE (mode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (mode); operands[2] = gen_reg_rtx (mode);
}") }")
...@@ -8083,7 +8083,7 @@ ...@@ -8083,7 +8083,7 @@
"" ""
" "
{ enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode;
operands[1] = gen_rtx (COMPARE, mode, operands[1] = gen_rtx_COMPARE (mode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (mode); operands[2] = gen_reg_rtx (mode);
}") }")
...@@ -8098,7 +8098,7 @@ ...@@ -8098,7 +8098,7 @@
"" ""
" "
{ enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode;
operands[1] = gen_rtx (COMPARE, mode, operands[1] = gen_rtx_COMPARE (mode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (mode); operands[2] = gen_reg_rtx (mode);
}") }")
...@@ -8112,7 +8112,7 @@ ...@@ -8112,7 +8112,7 @@
(pc)))] (pc)))]
"" ""
" "
{ operands[1] = gen_rtx (COMPARE, CCUNSmode, { operands[1] = gen_rtx_COMPARE (CCUNSmode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (CCUNSmode); operands[2] = gen_reg_rtx (CCUNSmode);
}") }")
...@@ -8126,7 +8126,7 @@ ...@@ -8126,7 +8126,7 @@
(pc)))] (pc)))]
"" ""
" "
{ operands[1] = gen_rtx (COMPARE, CCUNSmode, { operands[1] = gen_rtx_COMPARE (CCUNSmode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (CCUNSmode); operands[2] = gen_reg_rtx (CCUNSmode);
}") }")
...@@ -8140,7 +8140,7 @@ ...@@ -8140,7 +8140,7 @@
(pc)))] (pc)))]
"" ""
" "
{ operands[1] = gen_rtx (COMPARE, CCUNSmode, { operands[1] = gen_rtx_COMPARE (CCUNSmode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (CCUNSmode); operands[2] = gen_reg_rtx (CCUNSmode);
}") }")
...@@ -8154,7 +8154,7 @@ ...@@ -8154,7 +8154,7 @@
(pc)))] (pc)))]
"" ""
" "
{ operands[1] = gen_rtx (COMPARE, CCUNSmode, { operands[1] = gen_rtx_COMPARE (CCUNSmode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (CCUNSmode); operands[2] = gen_reg_rtx (CCUNSmode);
}") }")
...@@ -8171,7 +8171,7 @@ ...@@ -8171,7 +8171,7 @@
"" ""
" "
{ enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode;
operands[1] = gen_rtx (COMPARE, mode, operands[1] = gen_rtx_COMPARE (mode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (mode); operands[2] = gen_reg_rtx (mode);
}") }")
...@@ -8185,7 +8185,7 @@ ...@@ -8185,7 +8185,7 @@
{ if (! rs6000_compare_fp_p) { if (! rs6000_compare_fp_p)
FAIL; FAIL;
operands[1] = gen_rtx (COMPARE, CCFPmode, operands[1] = gen_rtx_COMPARE (CCFPmode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (CCFPmode); operands[2] = gen_reg_rtx (CCFPmode);
}") }")
...@@ -8202,7 +8202,7 @@ ...@@ -8202,7 +8202,7 @@
if (! rs6000_compare_fp_p && rs6000_compare_op1 == const0_rtx) if (! rs6000_compare_fp_p && rs6000_compare_op1 == const0_rtx)
FAIL; FAIL;
operands[1] = gen_rtx (COMPARE, mode, operands[1] = gen_rtx_COMPARE (mode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (mode); operands[2] = gen_reg_rtx (mode);
}") }")
...@@ -8219,7 +8219,7 @@ ...@@ -8219,7 +8219,7 @@
if (! rs6000_compare_fp_p && rs6000_compare_op1 == const0_rtx) if (! rs6000_compare_fp_p && rs6000_compare_op1 == const0_rtx)
FAIL; FAIL;
operands[1] = gen_rtx (COMPARE, mode, operands[1] = gen_rtx_COMPARE (mode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (mode); operands[2] = gen_reg_rtx (mode);
}") }")
...@@ -8231,7 +8231,7 @@ ...@@ -8231,7 +8231,7 @@
"" ""
" "
{ enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode;
operands[1] = gen_rtx (COMPARE, mode, operands[1] = gen_rtx_COMPARE (mode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (mode); operands[2] = gen_reg_rtx (mode);
}") }")
...@@ -8248,7 +8248,7 @@ ...@@ -8248,7 +8248,7 @@
if (! rs6000_compare_fp_p && rs6000_compare_op1 == const0_rtx) if (! rs6000_compare_fp_p && rs6000_compare_op1 == const0_rtx)
FAIL; FAIL;
operands[1] = gen_rtx (COMPARE, mode, operands[1] = gen_rtx_COMPARE (mode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (mode); operands[2] = gen_reg_rtx (mode);
}") }")
...@@ -8259,7 +8259,7 @@ ...@@ -8259,7 +8259,7 @@
(gtu:SI (match_dup 2) (const_int 0)))] (gtu:SI (match_dup 2) (const_int 0)))]
"" ""
" "
{ operands[1] = gen_rtx (COMPARE, CCUNSmode, { operands[1] = gen_rtx_COMPARE (CCUNSmode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (CCUNSmode); operands[2] = gen_reg_rtx (CCUNSmode);
}") }")
...@@ -8270,7 +8270,7 @@ ...@@ -8270,7 +8270,7 @@
(ltu:SI (match_dup 2) (const_int 0)))] (ltu:SI (match_dup 2) (const_int 0)))]
"" ""
" "
{ operands[1] = gen_rtx (COMPARE, CCUNSmode, { operands[1] = gen_rtx_COMPARE (CCUNSmode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (CCUNSmode); operands[2] = gen_reg_rtx (CCUNSmode);
}") }")
...@@ -8281,7 +8281,7 @@ ...@@ -8281,7 +8281,7 @@
(geu:SI (match_dup 2) (const_int 0)))] (geu:SI (match_dup 2) (const_int 0)))]
"" ""
" "
{ operands[1] = gen_rtx (COMPARE, CCUNSmode, { operands[1] = gen_rtx_COMPARE (CCUNSmode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (CCUNSmode); operands[2] = gen_reg_rtx (CCUNSmode);
}") }")
...@@ -8292,7 +8292,7 @@ ...@@ -8292,7 +8292,7 @@
(leu:SI (match_dup 2) (const_int 0)))] (leu:SI (match_dup 2) (const_int 0)))]
"" ""
" "
{ operands[1] = gen_rtx (COMPARE, CCUNSmode, { operands[1] = gen_rtx_COMPARE (CCUNSmode,
rs6000_compare_op0, rs6000_compare_op1); rs6000_compare_op0, rs6000_compare_op1);
operands[2] = gen_reg_rtx (CCUNSmode); operands[2] = gen_reg_rtx (CCUNSmode);
}") }")
...@@ -9728,7 +9728,7 @@ ...@@ -9728,7 +9728,7 @@
"" ""
" "
{ operands[0] = force_reg (SImode, operands[0]); { operands[0] = force_reg (SImode, operands[0]);
operands[2] = force_reg (SImode, gen_rtx (LABEL_REF, VOIDmode, operands[1])); operands[2] = force_reg (SImode, gen_rtx_LABEL_REF (VOIDmode, operands[1]));
operands[3] = gen_reg_rtx (SImode); operands[3] = gen_reg_rtx (SImode);
}") }")
...@@ -9741,7 +9741,7 @@ ...@@ -9741,7 +9741,7 @@
"" ""
" "
{ operands[0] = force_reg (DImode, operands[0]); { operands[0] = force_reg (DImode, operands[0]);
operands[2] = force_reg (DImode, gen_rtx (LABEL_REF, VOIDmode, operands[1])); operands[2] = force_reg (DImode, gen_rtx_LABEL_REF (VOIDmode, operands[1]));
operands[3] = gen_reg_rtx (DImode); operands[3] = gen_reg_rtx (DImode);
}") }")
......
gcc/explow.c
...@@ -1238,15 +1238,17 @@ allocate_dynamic_stack_space (size, target, known_align) ...@@ -1238,15 +1238,17 @@ allocate_dynamic_stack_space (size, target, known_align)
#ifdef HAVE_allocate_stack #ifdef HAVE_allocate_stack
if (HAVE_allocate_stack) if (HAVE_allocate_stack)
{ {
enum machine_mode mode = STACK_SIZE_MODE;
if (insn_operand_predicate[(int) CODE_FOR_allocate_stack][0] if (insn_operand_predicate[(int) CODE_FOR_allocate_stack][0]
&& ! ((*insn_operand_predicate[(int) CODE_FOR_allocate_stack][0]) && ! ((*insn_operand_predicate[(int) CODE_FOR_allocate_stack][0])
(target, Pmode))) (target, Pmode)))
target = copy_to_mode_reg (Pmode, target); target = copy_to_mode_reg (Pmode, target);
size = convert_modes (Pmode, ptr_mode, size, 1); size = convert_modes (mode, ptr_mode, size, 1);
if (insn_operand_predicate[(int) CODE_FOR_allocate_stack][1] if (insn_operand_predicate[(int) CODE_FOR_allocate_stack][1]
&& ! ((*insn_operand_predicate[(int) CODE_FOR_allocate_stack][1]) && ! ((*insn_operand_predicate[(int) CODE_FOR_allocate_stack][1])
(size, Pmode))) (size, mode)))
size = copy_to_mode_reg (Pmode, size); size = copy_to_mode_reg (mode, size);
emit_insn (gen_allocate_stack (target, size)); emit_insn (gen_allocate_stack (target, size));
} }
......
gcc/expr.h
...@@ -252,6 +252,13 @@ enum direction {none, upward, downward}; /* Value has this type. */ ...@@ -252,6 +252,13 @@ enum direction {none, upward, downward}; /* Value has this type. */
#define STACK_SAVEAREA_MODE(LEVEL) Pmode #define STACK_SAVEAREA_MODE(LEVEL) Pmode
#endif #endif
/* Supply a default definition of STACK_SIZE_MODE for
allocate_dynamic_stack_space. Normally PLUS/MINUS, so word_mode. */
#ifndef STACK_SIZE_MODE
#define STACK_SIZE_MODE word_mode
#endif
/* Provide default values for the macros controlling stack checking. */ /* Provide default values for the macros controlling stack checking. */
#ifndef STACK_CHECK_BUILTIN #ifndef STACK_CHECK_BUILTIN
......
gcc/tm.texi
...@@ -982,16 +982,27 @@ appropriate sizes. If this macro is undefined, @code{GET_MODE_BITSIZE ...@@ -982,16 +982,27 @@ appropriate sizes. If this macro is undefined, @code{GET_MODE_BITSIZE
@findex STACK_SAVEAREA_MODE @findex STACK_SAVEAREA_MODE
@item STACK_SAVEAREA_MODE (@var{save_level}) @item STACK_SAVEAREA_MODE (@var{save_level})
If defined, an expression of type @code{enum machine_mode} that If defined, an expression of type @code{enum machine_mode} that
specifies the mode of a @code{save_stack_@var{level}} named pattern specifies the mode of the save area operand of a
(@pxref{Standard Names}). @var{save_level} is one of @code{SAVE_BLOCK}, @code{save_stack_@var{level}} named pattern (@pxref{Standard Names}).
@code{SAVE_FUNCTION}, or @code{SAVE_NONLOCAL} and selects which of the @var{save_level} is one of @code{SAVE_BLOCK}, @code{SAVE_FUNCTION}, or
three named patterns is having its mode specified. @code{SAVE_NONLOCAL} and selects which of the three named patterns is
having its mode specified.
You need not define this macro if it always returns @code{Pmode}. You You need not define this macro if it always returns @code{Pmode}. You
would most commonly define this macro if the would most commonly define this macro if the
@code{save_stack_@var{level}} patterns need to support both a 32- and a @code{save_stack_@var{level}} patterns need to support both a 32- and a
64-bit mode. 64-bit mode.
@findex STACK_SIZE_MODE
@item STACK_SIZE_MODE
If defined, an expression of type @code{enum machine_mode} that
specifies the mode of the size increment operand of an
@code{allocate_stack} named pattern (@pxref{Standard Names}).
You need not define this macro if it always returns @code{word_mode}.
You would most commonly define this macro if the @code{allocate_stack}
pattern needs to support both a 32- and a 64-bit mode.
@findex CHECK_FLOAT_VALUE @findex CHECK_FLOAT_VALUE
@item CHECK_FLOAT_VALUE (@var{mode}, @var{value}, @var{overflow}) @item CHECK_FLOAT_VALUE (@var{mode}, @var{value}, @var{overflow})
A C statement to validate the value @var{value} (of type A C statement to validate the value @var{value} (of type
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment