Commit 35e58efb by Wilco Dijkstra

[AArch64] Set SLOW_BYTE_ACCESS

Contrary to all documentation, SLOW_BYTE_ACCESS simply means accessing
bitfields by their declared type, which results in better codegeneration.

gcc/
	* config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
parent 7387153c
2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
2020-01-20 Richard Sandiford <richard.sandiford@arm.com> 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-sve-builtins-base.cc * config/aarch64/aarch64-sve-builtins-base.cc
......
...@@ -1006,14 +1006,8 @@ typedef struct ...@@ -1006,14 +1006,8 @@ typedef struct
if given data not on the nominal alignment. */ if given data not on the nominal alignment. */
#define STRICT_ALIGNMENT TARGET_STRICT_ALIGN #define STRICT_ALIGNMENT TARGET_STRICT_ALIGN
/* Define this macro to be non-zero if accessing less than a word of /* Enable wide bitfield accesses for more efficient bitfield code. */
memory is no faster than accessing a word of memory, i.e., if such #define SLOW_BYTE_ACCESS 1
accesses require more than one instruction or if there is no
difference in cost.
Although there's no difference in instruction count or cycles,
in AArch64 we don't want to expand to a sub-word to a 64-bit access
if we don't have to, for power-saving reasons. */
#define SLOW_BYTE_ACCESS 0
#define NO_FUNCTION_CSE 1 #define NO_FUNCTION_CSE 1
......
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