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Commit 35aba846 by David Edelsohn Committed by David Edelsohn
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rs6000.md (ctrdi): Allocate pseudo for FPR constraint in define_expand, not splitter. 

        * config/rs6000/rs6000.md (ctrdi): Allocate pseudo for FPR
        constraint in define_expand, not splitter.
        Formatting.

From-SVN: r55110
parent b4de2f7d
Showing with 50 additions and 34 deletions
gcc/ChangeLog
2002-06-29 David Edelsohn <edelsohn@gnu.org>
* config/rs6000/rs6000.md (ctrdi): Allocate pseudo for FPR
constraint in define_expand, not splitter.
Formatting.
2002-06-29 Aldy Hernandez <aldyh@redhat.com> 2002-06-29 Aldy Hernandez <aldyh@redhat.com>
* config/i386/i386.c (ix86_init_mmx_sse_builtins): Use * config/i386/i386.c (ix86_init_mmx_sse_builtins): Use
......
gcc/config/rs6000/rs6000.md
...@@ -13333,9 +13333,11 @@ ...@@ -13333,9 +13333,11 @@
(plus:DI (match_dup 0) (plus:DI (match_dup 0)
(const_int -1))) (const_int -1)))
(clobber (match_scratch:CC 2 "")) (clobber (match_scratch:CC 2 ""))
(clobber (match_scratch:DI 3 ""))])] (clobber (match_scratch:DI 3 ""))
(clobber (match_dup 4))])]
"TARGET_POWERPC64" "TARGET_POWERPC64"
"") "
{ operands[4] = gen_reg_rtx (DImode); }")
;; We need to be able to do this for any operand, including MEM, or we ;; We need to be able to do this for any operand, including MEM, or we
;; will cause reload to blow up since we don't allow output reloads on ;; will cause reload to blow up since we don't allow output reloads on
...@@ -13401,7 +13403,8 @@ ...@@ -13401,7 +13403,8 @@
(plus:DI (match_dup 1) (plus:DI (match_dup 1)
(const_int -1))) (const_int -1)))
(clobber (match_scratch:CC 3 "=X,&x,&x,&x")) (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
(clobber (match_scratch:DI 4 "=X,X,r,r"))] (clobber (match_scratch:DI 4 "=X,X,r,r"))
(clobber (match_operand:DI 5 "nonimmediate_operand" "=X,X,X,o"))]
"TARGET_POWERPC64" "TARGET_POWERPC64"
"* "*
{ {
...@@ -13425,7 +13428,8 @@ ...@@ -13425,7 +13428,8 @@
(plus:DI (match_dup 1) (plus:DI (match_dup 1)
(const_int -1))) (const_int -1)))
(clobber (match_scratch:CC 3 "=X,&x,&x,&x")) (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
(clobber (match_scratch:DI 4 "=X,X,r,r"))] (clobber (match_scratch:DI 4 "=X,X,r,r"))
(clobber (match_operand:DI 5 "nonimmediate_operand" "=X,X,X,o"))]
"TARGET_POWERPC64" "TARGET_POWERPC64"
"* "*
{ {
...@@ -13499,7 +13503,8 @@ ...@@ -13499,7 +13503,8 @@
(plus:DI (match_dup 1) (plus:DI (match_dup 1)
(const_int -1))) (const_int -1)))
(clobber (match_scratch:CC 3 "=X,&x,&x,&x")) (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
(clobber (match_scratch:DI 4 "=X,X,r,r"))] (clobber (match_scratch:DI 4 "=X,X,r,r"))
(clobber (match_operand:DI 5 "nonimmediate_operand" "=X,X,X,o"))]
"TARGET_POWERPC64 && find_reg_note (insn, REG_NONNEG, 0)" "TARGET_POWERPC64 && find_reg_note (insn, REG_NONNEG, 0)"
"* "*
{ {
...@@ -13523,7 +13528,8 @@ ...@@ -13523,7 +13528,8 @@
(plus:DI (match_dup 1) (plus:DI (match_dup 1)
(const_int -1))) (const_int -1)))
(clobber (match_scratch:CC 3 "=X,&x,&x,&x")) (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
(clobber (match_scratch:DI 4 "=X,X,r,r"))] (clobber (match_scratch:DI 4 "=X,X,r,r"))
(clobber (match_operand:DI 5 "nonimmediate_operand" "=X,X,X,o"))]
"TARGET_POWERPC64 && find_reg_note (insn, REG_NONNEG, 0)" "TARGET_POWERPC64 && find_reg_note (insn, REG_NONNEG, 0)"
"* "*
{ {
...@@ -13597,7 +13603,8 @@ ...@@ -13597,7 +13603,8 @@
(plus:DI (match_dup 1) (plus:DI (match_dup 1)
(const_int -1))) (const_int -1)))
(clobber (match_scratch:CC 3 "=X,&x,&x,&x")) (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
(clobber (match_scratch:DI 4 "=X,X,r,r"))] (clobber (match_scratch:DI 4 "=X,X,r,r"))
(clobber (match_operand:DI 5 "nonimmediate_operand" "=X,X,X,o"))]
"TARGET_POWERPC64" "TARGET_POWERPC64"
"* "*
{ {
...@@ -13621,7 +13628,8 @@ ...@@ -13621,7 +13628,8 @@
(plus:DI (match_dup 1) (plus:DI (match_dup 1)
(const_int -1))) (const_int -1)))
(clobber (match_scratch:CC 3 "=X,&x,&x,&x")) (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
(clobber (match_scratch:DI 4 "=X,X,r,r"))] (clobber (match_scratch:DI 4 "=X,X,r,r"))
(clobber (match_operand:DI 5 "nonimmediate_operand" "=X,X,X,o"))]
"TARGET_POWERPC64" "TARGET_POWERPC64"
"* "*
{ {
...@@ -13697,13 +13705,14 @@ ...@@ -13697,13 +13705,14 @@
(if_then_else (match_operator 2 "comparison_operator" (if_then_else (match_operator 2 "comparison_operator"
[(match_operand:DI 1 "gpc_reg_operand" "") [(match_operand:DI 1 "gpc_reg_operand" "")
(const_int 1)]) (const_int 1)])
(match_operand 5 "" "") (match_operand 6 "" "")
(match_operand 6 "" ""))) (match_operand 7 "" "")))
(set (match_operand:DI 0 "gpc_reg_operand" "") (set (match_operand:DI 0 "gpc_reg_operand" "")
(plus:DI (match_dup 1) (plus:DI (match_dup 1)
(const_int -1))) (const_int -1)))
(clobber (match_scratch:CC 3 "")) (clobber (match_scratch:CC 3 ""))
(clobber (match_scratch:DI 4 ""))] (clobber (match_scratch:DI 4 ""))
(clobber (match_operand:DI 5 "nonimmediate_operand" ""))]
"TARGET_POWERPC64 && reload_completed && INT_REGNO_P (REGNO (operands[0]))" "TARGET_POWERPC64 && reload_completed && INT_REGNO_P (REGNO (operands[0]))"
[(parallel [(set (match_dup 3) [(parallel [(set (match_dup 3)
(compare:CC (plus:DI (match_dup 1) (compare:CC (plus:DI (match_dup 1)
...@@ -13712,11 +13721,11 @@ ...@@ -13712,11 +13721,11 @@
(set (match_dup 0) (set (match_dup 0)
(plus:DI (match_dup 1) (plus:DI (match_dup 1)
(const_int -1)))]) (const_int -1)))])
(set (pc) (if_then_else (match_dup 7) (set (pc) (if_then_else (match_dup 8)
(match_dup 5) (match_dup 6)
(match_dup 6)))] (match_dup 7)))]
" "
{ operands[7] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3], { operands[8] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
const0_rtx); }") const0_rtx); }")
(define_split (define_split
...@@ -13724,12 +13733,13 @@ ...@@ -13724,12 +13733,13 @@
(if_then_else (match_operator 2 "comparison_operator" (if_then_else (match_operator 2 "comparison_operator"
[(match_operand:DI 1 "gpc_reg_operand" "") [(match_operand:DI 1 "gpc_reg_operand" "")
(const_int 1)]) (const_int 1)])
(match_operand 5 "" "") (match_operand 6 "" "")
(match_operand 6 "" ""))) (match_operand 7 "" "")))
(set (match_operand:DI 0 "nonimmediate_operand" "") (set (match_operand:DI 0 "nonimmediate_operand" "")
(plus:DI (match_dup 1) (const_int -1))) (plus:DI (match_dup 1) (const_int -1)))
(clobber (match_scratch:CC 3 "")) (clobber (match_scratch:CC 3 ""))
(clobber (match_scratch:DI 4 ""))] (clobber (match_scratch:DI 4 ""))
(clobber (match_operand:DI 5 "nonimmediate_operand" ""))]
"TARGET_POWERPC64 && reload_completed "TARGET_POWERPC64 && reload_completed
&& ! gpc_reg_operand (operands[0], DImode)" && ! gpc_reg_operand (operands[0], DImode)"
[(parallel [(set (match_dup 3) [(parallel [(set (match_dup 3)
...@@ -13741,11 +13751,11 @@ ...@@ -13741,11 +13751,11 @@
(const_int -1)))]) (const_int -1)))])
(set (match_dup 0) (set (match_dup 0)
(match_dup 4)) (match_dup 4))
(set (pc) (if_then_else (match_dup 7) (set (pc) (if_then_else (match_dup 8)
(match_dup 5) (match_dup 6)
(match_dup 6)))] (match_dup 7)))]
" "
{ operands[7] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3], { operands[8] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
const0_rtx); }") const0_rtx); }")
(define_split (define_split
...@@ -13753,18 +13763,19 @@ ...@@ -13753,18 +13763,19 @@
(if_then_else (match_operator 2 "comparison_operator" (if_then_else (match_operator 2 "comparison_operator"
[(match_operand:DI 1 "gpc_reg_operand" "") [(match_operand:DI 1 "gpc_reg_operand" "")
(const_int 1)]) (const_int 1)])
(match_operand 5 "" "") (match_operand 6 "" "")
(match_operand 6 "" ""))) (match_operand 7 "" "")))
(set (match_operand:DI 0 "gpc_reg_operand" "") (set (match_operand:DI 0 "gpc_reg_operand" "")
(plus:DI (match_dup 1) (plus:DI (match_dup 1)
(const_int -1))) (const_int -1)))
(clobber (match_scratch:CC 3 "")) (clobber (match_scratch:CC 3 ""))
(clobber (match_scratch:DI 4 ""))] (clobber (match_scratch:DI 4 ""))
(clobber (match_operand:DI 5 "nonimmediate_operand" ""))]
"TARGET_POWERPC64 && reload_completed && FP_REGNO_P (REGNO (operands[0]))" "TARGET_POWERPC64 && reload_completed && FP_REGNO_P (REGNO (operands[0]))"
[(set (match_dup 8) [(set (match_dup 5)
(match_dup 1)) (match_dup 1))
(set (match_dup 4) (set (match_dup 4)
(match_dup 8)) (match_dup 5))
(parallel [(set (match_dup 3) (parallel [(set (match_dup 3)
(compare:CC (plus:DI (match_dup 4) (compare:CC (plus:DI (match_dup 4)
(const_int -1)) (const_int -1))
...@@ -13772,18 +13783,17 @@ ...@@ -13772,18 +13783,17 @@
(set (match_dup 4) (set (match_dup 4)
(plus:DI (match_dup 4) (plus:DI (match_dup 4)
(const_int -1)))]) (const_int -1)))])
(set (match_dup 8) (set (match_dup 5)
(match_dup 4)) (match_dup 4))
(set (match_dup 0) (set (match_dup 0)
(match_dup 8)) (match_dup 5))
(set (pc) (if_then_else (match_dup 7) (set (pc) (if_then_else (match_dup 8)
(match_dup 5) (match_dup 6)
(match_dup 6)))] (match_dup 7)))]
" "
{ {
operands[7] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3], operands[8] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
const0_rtx); const0_rtx);
operands[8] = assign_stack_temp (DImode, GET_MODE_SIZE (DImode), 0);
}") }")
......
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