Commit 318b3009 by Bernd Schmidt Committed by Bernd Schmidt

gcc/:

	From Mike Frysinger  <michael.frysinger@analog.com>
	* config/bfin/bfin-protos.h (bfin_cpu_type): Add BFIN_CPU_BF512,
	BFIN_CPU_BF514, BFIN_CPU_BF516, and BFIN_CPU_BF518.
	* config/bfin/bfin.c (bfin_cpus[]): Add 0.0 for bf512, bf514, bf516,
	and bf518.  Add 0.2 for bf522, bf523, bf524, bf526, and bf527.
	Add 0.6 for bf533, bf532, and bf531.  Add 0.5 for bf538 and bf539.
	Add 0.2 for bf542, bf544, bf547, bf548, and bf549.
	* config/bfin/bfin.h (TARGET_CPU_CPP_BUILTINS): Define __ADSPBF512__
	for BFIN_CPU_BF512, __ADSPBF514__ for BFIN_CPU_BF514, __ADSPBF516__
	for BFIN_CPU_BF516, and __ADSPBF518__ for BFIN_CPU_BF518.  Define
	__ADSPBF51x__ for all of them.
	* config/bfin/elf.h (LIB_SPEC): Select proper linker scripts for
	-mcpu bf512, bf514, bf516, and bf518.
	* config/bfin/t-bfin-elf (MULTILIB_MATCHES): Select bf532-none for
	bf512-none, bf514-none, bf516-none, and bf518-none.
	* config/bfin/t-bfin-linux (MULTILIB_MATCHES): Likewise.
	* config/bfin/t-bfin-uclinux (MULTILIB_MATCHES): Likewise.
	* doc/invoke.texi (Blackfin Options): Document that
	-mcpu now accepts bf512, bf514, bf516, and bf518.

gcc/testsuite/:
	From Mike Frysinger  <michael.frysinger@analog.com>
	* gcc.target/bfin/mcpu-bf522.c: Check SILICON_REVISION is 0x0002.  Invert
	check for __WORKAROUND_RETS when SILICON_REVISION is 0x0002+.
	* gcc.target/bfin/mcpu-bf523.c: Likewise.
	* gcc.target/bfin/mcpu-bf524.c: Likewise.
	* gcc.target/bfin/mcpu-bf525.c: Likewise.
	* gcc.target/bfin/mcpu-bf526.c: Likewise.
	* gcc.target/bfin/mcpu-bf527.c: Likewise.
	* gcc.target/bfin/mcpu-bf531.c: Check SILICON_REVISION is 0x0006.  Invert
	check for __WORKAROUND_RETS when SILICON_REVISION is 0x0006+.
	* gcc.target/bfin/mcpu-bf532.c: Likewise.
	* gcc.target/bfin/mcpu-bf533.c: Likewise.
	* gcc.target/bfin/mcpu-bf538.c: Check SILICON_REVISION is 0x0005.  Invert
	check for __WORKAROUND_RETS when SILICON_REVISION is 0x0005+.
	* gcc.target/bfin/mcpu-bf539.c: Likewise.
	* gcc.target/bfin/mcpu-bf542.c: Check SILICON_REVISION is 0x0002.  Invert
	check for __WORKAROUND_RETS when SILICON_REVISION is 0x0002+.
	* gcc.target/bfin/mcpu-bf544.c: Likewise.
	* gcc.target/bfin/mcpu-bf547.c: Likewise.
	* gcc.target/bfin/mcpu-bf548.c: Likewise.
	* gcc.target/bfin/mcpu-bf549.c: Likewise.
	* gcc.target/bfin/mcpu-bf512.c: New file.
	* gcc.target/bfin/mcpu-bf514.c: Likewise.
	* gcc.target/bfin/mcpu-bf516.c: Likewise.
	* gcc.target/bfin/mcpu-bf518.c: Likewise.

From-SVN: r141305
parent 972afb58
2008-10-22 Bernd Schmidt <bernd.schmidt@analog.com>
From Mike Frysinger <michael.frysinger@analog.com>
* config/bfin/bfin-protos.h (bfin_cpu_type): Add BFIN_CPU_BF512,
BFIN_CPU_BF514, BFIN_CPU_BF516, and BFIN_CPU_BF518.
* config/bfin/bfin.c (bfin_cpus[]): Add 0.0 for bf512, bf514, bf516,
and bf518. Add 0.2 for bf522, bf523, bf524, bf526, and bf527.
Add 0.6 for bf533, bf532, and bf531. Add 0.5 for bf538 and bf539.
Add 0.2 for bf542, bf544, bf547, bf548, and bf549.
* config/bfin/bfin.h (TARGET_CPU_CPP_BUILTINS): Define __ADSPBF512__
for BFIN_CPU_BF512, __ADSPBF514__ for BFIN_CPU_BF514, __ADSPBF516__
for BFIN_CPU_BF516, and __ADSPBF518__ for BFIN_CPU_BF518. Define
__ADSPBF51x__ for all of them.
* config/bfin/elf.h (LIB_SPEC): Select proper linker scripts for
-mcpu bf512, bf514, bf516, and bf518.
* config/bfin/t-bfin-elf (MULTILIB_MATCHES): Select bf532-none for
bf512-none, bf514-none, bf516-none, and bf518-none.
* config/bfin/t-bfin-linux (MULTILIB_MATCHES): Likewise.
* config/bfin/t-bfin-uclinux (MULTILIB_MATCHES): Likewise.
* doc/invoke.texi (Blackfin Options): Document that
-mcpu now accepts bf512, bf514, bf516, and bf518.
2008-10-22 Jakub Jelinek <jakub@redhat.com> 2008-10-22 Jakub Jelinek <jakub@redhat.com>
PR middle-end/37882 PR middle-end/37882
......
...@@ -26,6 +26,10 @@ ...@@ -26,6 +26,10 @@
typedef enum bfin_cpu_type typedef enum bfin_cpu_type
{ {
BFIN_CPU_UNKNOWN, BFIN_CPU_UNKNOWN,
BFIN_CPU_BF512,
BFIN_CPU_BF514,
BFIN_CPU_BF516,
BFIN_CPU_BF518,
BFIN_CPU_BF522, BFIN_CPU_BF522,
BFIN_CPU_BF523, BFIN_CPU_BF523,
BFIN_CPU_BF524, BFIN_CPU_BF524,
......
...@@ -114,36 +114,62 @@ struct bfin_cpu ...@@ -114,36 +114,62 @@ struct bfin_cpu
struct bfin_cpu bfin_cpus[] = struct bfin_cpu bfin_cpus[] =
{ {
{"bf512", BFIN_CPU_BF512, 0x0000,
WA_SPECULATIVE_LOADS},
{"bf514", BFIN_CPU_BF514, 0x0000,
WA_SPECULATIVE_LOADS},
{"bf516", BFIN_CPU_BF516, 0x0000,
WA_SPECULATIVE_LOADS},
{"bf518", BFIN_CPU_BF518, 0x0000,
WA_SPECULATIVE_LOADS},
{"bf522", BFIN_CPU_BF522, 0x0002,
WA_SPECULATIVE_LOADS},
{"bf522", BFIN_CPU_BF522, 0x0001, {"bf522", BFIN_CPU_BF522, 0x0001,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf522", BFIN_CPU_BF522, 0x0000, {"bf522", BFIN_CPU_BF522, 0x0000,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf523", BFIN_CPU_BF523, 0x0002,
WA_SPECULATIVE_LOADS},
{"bf523", BFIN_CPU_BF523, 0x0001, {"bf523", BFIN_CPU_BF523, 0x0001,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf523", BFIN_CPU_BF523, 0x0000, {"bf523", BFIN_CPU_BF523, 0x0000,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf524", BFIN_CPU_BF524, 0x0002,
WA_SPECULATIVE_LOADS},
{"bf524", BFIN_CPU_BF524, 0x0001, {"bf524", BFIN_CPU_BF524, 0x0001,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf524", BFIN_CPU_BF524, 0x0000, {"bf524", BFIN_CPU_BF524, 0x0000,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf525", BFIN_CPU_BF525, 0x0002,
WA_SPECULATIVE_LOADS},
{"bf525", BFIN_CPU_BF525, 0x0001, {"bf525", BFIN_CPU_BF525, 0x0001,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf525", BFIN_CPU_BF525, 0x0000, {"bf525", BFIN_CPU_BF525, 0x0000,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf526", BFIN_CPU_BF526, 0x0002,
WA_SPECULATIVE_LOADS},
{"bf526", BFIN_CPU_BF526, 0x0001, {"bf526", BFIN_CPU_BF526, 0x0001,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf526", BFIN_CPU_BF526, 0x0000, {"bf526", BFIN_CPU_BF526, 0x0000,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf527", BFIN_CPU_BF527, 0x0002,
WA_SPECULATIVE_LOADS},
{"bf527", BFIN_CPU_BF527, 0x0001, {"bf527", BFIN_CPU_BF527, 0x0001,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf527", BFIN_CPU_BF527, 0x0000, {"bf527", BFIN_CPU_BF527, 0x0000,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf531", BFIN_CPU_BF531, 0x0006,
WA_SPECULATIVE_LOADS},
{"bf531", BFIN_CPU_BF531, 0x0005, {"bf531", BFIN_CPU_BF531, 0x0005,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf531", BFIN_CPU_BF531, 0x0004, {"bf531", BFIN_CPU_BF531, 0x0004,
...@@ -151,6 +177,8 @@ struct bfin_cpu bfin_cpus[] = ...@@ -151,6 +177,8 @@ struct bfin_cpu bfin_cpus[] =
{"bf531", BFIN_CPU_BF531, 0x0003, {"bf531", BFIN_CPU_BF531, 0x0003,
WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS},
{"bf532", BFIN_CPU_BF532, 0x0006,
WA_SPECULATIVE_LOADS},
{"bf532", BFIN_CPU_BF532, 0x0005, {"bf532", BFIN_CPU_BF532, 0x0005,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf532", BFIN_CPU_BF532, 0x0004, {"bf532", BFIN_CPU_BF532, 0x0004,
...@@ -158,6 +186,8 @@ struct bfin_cpu bfin_cpus[] = ...@@ -158,6 +186,8 @@ struct bfin_cpu bfin_cpus[] =
{"bf532", BFIN_CPU_BF532, 0x0003, {"bf532", BFIN_CPU_BF532, 0x0003,
WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS},
{"bf533", BFIN_CPU_BF533, 0x0006,
WA_SPECULATIVE_LOADS},
{"bf533", BFIN_CPU_BF533, 0x0005, {"bf533", BFIN_CPU_BF533, 0x0005,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf533", BFIN_CPU_BF533, 0x0004, {"bf533", BFIN_CPU_BF533, 0x0004,
...@@ -186,6 +216,8 @@ struct bfin_cpu bfin_cpus[] = ...@@ -186,6 +216,8 @@ struct bfin_cpu bfin_cpus[] =
{"bf537", BFIN_CPU_BF537, 0x0001, {"bf537", BFIN_CPU_BF537, 0x0001,
WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS},
{"bf538", BFIN_CPU_BF538, 0x0005,
WA_SPECULATIVE_LOADS},
{"bf538", BFIN_CPU_BF538, 0x0004, {"bf538", BFIN_CPU_BF538, 0x0004,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf538", BFIN_CPU_BF538, 0x0003, {"bf538", BFIN_CPU_BF538, 0x0003,
...@@ -193,6 +225,8 @@ struct bfin_cpu bfin_cpus[] = ...@@ -193,6 +225,8 @@ struct bfin_cpu bfin_cpus[] =
{"bf538", BFIN_CPU_BF538, 0x0002, {"bf538", BFIN_CPU_BF538, 0x0002,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf539", BFIN_CPU_BF539, 0x0005,
WA_SPECULATIVE_LOADS},
{"bf539", BFIN_CPU_BF539, 0x0004, {"bf539", BFIN_CPU_BF539, 0x0004,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf539", BFIN_CPU_BF539, 0x0003, {"bf539", BFIN_CPU_BF539, 0x0003,
...@@ -200,26 +234,36 @@ struct bfin_cpu bfin_cpus[] = ...@@ -200,26 +234,36 @@ struct bfin_cpu bfin_cpus[] =
{"bf539", BFIN_CPU_BF539, 0x0002, {"bf539", BFIN_CPU_BF539, 0x0002,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf542", BFIN_CPU_BF542, 0x0002,
WA_SPECULATIVE_LOADS},
{"bf542", BFIN_CPU_BF542, 0x0001, {"bf542", BFIN_CPU_BF542, 0x0001,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf542", BFIN_CPU_BF542, 0x0000, {"bf542", BFIN_CPU_BF542, 0x0000,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf544", BFIN_CPU_BF544, 0x0002,
WA_SPECULATIVE_LOADS},
{"bf544", BFIN_CPU_BF544, 0x0001, {"bf544", BFIN_CPU_BF544, 0x0001,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf544", BFIN_CPU_BF544, 0x0000, {"bf544", BFIN_CPU_BF544, 0x0000,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf547", BFIN_CPU_BF547, 0x0002,
WA_SPECULATIVE_LOADS},
{"bf547", BFIN_CPU_BF547, 0x0001, {"bf547", BFIN_CPU_BF547, 0x0001,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf547", BFIN_CPU_BF547, 0x0000, {"bf547", BFIN_CPU_BF547, 0x0000,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf548", BFIN_CPU_BF548, 0x0002,
WA_SPECULATIVE_LOADS},
{"bf548", BFIN_CPU_BF548, 0x0001, {"bf548", BFIN_CPU_BF548, 0x0001,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf548", BFIN_CPU_BF548, 0x0000, {"bf548", BFIN_CPU_BF548, 0x0000,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf549", BFIN_CPU_BF549, 0x0002,
WA_SPECULATIVE_LOADS},
{"bf549", BFIN_CPU_BF549, 0x0001, {"bf549", BFIN_CPU_BF549, 0x0001,
WA_SPECULATIVE_LOADS | WA_RETS}, WA_SPECULATIVE_LOADS | WA_RETS},
{"bf549", BFIN_CPU_BF549, 0x0000, {"bf549", BFIN_CPU_BF549, 0x0000,
......
...@@ -45,6 +45,22 @@ extern int target_flags; ...@@ -45,6 +45,22 @@ extern int target_flags;
\ \
switch (bfin_cpu_type) \ switch (bfin_cpu_type) \
{ \ { \
case BFIN_CPU_BF512: \
builtin_define ("__ADSPBF512__"); \
builtin_define ("__ADSPBF51x__"); \
break; \
case BFIN_CPU_BF514: \
builtin_define ("__ADSPBF514__"); \
builtin_define ("__ADSPBF51x__"); \
break; \
case BFIN_CPU_BF516: \
builtin_define ("__ADSPBF516__"); \
builtin_define ("__ADSPBF51x__"); \
break; \
case BFIN_CPU_BF518: \
builtin_define ("__ADSPBF518__"); \
builtin_define ("__ADSPBF51x__"); \
break; \
case BFIN_CPU_BF522: \ case BFIN_CPU_BF522: \
builtin_define ("__ADSPBF522__"); \ builtin_define ("__ADSPBF522__"); \
builtin_define ("__ADSPBF52x__"); \ builtin_define ("__ADSPBF52x__"); \
......
...@@ -12,6 +12,8 @@ crti%O%s crtbegin%O%s crtlibid%O%s" ...@@ -12,6 +12,8 @@ crti%O%s crtbegin%O%s crtlibid%O%s"
#undef LIB_SPEC #undef LIB_SPEC
#define LIB_SPEC "--start-group -lc %{msim:-lsim}%{!msim:-lnosys} --end-group \ #define LIB_SPEC "--start-group -lc %{msim:-lsim}%{!msim:-lnosys} --end-group \
%{!T*:%{!msim:%{!msdram: \ %{!T*:%{!msim:%{!msdram: \
%{mcpu=bf512*:-T bf512.ld%s}%{mcpu=bf514*:-T bf514.ld%s} \
%{mcpu=bf516*:-T bf516.ld%s}%{mcpu=bf518*:-T bf518.ld%s} \
%{mcpu=bf522*:-T bf522.ld%s}%{mcpu=bf523*:-T bf523.ld%s} \ %{mcpu=bf522*:-T bf522.ld%s}%{mcpu=bf523*:-T bf523.ld%s} \
%{mcpu=bf524*:-T bf524.ld%s}%{mcpu=bf525*:-T bf525.ld%s} \ %{mcpu=bf524*:-T bf524.ld%s}%{mcpu=bf525*:-T bf525.ld%s} \
%{mcpu=bf526*:-T bf526.ld%s}%{mcpu=bf527*:-T bf527.ld%s} \ %{mcpu=bf526*:-T bf526.ld%s}%{mcpu=bf527*:-T bf527.ld%s} \
......
...@@ -21,7 +21,9 @@ MULTILIB_OPTIONS=mcpu=bf532-none ...@@ -21,7 +21,9 @@ MULTILIB_OPTIONS=mcpu=bf532-none
MULTILIB_OPTIONS+=mid-shared-library/msep-data/mfdpic mleaf-id-shared-library MULTILIB_OPTIONS+=mid-shared-library/msep-data/mfdpic mleaf-id-shared-library
MULTILIB_DIRNAMES=bf532-none mid-shared-library msep-data mfdpic mleaf-id-shared-library MULTILIB_DIRNAMES=bf532-none mid-shared-library msep-data mfdpic mleaf-id-shared-library
MULTILIB_MATCHES=mcpu?bf532-none=mcpu?bf522-none mcpu?bf532-none=mcpu?bf523-none MULTILIB_MATCHES=mcpu?bf532-none=mcpu?bf512-none mcpu?bf532-none=mcpu?bf514-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf516-none mcpu?bf532-none=mcpu?bf518-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf522-none mcpu?bf532-none=mcpu?bf523-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf524-none mcpu?bf532-none=mcpu?bf525-none MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf524-none mcpu?bf532-none=mcpu?bf525-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf526-none mcpu?bf532-none=mcpu?bf527-none MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf526-none mcpu?bf532-none=mcpu?bf527-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf531-none mcpu?bf532-none=mcpu?bf533-none MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf531-none mcpu?bf532-none=mcpu?bf533-none
......
...@@ -20,7 +20,9 @@ TARGET_LIBGCC2_CFLAGS = -fpic ...@@ -20,7 +20,9 @@ TARGET_LIBGCC2_CFLAGS = -fpic
MULTILIB_OPTIONS=mcpu=bf532-none MULTILIB_OPTIONS=mcpu=bf532-none
MULTILIB_DIRNAMES=bf532-none MULTILIB_DIRNAMES=bf532-none
MULTILIB_MATCHES=mcpu?bf532-none=mcpu?bf522-none mcpu?bf532-none=mcpu?bf523-none MULTILIB_MATCHES=mcpu?bf532-none=mcpu?bf512-none mcpu?bf532-none=mcpu?bf514-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf516-none mcpu?bf532-none=mcpu?bf518-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf522-none mcpu?bf532-none=mcpu?bf523-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf524-none mcpu?bf532-none=mcpu?bf525-none MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf524-none mcpu?bf532-none=mcpu?bf525-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf526-none mcpu?bf532-none=mcpu?bf527-none MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf526-none mcpu?bf532-none=mcpu?bf527-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf531-none mcpu?bf532-none=mcpu?bf533-none MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf531-none mcpu?bf532-none=mcpu?bf533-none
......
...@@ -21,7 +21,9 @@ MULTILIB_OPTIONS=mcpu=bf532-none ...@@ -21,7 +21,9 @@ MULTILIB_OPTIONS=mcpu=bf532-none
MULTILIB_OPTIONS+=mid-shared-library/msep-data mleaf-id-shared-library MULTILIB_OPTIONS+=mid-shared-library/msep-data mleaf-id-shared-library
MULTILIB_DIRNAMES=bf532-none mid-shared-library msep-data mleaf-id-shared-library MULTILIB_DIRNAMES=bf532-none mid-shared-library msep-data mleaf-id-shared-library
MULTILIB_MATCHES=mcpu?bf532-none=mcpu?bf522-none mcpu?bf532-none=mcpu?bf523-none MULTILIB_MATCHES=mcpu?bf532-none=mcpu?bf512-none mcpu?bf532-none=mcpu?bf514-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf516-none mcpu?bf532-none=mcpu?bf518-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf522-none mcpu?bf532-none=mcpu?bf523-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf524-none mcpu?bf532-none=mcpu?bf525-none MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf524-none mcpu?bf532-none=mcpu?bf525-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf526-none mcpu?bf532-none=mcpu?bf527-none MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf526-none mcpu?bf532-none=mcpu?bf527-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf531-none mcpu?bf532-none=mcpu?bf533-none MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf531-none mcpu?bf532-none=mcpu?bf533-none
......
...@@ -9119,10 +9119,10 @@ size. ...@@ -9119,10 +9119,10 @@ size.
@item -mcpu=@var{cpu}@r{[}-@var{sirevision}@r{]} @item -mcpu=@var{cpu}@r{[}-@var{sirevision}@r{]}
@opindex mcpu= @opindex mcpu=
Specifies the name of the target Blackfin processor. Currently, @var{cpu} Specifies the name of the target Blackfin processor. Currently, @var{cpu}
can be one of @samp{bf522}, @samp{bf523}, @samp{bf524}, can be one of @samp{bf512}, @samp{bf514}, @samp{bf516}, @samp{bf518},
@samp{bf525}, @samp{bf526}, @samp{bf527}, @samp{bf522}, @samp{bf523}, @samp{bf524}, @samp{bf525}, @samp{bf526},
@samp{bf531}, @samp{bf532}, @samp{bf533}, @samp{bf534}, @samp{bf527}, @samp{bf531}, @samp{bf532}, @samp{bf533},
@samp{bf536}, @samp{bf537}, @samp{bf538}, @samp{bf539}, @samp{bf534}, @samp{bf536}, @samp{bf537}, @samp{bf538}, @samp{bf539},
@samp{bf542}, @samp{bf544}, @samp{bf547}, @samp{bf548}, @samp{bf549}, @samp{bf542}, @samp{bf544}, @samp{bf547}, @samp{bf548}, @samp{bf549},
@samp{bf561}. @samp{bf561}.
The optional @var{sirevision} specifies the silicon revision of the target The optional @var{sirevision} specifies the silicon revision of the target
......
2008-10-22 Bernd Schmidt <bernd.schmidt@analog.com>
From Mike Frysinger <michael.frysinger@analog.com>
* gcc.target/bfin/mcpu-bf522.c: Check SILICON_REVISION is 0x0002. Invert
check for __WORKAROUND_RETS when SILICON_REVISION is 0x0002+.
* gcc.target/bfin/mcpu-bf523.c: Likewise.
* gcc.target/bfin/mcpu-bf524.c: Likewise.
* gcc.target/bfin/mcpu-bf525.c: Likewise.
* gcc.target/bfin/mcpu-bf526.c: Likewise.
* gcc.target/bfin/mcpu-bf527.c: Likewise.
* gcc.target/bfin/mcpu-bf531.c: Check SILICON_REVISION is 0x0006. Invert
check for __WORKAROUND_RETS when SILICON_REVISION is 0x0006+.
* gcc.target/bfin/mcpu-bf532.c: Likewise.
* gcc.target/bfin/mcpu-bf533.c: Likewise.
* gcc.target/bfin/mcpu-bf538.c: Check SILICON_REVISION is 0x0005. Invert
check for __WORKAROUND_RETS when SILICON_REVISION is 0x0005+.
* gcc.target/bfin/mcpu-bf539.c: Likewise.
* gcc.target/bfin/mcpu-bf542.c: Check SILICON_REVISION is 0x0002. Invert
check for __WORKAROUND_RETS when SILICON_REVISION is 0x0002+.
* gcc.target/bfin/mcpu-bf544.c: Likewise.
* gcc.target/bfin/mcpu-bf547.c: Likewise.
* gcc.target/bfin/mcpu-bf548.c: Likewise.
* gcc.target/bfin/mcpu-bf549.c: Likewise.
* gcc.target/bfin/mcpu-bf512.c: New file.
* gcc.target/bfin/mcpu-bf514.c: Likewise.
* gcc.target/bfin/mcpu-bf516.c: Likewise.
* gcc.target/bfin/mcpu-bf518.c: Likewise.
2008-10-22 Jakub Jelinek <jakub@redhat.com> 2008-10-22 Jakub Jelinek <jakub@redhat.com>
PR middle-end/37882 PR middle-end/37882
......
/* Test for -mcpu=. */
/* { dg-do preprocess } */
/* { dg-bfin-options "-mcpu=bf512" } */
#ifndef __ADSPBF512__
#error "__ADSPBF512__ is not defined"
#endif
#ifndef __ADSPBF51x__
#error "__ADSPBF51x__ is not defined"
#endif
#if __SILICON_REVISION__ != 0x0000
#error "__SILICON_REVISION__ is not 0x0000"
#endif
#ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined"
#endif
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
#endif
#ifdef __WORKAROUND_SPECULATIVE_SYNCS
#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
#endif
/* Test for -mcpu=. */
/* { dg-do preprocess } */
/* { dg-bfin-options "-mcpu=bf512" } */
#ifndef __ADSPBF512__
#error "__ADSPBF512__ is not defined"
#endif
#ifndef __ADSPBF51x__
#error "__ADSPBF51x__ is not defined"
#endif
#if __SILICON_REVISION__ != 0x0000
#error "__SILICON_REVISION__ is not 0x0000"
#endif
#ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined"
#endif
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
#endif
#ifdef __WORKAROUND_SPECULATIVE_SYNCS
#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
#endif
/* Test for -mcpu=. */
/* { dg-do preprocess } */
/* { dg-bfin-options "-mcpu=bf514" } */
#ifndef __ADSPBF514__
#error "__ADSPBF514__ is not defined"
#endif
#ifndef __ADSPBF51x__
#error "__ADSPBF51x__ is not defined"
#endif
#if __SILICON_REVISION__ != 0x0000
#error "__SILICON_REVISION__ is not 0x0000"
#endif
#ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined"
#endif
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
#endif
#ifdef __WORKAROUND_SPECULATIVE_SYNCS
#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
#endif
/* Test for -mcpu=. */
/* { dg-do preprocess } */
/* { dg-bfin-options "-mcpu=bf514" } */
#ifndef __ADSPBF514__
#error "__ADSPBF514__ is not defined"
#endif
#ifndef __ADSPBF51x__
#error "__ADSPBF51x__ is not defined"
#endif
#if __SILICON_REVISION__ != 0x0000
#error "__SILICON_REVISION__ is not 0x0000"
#endif
#ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined"
#endif
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
#endif
#ifdef __WORKAROUND_SPECULATIVE_SYNCS
#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
#endif
/* Test for -mcpu=. */
/* { dg-do preprocess } */
/* { dg-bfin-options "-mcpu=bf516" } */
#ifndef __ADSPBF516__
#error "__ADSPBF516__ is not defined"
#endif
#ifndef __ADSPBF51x__
#error "__ADSPBF51x__ is not defined"
#endif
#if __SILICON_REVISION__ != 0x0000
#error "__SILICON_REVISION__ is not 0x0000"
#endif
#ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined"
#endif
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
#endif
#ifdef __WORKAROUND_SPECULATIVE_SYNCS
#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
#endif
/* Test for -mcpu=. */
/* { dg-do preprocess } */
/* { dg-bfin-options "-mcpu=bf516" } */
#ifndef __ADSPBF516__
#error "__ADSPBF516__ is not defined"
#endif
#ifndef __ADSPBF51x__
#error "__ADSPBF51x__ is not defined"
#endif
#if __SILICON_REVISION__ != 0x0000
#error "__SILICON_REVISION__ is not 0x0000"
#endif
#ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined"
#endif
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
#endif
#ifdef __WORKAROUND_SPECULATIVE_SYNCS
#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
#endif
/* Test for -mcpu=. */
/* { dg-do preprocess } */
/* { dg-bfin-options "-mcpu=bf518" } */
#ifndef __ADSPBF518__
#error "__ADSPBF518__ is not defined"
#endif
#ifndef __ADSPBF51x__
#error "__ADSPBF51x__ is not defined"
#endif
#if __SILICON_REVISION__ != 0x0000
#error "__SILICON_REVISION__ is not 0x0000"
#endif
#ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined"
#endif
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
#endif
#ifdef __WORKAROUND_SPECULATIVE_SYNCS
#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
#endif
/* Test for -mcpu=. */
/* { dg-do preprocess } */
/* { dg-bfin-options "-mcpu=bf518" } */
#ifndef __ADSPBF518__
#error "__ADSPBF518__ is not defined"
#endif
#ifndef __ADSPBF51x__
#error "__ADSPBF51x__ is not defined"
#endif
#if __SILICON_REVISION__ != 0x0000
#error "__SILICON_REVISION__ is not 0x0000"
#endif
#ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined"
#endif
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
#endif
#ifdef __WORKAROUND_SPECULATIVE_SYNCS
#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
#endif
...@@ -10,17 +10,23 @@ ...@@ -10,17 +10,23 @@
#error "__ADSPBF52x__ is not defined" #error "__ADSPBF52x__ is not defined"
#endif #endif
#if __SILICON_REVISION__ != 0x0001 #if __SILICON_REVISION__ != 0x0002
#error "__SILICON_REVISION__ is not 0x0001" #error "__SILICON_REVISION__ is not 0x0002"
#endif #endif
#ifndef __WORKAROUNDS_ENABLED #ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined" #error "__WORKAROUNDS_ENABLED is not defined"
#endif #endif
#if __SILICON_REVISION__ <= 0x0001
#ifndef __WORKAROUND_RETS #ifndef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is not defined" #error "__WORKAROUND_RETS is not defined"
#endif #endif
#else
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS #ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" #error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
......
...@@ -10,17 +10,23 @@ ...@@ -10,17 +10,23 @@
#error "__ADSPBF52x__ is not defined" #error "__ADSPBF52x__ is not defined"
#endif #endif
#if __SILICON_REVISION__ != 0x0001 #if __SILICON_REVISION__ != 0x0002
#error "__SILICON_REVISION__ is not 0x0001" #error "__SILICON_REVISION__ is not 0x0002"
#endif #endif
#ifndef __WORKAROUNDS_ENABLED #ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined" #error "__WORKAROUNDS_ENABLED is not defined"
#endif #endif
#if __SILICON_REVISION__ <= 0x0001
#ifndef __WORKAROUND_RETS #ifndef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is not defined" #error "__WORKAROUND_RETS is not defined"
#endif #endif
#else
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS #ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" #error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
......
...@@ -10,17 +10,23 @@ ...@@ -10,17 +10,23 @@
#error "__ADSPBF52x__ is not defined" #error "__ADSPBF52x__ is not defined"
#endif #endif
#if __SILICON_REVISION__ != 0x0001 #if __SILICON_REVISION__ != 0x0002
#error "__SILICON_REVISION__ is not 0x0001" #error "__SILICON_REVISION__ is not 0x0002"
#endif #endif
#ifndef __WORKAROUNDS_ENABLED #ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined" #error "__WORKAROUNDS_ENABLED is not defined"
#endif #endif
#if __SILICON_REVISION__ <= 0x0001
#ifndef __WORKAROUND_RETS #ifndef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is not defined" #error "__WORKAROUND_RETS is not defined"
#endif #endif
#else
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS #ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" #error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
......
...@@ -10,17 +10,23 @@ ...@@ -10,17 +10,23 @@
#error "__ADSPBF52x__ is not defined" #error "__ADSPBF52x__ is not defined"
#endif #endif
#if __SILICON_REVISION__ != 0x0001 #if __SILICON_REVISION__ != 0x0002
#error "__SILICON_REVISION__ is not 0x0001" #error "__SILICON_REVISION__ is not 0x0002"
#endif #endif
#ifndef __WORKAROUNDS_ENABLED #ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined" #error "__WORKAROUNDS_ENABLED is not defined"
#endif #endif
#if __SILICON_REVISION__ <= 0x0001
#ifndef __WORKAROUND_RETS #ifndef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is not defined" #error "__WORKAROUND_RETS is not defined"
#endif #endif
#else
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS #ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" #error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
......
...@@ -10,17 +10,23 @@ ...@@ -10,17 +10,23 @@
#error "__ADSPBF52x__ is not defined" #error "__ADSPBF52x__ is not defined"
#endif #endif
#if __SILICON_REVISION__ != 0x0001 #if __SILICON_REVISION__ != 0x0002
#error "__SILICON_REVISION__ is not 0x0001" #error "__SILICON_REVISION__ is not 0x0002"
#endif #endif
#ifndef __WORKAROUNDS_ENABLED #ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined" #error "__WORKAROUNDS_ENABLED is not defined"
#endif #endif
#if __SILICON_REVISION__ <= 0x0001
#ifndef __WORKAROUND_RETS #ifndef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is not defined" #error "__WORKAROUND_RETS is not defined"
#endif #endif
#else
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS #ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" #error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
......
...@@ -10,17 +10,23 @@ ...@@ -10,17 +10,23 @@
#error "__ADSPBF52x__ is not defined" #error "__ADSPBF52x__ is not defined"
#endif #endif
#if __SILICON_REVISION__ != 0x0001 #if __SILICON_REVISION__ != 0x0002
#error "__SILICON_REVISION__ is not 0x0001" #error "__SILICON_REVISION__ is not 0x0002"
#endif #endif
#ifndef __WORKAROUNDS_ENABLED #ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined" #error "__WORKAROUNDS_ENABLED is not defined"
#endif #endif
#if __SILICON_REVISION__ <= 0x0001
#ifndef __WORKAROUND_RETS #ifndef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is not defined" #error "__WORKAROUND_RETS is not defined"
#endif #endif
#else
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS #ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" #error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
......
...@@ -6,17 +6,23 @@ ...@@ -6,17 +6,23 @@
#error "__ADSPBF531__ is not defined" #error "__ADSPBF531__ is not defined"
#endif #endif
#if __SILICON_REVISION__ != 0x0005 #if __SILICON_REVISION__ != 0x0006
#error "__SILICON_REVISION__ is not 0x0005" #error "__SILICON_REVISION__ is not 0x0006"
#endif #endif
#ifndef __WORKAROUNDS_ENABLED #ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined" #error "__WORKAROUNDS_ENABLED is not defined"
#endif #endif
#if __SILICON_REVISION__ <= 0x0005
#ifndef __WORKAROUND_RETS #ifndef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is not defined" #error "__WORKAROUND_RETS is not defined"
#endif #endif
#else
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS #ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" #error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
......
...@@ -6,17 +6,23 @@ ...@@ -6,17 +6,23 @@
#error "__ADSPBF532__ is not defined" #error "__ADSPBF532__ is not defined"
#endif #endif
#if __SILICON_REVISION__ != 0x0005 #if __SILICON_REVISION__ != 0x0006
#error "__SILICON_REVISION__ is not 0x0005" #error "__SILICON_REVISION__ is not 0x0006"
#endif #endif
#ifndef __WORKAROUNDS_ENABLED #ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined" #error "__WORKAROUNDS_ENABLED is not defined"
#endif #endif
#if __SILICON_REVISION__ <= 0x0005
#ifndef __WORKAROUND_RETS #ifndef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is not defined" #error "__WORKAROUND_RETS is not defined"
#endif #endif
#else
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS #ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" #error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
......
...@@ -6,17 +6,23 @@ ...@@ -6,17 +6,23 @@
#error "__ADSPBF533__ is not defined" #error "__ADSPBF533__ is not defined"
#endif #endif
#if __SILICON_REVISION__ != 0x0005 #if __SILICON_REVISION__ != 0x0006
#error "__SILICON_REVISION__ is not 0x0005" #error "__SILICON_REVISION__ is not 0x0006"
#endif #endif
#ifndef __WORKAROUNDS_ENABLED #ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined" #error "__WORKAROUNDS_ENABLED is not defined"
#endif #endif
#if __SILICON_REVISION__ <= 0x0005
#ifndef __WORKAROUND_RETS #ifndef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is not defined" #error "__WORKAROUND_RETS is not defined"
#endif #endif
#else
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS #ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" #error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
......
...@@ -6,17 +6,23 @@ ...@@ -6,17 +6,23 @@
#error "__ADSPBF538__ is not defined" #error "__ADSPBF538__ is not defined"
#endif #endif
#if __SILICON_REVISION__ != 0x0004 #if __SILICON_REVISION__ != 0x0005
#error "__SILICON_REVISION__ is not 0x0004" #error "__SILICON_REVISION__ is not 0x0005"
#endif #endif
#ifndef __WORKAROUNDS_ENABLED #ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined" #error "__WORKAROUNDS_ENABLED is not defined"
#endif #endif
#if __SILICON_REVISION__ <= 0x0004
#ifndef __WORKAROUND_RETS #ifndef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is not defined" #error "__WORKAROUND_RETS is not defined"
#endif #endif
#else
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS #ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" #error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
......
...@@ -6,17 +6,23 @@ ...@@ -6,17 +6,23 @@
#error "__ADSPBF539__ is not defined" #error "__ADSPBF539__ is not defined"
#endif #endif
#if __SILICON_REVISION__ != 0x0004 #if __SILICON_REVISION__ != 0x0005
#error "__SILICON_REVISION__ is not 0x0004" #error "__SILICON_REVISION__ is not 0x0005"
#endif #endif
#ifndef __WORKAROUNDS_ENABLED #ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined" #error "__WORKAROUNDS_ENABLED is not defined"
#endif #endif
#if __SILICON_REVISION__ <= 0x0004
#ifndef __WORKAROUND_RETS #ifndef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is not defined" #error "__WORKAROUND_RETS is not defined"
#endif #endif
#else
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS #ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" #error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
......
...@@ -10,17 +10,23 @@ ...@@ -10,17 +10,23 @@
#error "__ADSPBF54x__ is not defined" #error "__ADSPBF54x__ is not defined"
#endif #endif
#if __SILICON_REVISION__ != 0x0001 #if __SILICON_REVISION__ != 0x0002
#error "__SILICON_REVISION__ is not 0x0001" #error "__SILICON_REVISION__ is not 0x0002"
#endif #endif
#ifndef __WORKAROUNDS_ENABLED #ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined" #error "__WORKAROUNDS_ENABLED is not defined"
#endif #endif
#if __SILICON_REVISION__ <= 0x0001
#ifndef __WORKAROUND_RETS #ifndef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is not defined" #error "__WORKAROUND_RETS is not defined"
#endif #endif
#else
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS #ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" #error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
......
...@@ -10,17 +10,23 @@ ...@@ -10,17 +10,23 @@
#error "__ADSPBF54x__ is not defined" #error "__ADSPBF54x__ is not defined"
#endif #endif
#if __SILICON_REVISION__ != 0x0001 #if __SILICON_REVISION__ != 0x0002
#error "__SILICON_REVISION__ is not 0x0001" #error "__SILICON_REVISION__ is not 0x0002"
#endif #endif
#ifndef __WORKAROUNDS_ENABLED #ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined" #error "__WORKAROUNDS_ENABLED is not defined"
#endif #endif
#if __SILICON_REVISION__ <= 0x0001
#ifndef __WORKAROUND_RETS #ifndef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is not defined" #error "__WORKAROUND_RETS is not defined"
#endif #endif
#else
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS #ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" #error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
......
...@@ -10,17 +10,23 @@ ...@@ -10,17 +10,23 @@
#error "__ADSPBF54x__ is not defined" #error "__ADSPBF54x__ is not defined"
#endif #endif
#if __SILICON_REVISION__ != 0x0001 #if __SILICON_REVISION__ != 0x0002
#error "__SILICON_REVISION__ is not 0x0001" #error "__SILICON_REVISION__ is not 0x0002"
#endif #endif
#ifndef __WORKAROUNDS_ENABLED #ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined" #error "__WORKAROUNDS_ENABLED is not defined"
#endif #endif
#if __SILICON_REVISION__ <= 0x0001
#ifndef __WORKAROUND_RETS #ifndef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is not defined" #error "__WORKAROUND_RETS is not defined"
#endif #endif
#else
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS #ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" #error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
......
...@@ -10,17 +10,23 @@ ...@@ -10,17 +10,23 @@
#error "__ADSPBF54x__ is not defined" #error "__ADSPBF54x__ is not defined"
#endif #endif
#if __SILICON_REVISION__ != 0x0001 #if __SILICON_REVISION__ != 0x0002
#error "__SILICON_REVISION__ is not 0x0001" #error "__SILICON_REVISION__ is not 0x0002"
#endif #endif
#ifndef __WORKAROUNDS_ENABLED #ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined" #error "__WORKAROUNDS_ENABLED is not defined"
#endif #endif
#if __SILICON_REVISION__ <= 0x0001
#ifndef __WORKAROUND_RETS #ifndef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is not defined" #error "__WORKAROUND_RETS is not defined"
#endif #endif
#else
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS #ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" #error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
......
...@@ -10,17 +10,23 @@ ...@@ -10,17 +10,23 @@
#error "__ADSPBF54x__ is not defined" #error "__ADSPBF54x__ is not defined"
#endif #endif
#if __SILICON_REVISION__ != 0x0001 #if __SILICON_REVISION__ != 0x0002
#error "__SILICON_REVISION__ is not 0x0001" #error "__SILICON_REVISION__ is not 0x0002"
#endif #endif
#ifndef __WORKAROUNDS_ENABLED #ifndef __WORKAROUNDS_ENABLED
#error "__WORKAROUNDS_ENABLED is not defined" #error "__WORKAROUNDS_ENABLED is not defined"
#endif #endif
#if __SILICON_REVISION__ <= 0x0001
#ifndef __WORKAROUND_RETS #ifndef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is not defined" #error "__WORKAROUND_RETS is not defined"
#endif #endif
#else
#ifdef __WORKAROUND_RETS
#error "__WORKAROUND_RETS is defined"
#endif
#endif
#ifndef __WORKAROUND_SPECULATIVE_LOADS #ifndef __WORKAROUND_SPECULATIVE_LOADS
#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" #error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
......
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