Commit 2e5505a4 by Richard Earnshaw Committed by Richard Earnshaw

re PR target/43469 (ICE trying to compile glibc for ARM thumb2)

	PR target/43469
	* arm.c (legitimize_tls_address): Adjust call to 
	gen_tls_load_dot_plus_four.
	(arm_note_pic_base): New function.
	(arm_cannot_copy_insn_p): Use it.
	* thumb2.md (tls_load_dot_plus_four): Rework to avoid use of '+' in
	constraint.

From-SVN: r157942
parent bdfbd9df
2010-04-02 Richard Earnshaw <rearnsha@arm.com>
PR target/43469
* arm.c (legitimize_tls_address): Adjust call to
gen_tls_load_dot_plus_four.
(arm_note_pic_base): New function.
(arm_cannot_copy_insn_p): Use it.
* thumb2.md (tls_load_dot_plus_four): Rework to avoid use of '+' in
constraint.
2010-04-02 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> 2010-04-02 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
PR bootstrap/43531 PR bootstrap/43531
......
...@@ -5843,7 +5843,7 @@ legitimize_tls_address (rtx x, rtx reg) ...@@ -5843,7 +5843,7 @@ legitimize_tls_address (rtx x, rtx reg)
if (TARGET_ARM) if (TARGET_ARM)
emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno)); emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno));
else if (TARGET_THUMB2) else if (TARGET_THUMB2)
emit_insn (gen_tls_load_dot_plus_four (reg, reg, labelno)); emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg, labelno));
else else
{ {
emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno)); emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
...@@ -8801,28 +8801,21 @@ tls_mentioned_p (rtx x) ...@@ -8801,28 +8801,21 @@ tls_mentioned_p (rtx x)
} }
} }
/* Must not copy a SET whose source operand is PC-relative. */ /* Must not copy any rtx that uses a pc-relative address. */
static int
arm_note_pic_base (rtx *x, void *date ATTRIBUTE_UNUSED)
{
if (GET_CODE (*x) == UNSPEC
&& XINT (*x, 1) == UNSPEC_PIC_BASE)
return 1;
return 0;
}
static bool static bool
arm_cannot_copy_insn_p (rtx insn) arm_cannot_copy_insn_p (rtx insn)
{ {
rtx pat = PATTERN (insn); return for_each_rtx (&PATTERN (insn), arm_note_pic_base, NULL);
if (GET_CODE (pat) == SET)
{
rtx rhs = SET_SRC (pat);
if (GET_CODE (rhs) == UNSPEC
&& XINT (rhs, 1) == UNSPEC_PIC_BASE)
return TRUE;
if (GET_CODE (rhs) == MEM
&& GET_CODE (XEXP (rhs, 0)) == UNSPEC
&& XINT (XEXP (rhs, 0), 1) == UNSPEC_PIC_BASE)
return TRUE;
}
return FALSE;
} }
enum rtx_code enum rtx_code
......
...@@ -244,18 +244,19 @@ ...@@ -244,18 +244,19 @@
) )
(define_insn "tls_load_dot_plus_four" (define_insn "tls_load_dot_plus_four"
[(set (match_operand:SI 0 "register_operand" "=l,r") [(set (match_operand:SI 0 "register_operand" "=l,l,r,r")
(mem:SI (unspec:SI [(match_operand:SI 1 "register_operand" "+l,r") (mem:SI (unspec:SI [(match_operand:SI 2 "register_operand" "0,1,0,1")
(const_int 4) (const_int 4)
(match_operand 2 "" "")] (match_operand 3 "" "")]
UNSPEC_PIC_BASE)))] UNSPEC_PIC_BASE)))
(clobber (match_scratch:SI 1 "=X,l,X,r"))]
"TARGET_THUMB2" "TARGET_THUMB2"
"* "*
(*targetm.asm_out.internal_label) (asm_out_file, \"LPIC\", (*targetm.asm_out.internal_label) (asm_out_file, \"LPIC\",
INTVAL (operands[2])); INTVAL (operands[3]));
return \"add\\t%1, %|pc\;ldr%?\\t%0, [%1]\"; return \"add\\t%2, %|pc\;ldr%?\\t%0, [%2]\";
" "
[(set_attr "length" "4,6")] [(set_attr "length" "4,4,6,6")]
) )
;; Thumb-2 always has load/store halfword instructions, so we can avoid a lot ;; Thumb-2 always has load/store halfword instructions, so we can avoid a lot
......
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