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riscv-gcc-1
Commit 2c338472 by Kazu Hirata Committed by Kazu Hirata
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avr.c: Fix comment formatting. 

	* config/avr/avr.c: Fix comment formatting.
	* config/avr/avr.md: Likewise.

From-SVN: r75011
parent baac771a
Showing with 27 additions and 22 deletions
gcc/ChangeLog
2003-12-24 Kazu Hirata <kazu@cs.umass.edu>
* config/avr/avr.c: Fix comment formatting.
* config/avr/avr.md: Likewise.
2003-12-24 Kazu Hirata <kazu@cs.umass.edu>
PR target/12721.
* config/avr/avr.c: Include ggc.h.
(tmp_reg_rtx): Declare with GTY.
......
gcc/config/avr/avr.c
......@@ -78,7 +78,7 @@ static int default_rtx_costs (rtx, enum rtx_code, enum rtx_code);
static bool avr_rtx_costs (rtx, int, int, int *);
static int avr_address_cost (rtx);
/* Allocate registers from r25 to r8 for parameters for function calls */
/* Allocate registers from r25 to r8 for parameters for function calls. */
#define FIRST_CUM_REG 26
/* Temporary register RTX (gen_rtx (REG,QImode,TMP_REGNO)) */
......@@ -276,7 +276,7 @@ avr_override_options (void)
zero_reg_rtx = gen_rtx_REG (QImode, ZERO_REGNO);
}
/* return register class from register number */
/* return register class from register number. */
static const int reg_class_tab[]={
GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,
......@@ -292,7 +292,7 @@ static const int reg_class_tab[]={
STACK_REG,STACK_REG /* SPL,SPH */
};
/* Return register class for register R */
/* Return register class for register R. */
enum reg_class
avr_regno_reg_class (int r)
......@@ -415,7 +415,7 @@ avr_regs_to_save (HARD_REG_SET *set)
return count;
}
/* Compute offset between arg_pointer and frame_pointer */
/* Compute offset between arg_pointer and frame_pointer. */
int
initial_elimination_offset (int from, int to)
......@@ -446,7 +446,7 @@ avr_simple_epilogue (void)
&& ! TREE_THIS_VOLATILE (current_function_decl));
}
/* This function checks sequence of live registers */
/* This function checks sequence of live registers. */
static int
sequent_regs_live (void)
......@@ -603,7 +603,7 @@ out_set_stack_ptr (FILE *file, int before, int after)
}
/* Output function prologue */
/* Output function prologue. */
static void
avr_output_function_prologue (FILE *file, HOST_WIDE_INT size)
......@@ -733,7 +733,7 @@ avr_output_function_prologue (FILE *file, HOST_WIDE_INT size)
fprintf (file, "/* prologue end (size=%d) */\n", prologue_size);
}
/* Output function epilogue */
/* Output function epilogue. */
static void
avr_output_function_epilogue (FILE *file, HOST_WIDE_INT size)
......@@ -980,7 +980,7 @@ legitimize_address (rtx x, rtx oldx, enum machine_mode mode)
}
/* Return a pointer register name as a string */
/* Return a pointer register name as a string. */
static const char *
ptrreg_to_str (int regno)
......@@ -1027,7 +1027,7 @@ cond_string (enum rtx_code code)
}
}
/* Output ADDR to FILE as address */
/* Output ADDR to FILE as address. */
void
print_operand_address (FILE *file, rtx addr)
......@@ -1061,7 +1061,7 @@ print_operand_address (FILE *file, rtx addr)
}
/* Output X as assembler operand to file FILE */
/* Output X as assembler operand to file FILE. */
void
print_operand (FILE *file, rtx x, int code)
......@@ -1132,7 +1132,7 @@ print_operand (FILE *file, rtx x, int code)
print_operand_address (file, x);
}
/* Recognize operand OP of mode MODE used in call instructions */
/* Recognize operand OP of mode MODE used in call instructions. */
int
call_insn_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
......@@ -2592,7 +2592,7 @@ out_movhi_mr_r (rtx insn, rtx op[], int *l)
return "";
}
/* Return 1 if frame pointer for current function required */
/* Return 1 if frame pointer for current function required. */
int
frame_pointer_required_p (void)
......@@ -2648,7 +2648,7 @@ compare_eq_p (rtx insn)
}
/* Output test instruction for HImode */
/* Output test instruction for HImode. */
const char *
out_tsthi (rtx insn, int *l)
......@@ -2661,7 +2661,7 @@ out_tsthi (rtx insn, int *l)
if (reg_unused_after (insn, SET_SRC (PATTERN (insn)))
&& compare_eq_p (insn))
{
/* faster than sbiw if we can clobber the operand */
/* Faster than sbiw if we can clobber the operand. */
if (l) *l = 1;
return AS2 (or,%A0,%B0);
}
......@@ -2676,7 +2676,7 @@ out_tsthi (rtx insn, int *l)
}
/* Output test instruction for SImode */
/* Output test instruction for SImode. */
const char *
out_tstsi (rtx insn, int *l)
......@@ -4215,7 +4215,7 @@ adjust_insn_length (rtx insn, int len)
return len;
}
/* Return nonzero if register REG dead after INSN */
/* Return nonzero if register REG dead after INSN. */
int
reg_unused_after (rtx insn, rtx reg)
......@@ -4346,7 +4346,7 @@ avr_assemble_integer (rtx x, unsigned int size, int aligned_p)
return default_assemble_integer (x, size, aligned_p);
}
/* Sets section name for declaration DECL */
/* Sets section name for declaration DECL. */
static void
avr_unique_section (tree decl, int reloc ATTRIBUTE_UNUSED)
......@@ -4838,7 +4838,7 @@ avr_rtx_costs (rtx x, int code, int outer_code, int *total)
}
}
/* Calculate the cost of a memory address */
/* Calculate the cost of a memory address. */
static int
avr_address_cost (rtx x)
......@@ -4903,7 +4903,7 @@ extra_constraint (rtx x, int c)
return 0;
}
/* Convert condition code CONDITION to the valid AVR condition code */
/* Convert condition code CONDITION to the valid AVR condition code. */
RTX_CODE
avr_normalize_condition (RTX_CODE condition)
......@@ -4948,7 +4948,7 @@ avr_reorg (void)
{
if (GET_CODE (SET_SRC (pattern)) == COMPARE)
{
/* Now we work under compare insn */
/* Now we work under compare insn. */
pattern = SET_SRC (pattern);
if (true_regnum (XEXP (pattern,0)) >= 0
......
gcc/config/avr/avr.md
......@@ -178,7 +178,7 @@
[(set (match_operand:QI 0 "nonimmediate_operand" "")
(match_operand:QI 1 "general_operand" ""))]
""
"/* One of the ops has to be in a register */
"/* One of the ops has to be in a register. */
if (!register_operand(operand0, QImode)
&& ! (register_operand(operand1, QImode) || const0_rtx == operand1))
operands[1] = copy_to_mode_reg(QImode, operand1);
......@@ -226,7 +226,7 @@
""
"
{
/* One of the ops has to be in a register */
/* One of the ops has to be in a register. */
if (!register_operand(operand0, HImode)
&& !(register_operand(operand1, HImode) || const0_rtx == operands[1]))
{
......
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