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Commit 299456f3 by Ben Elliston Committed by Ulrich Weigand
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config.gcc (spu-*-elf*): Add spu_cache.h to extra_headers. 

2009-10-26  Ben Elliston  <bje@au.ibm.com>
	    Michael Meissner  <meissner@linux.vnet.ibm.com>
	    Ulrich Weigand  <uweigand@de.ibm.com>

	* config.gcc (spu-*-elf*): Add spu_cache.h to extra_headers.
	* config/spu/spu_cache.h: New file.

	* config/spu/cachemgr.c: New file.
	* config/spu/cache.S: New file.

	* config/spu/spu.h (ASM_OUTPUT_SYMBOL_REF): Define.
	(ADDR_SPACE_EA): Define.
	(TARGET_ADDR_SPACE_KEYWORDS): Define.
	* config/spu/spu.c (EAmode): New macro.
	(TARGET_ADDR_SPACE_POINTER_MODE): Define.
	(TARGET_ADDR_SPACE_ADDRESS_MODE): Likewise.
	(TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P): Likewise.
	(TARGET_ADDR_SPACE_LEGITIMIZE_ADDRESS): Likewise.
	(TARGET_ADDR_SPACE_SUBSET_P): Likewise.
	(TARGET_ADDR_SPACE_CONVERT): Likewise.
	(TARGET_ASM_SELECT_SECTION): Likewise.
	(TARGET_ASM_UNIQUE_SECTION): Likewise.
	(TARGET_ASM_UNALIGNED_SI_OP): Likewise.
	(TARGET_ASM_ALIGNED_DI_OP): Likewise.
	(ea_symbol_ref): New function.
	(spu_legitimate_constant_p): Handle __ea qualified addresses.
	(spu_addr_space_legitimate_address_p): New function.
	(spu_addr_space_legitimize_address): Likewise.
	(cache_fetch): New global.
	(cache_fetch_dirty): Likewise.
	(ea_alias_set): Likewise.
	(ea_load_store): New function.
	(ea_load_store_inline): Likewise.
	(expand_ea_mem): Likewise.
	(spu_expand_mov): Handle __ea qualified memory references.
	(spu_addr_space_pointer_mode): New function.
	(spu_addr_space_address_mode): Likewise.
	(spu_addr_space_subset_p): Likewise.
	(spu_addr_space_convert): Likewise.
	(spu_section_type_flags): Handle "._ea" section.
	(spu_select_section): New function.
	(spu_unique_section): Likewise.
	* config/spu/spu-c.c (spu_cpu_cpp_builtins): Support __EA32__
	and __EA64__ predefined macros.
	* config/spu/spu-elf.h (LIB_SPEC): Handle -mcache-size= and
	-matomic-updates switches.

	* config/spu/t-spu-elf (MULTILIB_OPTIONS): Define.
	(EXTRA_MULTILIB_PARTS): Add libgcc_cachemgr.a,
	libgcc_cachemgr_nonatomic.a, libgcc_cache8k.a, libgcc_cache16k.a,
	libgcc_cache32k.a, libgcc_cache64k.a, libgcc_cache128k.a.
	($(T)cachemgr.o, $(T)cachemgr_nonatomic.o): New target.
	($(T)cache8k.o, $(T)cache16k.o, $(T)cache32k.o, $(T)cache64k.o,
	$(T)cache128k.o): Likewise.
	($(T)libgcc_%.a): Likewise.

	* config/spu/spu.h (TARGET_DEFAULT): Add MASK_ADDRESS_SPACE_CONVERSION.
	* config/spu/spu.opt (-mea32/-mea64): Add switches.
	(-maddress-space-conversion): Likewise.
	(-mcache-size=): Likewise.
	(-matomic-updates): Likewise.
	* doc/invoke.texi (-mea32/-mea64): Document.
	(-maddress-space-conversion): Likewise.
	(-mcache-size=): Likewise.
	(-matomic-updates): Likewise.

Co-Authored-By: Michael Meissner <meissner@linux.vnet.ibm.com>
Co-Authored-By: Ulrich Weigand <uweigand@de.ibm.com>

From-SVN: r153575
parent 36c5e70a
Showing with 282 additions and 9 deletions
gcc/ChangeLog
......@@ -2,6 +2,72 @@
Michael Meissner <meissner@linux.vnet.ibm.com>
Ulrich Weigand <uweigand@de.ibm.com>
* config.gcc (spu-*-elf*): Add spu_cache.h to extra_headers.
* config/spu/spu_cache.h: New file.
* config/spu/cachemgr.c: New file.
* config/spu/cache.S: New file.
* config/spu/spu.h (ASM_OUTPUT_SYMBOL_REF): Define.
(ADDR_SPACE_EA): Define.
(TARGET_ADDR_SPACE_KEYWORDS): Define.
* config/spu/spu.c (EAmode): New macro.
(TARGET_ADDR_SPACE_POINTER_MODE): Define.
(TARGET_ADDR_SPACE_ADDRESS_MODE): Likewise.
(TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P): Likewise.
(TARGET_ADDR_SPACE_LEGITIMIZE_ADDRESS): Likewise.
(TARGET_ADDR_SPACE_SUBSET_P): Likewise.
(TARGET_ADDR_SPACE_CONVERT): Likewise.
(TARGET_ASM_SELECT_SECTION): Likewise.
(TARGET_ASM_UNIQUE_SECTION): Likewise.
(TARGET_ASM_UNALIGNED_SI_OP): Likewise.
(TARGET_ASM_ALIGNED_DI_OP): Likewise.
(ea_symbol_ref): New function.
(spu_legitimate_constant_p): Handle __ea qualified addresses.
(spu_addr_space_legitimate_address_p): New function.
(spu_addr_space_legitimize_address): Likewise.
(cache_fetch): New global.
(cache_fetch_dirty): Likewise.
(ea_alias_set): Likewise.
(ea_load_store): New function.
(ea_load_store_inline): Likewise.
(expand_ea_mem): Likewise.
(spu_expand_mov): Handle __ea qualified memory references.
(spu_addr_space_pointer_mode): New function.
(spu_addr_space_address_mode): Likewise.
(spu_addr_space_subset_p): Likewise.
(spu_addr_space_convert): Likewise.
(spu_section_type_flags): Handle "._ea" section.
(spu_select_section): New function.
(spu_unique_section): Likewise.
* config/spu/spu-c.c (spu_cpu_cpp_builtins): Support __EA32__
and __EA64__ predefined macros.
* config/spu/spu-elf.h (LIB_SPEC): Handle -mcache-size= and
-matomic-updates switches.
* config/spu/t-spu-elf (MULTILIB_OPTIONS): Define.
(EXTRA_MULTILIB_PARTS): Add libgcc_cachemgr.a,
libgcc_cachemgr_nonatomic.a, libgcc_cache8k.a, libgcc_cache16k.a,
libgcc_cache32k.a, libgcc_cache64k.a, libgcc_cache128k.a.
($(T)cachemgr.o, $(T)cachemgr_nonatomic.o): New target.
($(T)cache8k.o, $(T)cache16k.o, $(T)cache32k.o, $(T)cache64k.o,
$(T)cache128k.o): Likewise.
($(T)libgcc_%.a): Likewise.
* config/spu/spu.h (TARGET_DEFAULT): Add MASK_ADDRESS_SPACE_CONVERSION.
* config/spu/spu.opt (-mea32/-mea64): Add switches.
(-maddress-space-conversion): Likewise.
(-mcache-size=): Likewise.
(-matomic-updates): Likewise.
* doc/invoke.texi (-mea32/-mea64): Document.
(-maddress-space-conversion): Likewise.
(-mcache-size=): Likewise.
(-matomic-updates): Likewise.
2009-10-26 Ben Elliston <bje@au.ibm.com>
Michael Meissner <meissner@linux.vnet.ibm.com>
Ulrich Weigand <uweigand@de.ibm.com>
* doc/tm.texi (TARGET_ADDR_SPACE_KEYWORDS): Document.
* c-common.c (c_common_reswords): If TARGET_ADDR_SPACE_KEYWORDS is
gcc/config.gcc
......@@ -2449,7 +2449,7 @@ sparc64-*-netbsd*)
spu-*-elf*)
tm_file="dbxelf.h elfos.h spu/spu-elf.h spu/spu.h newlib-stdint.h"
tmake_file="spu/t-spu-elf"
extra_headers="spu_intrinsics.h spu_internals.h vmx2spu.h spu_mfcio.h vec_types.h"
extra_headers="spu_intrinsics.h spu_internals.h vmx2spu.h spu_mfcio.h vec_types.h spu_cache.h"
extra_modes=spu/spu-modes.def
c_target_objs="${c_target_objs} spu-c.o"
cxx_target_objs="${cxx_target_objs} spu-c.o"
......
gcc/config/spu/cache.S 0 → 100644
/* Copyright (C) 2008, 2009 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
.data
.p2align 7
.global __cache
__cache:
.rept __CACHE_SIZE__ * 8
.fill 128
.endr
.p2align 7
.global __cache_tag_array
__cache_tag_array:
.rept __CACHE_SIZE__ * 2
.long 1, 1, 1, 1
.fill 128-16
.endr
__end_cache_tag_array:
.globl __cache_tag_array_size
.set __cache_tag_array_size, __end_cache_tag_array-__cache_tag_array
gcc/config/spu/spu-c.c
......@@ -201,6 +201,17 @@ spu_cpu_cpp_builtins (struct cpp_reader *pfile)
if (spu_arch == PROCESSOR_CELLEDP)
builtin_define_std ("__SPU_EDP__");
builtin_define_std ("__vector=__attribute__((__spu_vector__))");
switch (spu_ea_model)
{
case 32:
builtin_define_std ("__EA32__");
break;
case 64:
builtin_define_std ("__EA64__");
break;
default:
gcc_unreachable ();
}
if (!flag_iso)
{
......
gcc/config/spu/spu-elf.h
......@@ -68,8 +68,14 @@
#define LINK_SPEC "%{mlarge-mem: --defsym __stack=0xfffffff0 }"
#define LIB_SPEC \
"-( %{!shared:%{g*:-lg}} -lc -lgloss -)"
#define LIB_SPEC "-( %{!shared:%{g*:-lg}} -lc -lgloss -) \
%{mno-atomic-updates:-lgcc_cachemgr_nonatomic; :-lgcc_cachemgr} \
%{mcache-size=128:-lgcc_cache128k; \
mcache-size=64 :-lgcc_cache64k; \
mcache-size=32 :-lgcc_cache32k; \
mcache-size=16 :-lgcc_cache16k; \
mcache-size=8 :-lgcc_cache8k; \
:-lgcc_cache64k}"
/* Turn off warnings in the assembler too. */
#undef ASM_SPEC
......
gcc/config/spu/spu.h
......@@ -51,7 +51,7 @@ extern GTY(()) int spu_tune;
/* Default target_flags if no switches specified. */
#ifndef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_ERROR_RELOC | MASK_SAFE_DMA | MASK_BRANCH_HINTS \
| MASK_SAFE_HINTS)
| MASK_SAFE_HINTS | MASK_ADDRESS_SPACE_CONVERSION)
#endif
......@@ -469,6 +469,17 @@ targetm.resolve_overloaded_builtin = spu_resolve_overloaded_builtin; \
#define ASM_OUTPUT_LABELREF(FILE, NAME) \
asm_fprintf (FILE, "%U%s", default_strip_name_encoding (NAME))
#define ASM_OUTPUT_SYMBOL_REF(FILE, X) \
do \
{ \
tree decl; \
assemble_name (FILE, XSTR ((X), 0)); \
if ((decl = SYMBOL_REF_DECL ((X))) != 0 \
&& TREE_CODE (decl) == VAR_DECL \
&& TYPE_ADDR_SPACE (TREE_TYPE (decl))) \
fputs ("@ppu", FILE); \
} while (0)
/* Instruction Output */
#define REGISTER_NAMES \
......@@ -590,6 +601,13 @@ targetm.resolve_overloaded_builtin = spu_resolve_overloaded_builtin; \
} while (0)
/* Address spaces. */
#define ADDR_SPACE_EA 1
/* Named address space keywords. */
#define TARGET_ADDR_SPACE_KEYWORDS ADDR_SPACE_KEYWORD ("__ea", ADDR_SPACE_EA)
/* Builtins. */
enum spu_builtin_type
......
gcc/config/spu/spu.opt
......@@ -82,3 +82,24 @@ Generate code for given CPU
mtune=
Target RejectNegative Joined Var(spu_tune_string)
Schedule code for given CPU
mea32
Target Report RejectNegative Var(spu_ea_model,32) Init(32)
Access variables in 32-bit PPU objects (default)
mea64
Target Report RejectNegative Var(spu_ea_model,64) VarExists
Access variables in 64-bit PPU objects
maddress-space-conversion
Target Report Mask(ADDRESS_SPACE_CONVERSION)
Allow conversions between __ea and generic pointers (default)
mcache-size=
Target Report RejectNegative Joined UInteger
Size (in KB) of software data cache
matomic-updates
Target Report
Atomically write back software data cache lines (default)
gcc/config/spu/spu_cache.h 0 → 100644
/* Copyright (C) 2008, 2009 Free Software Foundation, Inc.
This file is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your option)
any later version.
This file is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
#ifndef _SPU_CACHE_H
#define _SPU_CACHE_H
void *__cache_fetch_dirty (__ea void *ea, int n_bytes_dirty);
void *__cache_fetch (__ea void *ea);
void __cache_evict (__ea void *ea);
void __cache_flush (void);
void __cache_touch (__ea void *ea);
#define cache_fetch_dirty(_ea, _n_bytes_dirty) \
__cache_fetch_dirty(_ea, _n_bytes_dirty)
#define cache_fetch(_ea) __cache_fetch(_ea)
#define cache_touch(_ea) __cache_touch(_ea)
#define cache_evict(_ea) __cache_evict(_ea)
#define cache_flush() __cache_flush()
#endif
gcc/config/spu/t-spu-elf
......@@ -66,14 +66,39 @@ fp-bit.c: $(srcdir)/config/fp-bit.c $(srcdir)/config/spu/t-spu-elf
# Don't let CTOR_LIST end up in sdata section.
CRTSTUFF_T_CFLAGS =
#MULTILIB_OPTIONS=mlarge-mem/mtest-abi
#MULTILIB_DIRNAMES=large-mem test-abi
#MULTILIB_MATCHES=
# Multi-lib support.
MULTILIB_OPTIONS=mea64
# Neither gcc or newlib seem to have a standard way to generate multiple
# crt*.o files. So we don't use the standard crt0.o name anymore.
EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o
EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o libgcc_cachemgr.a libgcc_cachemgr_nonatomic.a \
libgcc_cache8k.a libgcc_cache16k.a libgcc_cache32k.a libgcc_cache64k.a libgcc_cache128k.a
$(T)cachemgr.o: $(srcdir)/config/spu/cachemgr.c
$(GCC_FOR_TARGET) $(LIBGCC2_CFLAGS) $(MULTILIB_CFLAGS) -c $< -o $@
# Specialised rule to add a -D flag.
$(T)cachemgr_nonatomic.o: $(srcdir)/config/spu/cachemgr.c
$(GCC_FOR_TARGET) $(LIBGCC2_CFLAGS) $(MULTILIB_CFLAGS) -DNONATOMIC -c $< -o $@
$(T)libgcc_%.a: $(T)%.o
$(AR_FOR_TARGET) -rcs $@ $<
$(T)cache8k.o: $(srcdir)/config/spu/cache.S
$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -D__CACHE_SIZE__=8 -o $@ -c $<
$(T)cache16k.o: $(srcdir)/config/spu/cache.S
$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -D__CACHE_SIZE__=16 -o $@ -c $<
$(T)cache32k.o: $(srcdir)/config/spu/cache.S
$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -D__CACHE_SIZE__=32 -o $@ -c $<
$(T)cache64k.o: $(srcdir)/config/spu/cache.S
$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -D__CACHE_SIZE__=64 -o $@ -c $<
$(T)cache128k.o: $(srcdir)/config/spu/cache.S
$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -D__CACHE_SIZE__=128 -o $@ -c $<
LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib
......
gcc/doc/invoke.texi
......@@ -846,7 +846,11 @@ See RS/6000 and PowerPC Options.
-msafe-dma -munsafe-dma @gol
-mbranch-hints @gol
-msmall-mem -mlarge-mem -mstdmain @gol
-mfixed-range=@var{register-range}}
-mfixed-range=@var{register-range} @gol
-mea32 -mea64 @gol
-maddress-space-conversion -mno-address-space-conversion @gol
-mcache-size=@var{cache-size} @gol
-matomic-updates -mno-atomic-updates}
@emph{System V Options}
@gccoptlist{-Qy -Qn -YP,@var{paths} -Ym,@var{dir}}
......@@ -16358,6 +16362,46 @@ useful when compiling kernel code. A register range is specified as
two registers separated by a dash. Multiple register ranges can be
specified separated by a comma.
@item -mea32
@itemx -mea64
@opindex mea32
@opindex mea64
Compile code assuming that pointers to the PPU address space accessed
via the @code{__ea} named address space qualifier are either 32 or 64
bits wide. The default is 32 bits. As this is an ABI changing option,
all object code in an executable must be compiled with the same setting.
@item -maddress-space-conversion
@itemx -mno-address-space-conversion
@opindex maddress-space-conversion
@opindex mno-address-space-conversion
Allow/disallow treating the @code{__ea} address space as superset
of the generic address space. This enables explicit type casts
between @code{__ea} and generic pointer as well as implicit
conversions of generic pointers to @code{__ea} pointers. The
default is to allow address space pointer conversions.
@item -mcache-size=@var{cache-size}
@opindex mcache-size
This option controls the version of libgcc that the compiler links to an
executable and selects a software-managed cache for accessing variables
in the @code{__ea} address space with a particular cache size. Possible
options for @var{cache-size} are @samp{8}, @samp{16}, @samp{32}, @samp{64}
and @samp{128}. The default cache size is 64KB.
@item -matomic-updates
@itemx -mno-atomic-updates
@opindex matomic-updates
@opindex mno-atomic-updates
This option controls the version of libgcc that the compiler links to an
executable and selects whether atomic updates to the software-managed
cache of PPU-side variables are used. If you use atomic updates, changes
to a PPU variable from SPU code using the @code{__ea} named address space
qualifier will not interfere with changes to other PPU variables residing
in the same cache line from PPU code. If you do not use atomic updates,
such interference may occur; however, writing back cache lines will be
more efficient. The default behavior is to use atomic updates.
@item -mdual-nops
@itemx -mdual-nops=@var{n}
@opindex mdual-nops
......
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