thumb.c - add warning about PIC code not being supported just yet.

arm.c - synchronised with devo
arm.md - synchronised with devo
README-interworking - sychronised with devo.

From-SVN: r23013

gcc/ChangeLog

+Mon Oct 12 10:50:44 1998  Nick Clifton  <nickc@cygnus.com>
+
+	* config/arm/thumb.c (thumb_override_options): Add warning about
+	PIC code not being supported just yet.
+
 Sun Oct 11 16:49:15 EDT 1998  John Wehle  (john@feith.com)
 
 	* flow.c: Update comment.

gcc/config/arm/arm.c

@@ -222,11 +222,14 @@ arm_override_options ()
   int arm_thumb_aware = 0;
   int flags = 0;
   unsigned i;
-  struct arm_cpu_select *ptr;
-  static struct cpu_default {
+  struct arm_cpu_select * ptr;
+  static struct cpu_default
+  {
     int    cpu;
-    char *name;
-  } cpu_defaults[] = {
+    char * name;
+  }
+  cpu_defaults[] =
+  {
     { TARGET_CPU_arm2, "arm2" },
     { TARGET_CPU_arm6, "arm6" },
     { TARGET_CPU_arm610, "arm610" },
@@ -4857,7 +4860,7 @@ output_return_instruction (operand, really_return, reverse)
   else if (really_return)
     {
       if (TARGET_THUMB_INTERWORK)
-	sprintf (instr, "bx%%?%%%s\t%%|lr", reverse ? "D" : "d");
+	sprintf (instr, "bx%%?%%%s0\t%%|lr", reverse ? "D" : "d");
       else
 	sprintf (instr, "mov%%?%%%s0%s\t%%|pc, %%|lr",
 		 reverse ? "D" : "d", TARGET_APCS_32 ? "" : "s");
@@ -5156,10 +5159,10 @@ output_func_epilogue (f, frame_size)
 	  /* And finally, go home */
 	  if (TARGET_THUMB_INTERWORK)
 	    fprintf (f, "\tbx\t%slr\n", REGISTER_PREFIX);
+	  else if (TARGET_APCS_32)
+	    fprintf (f, "\tmov\t%spc, %slr\n", REGISTER_PREFIX, REGISTER_PREFIX );
 	  else
-	    fprintf (f, (TARGET_APCS_32 ? "\tmov\t%spc, %slr\n"
-			 : "\tmovs\t%spc, %slr\n"),
-		     REGISTER_PREFIX, REGISTER_PREFIX, f);
+	    fprintf (f, "\tmovs\t%spc, %slr\n", REGISTER_PREFIX, REGISTER_PREFIX );
 	}
     }
 

gcc/config/arm/arm.md

@@ -5888,7 +5888,8 @@
   "sub%?s\\t%0, %1, #0"
 [(set_attr "conds" "set")])
 
-; Peepholes to spot possible load- and store-multiples.
+; Peepholes to spot possible load- and store-multiples, if the ordering is
+; reversed, check that the memory references aren't volatile.
 
 (define_peephole
   [(set (match_operand:SI 0 "s_register_operand" "=r")

gcc/config/arm/thumb.c

@@ -1465,7 +1465,8 @@ thumb_unexpanded_epilogue ()
       if ((live_regs_mask & (1 << PROGRAM_COUNTER)) == 0)
 	thumb_exit (asm_out_file,
 		    (had_to_push_lr
-		     && is_called_in_ARM_mode (current_function_decl)) ? -1 : LINK_REGISTER);
+		     && is_called_in_ARM_mode (current_function_decl)) ?
+		    -1 : LINK_REGISTER);
     }
   else
     {
@@ -1971,7 +1972,8 @@ thumb_return_in_memory (type)
   return 1;
 }
 
-void thumb_override_options()
+void
+thumb_override_options ()
 {
   if (structure_size_string != NULL)
     {
@@ -1982,4 +1984,10 @@ void thumb_override_options()
       else
 	warning ("Structure size boundary can only be set to 8 or 32");
     }
+
+  if (flag_pic)
+    {
+      warning ("Position independent code not supported.  Ignored");
+      flag_pic = 0;
+    }
 }