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lvzhengyang
riscv-gcc-1
Commits
254110c2
Commit
254110c2
authored
Jun 23, 1998
by
David S. Miller
Committed by
David S. Miller
Jun 22, 1998
Browse files
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Plain Diff
Complete this set of changes to make the Sparc
backend completely gen_rtx clean. From-SVN: r20669
parent
519ebd1e
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118 additions
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117 deletions
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-117
gcc/ChangeLog
+2
-1
gcc/config/sparc/sparc.c
+93
-93
gcc/config/sparc/sparc.md
+23
-23
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gcc/ChangeLog
View file @
254110c2
...
...
@@ -5,7 +5,8 @@ Mon Jun 22 23:57:31 1998 David S. Miller <davem@pierdol.cobaltmicro.com>
subdi3, negdi2, call, call_value, untyped_return, nonlocal_goto,
splits and peepholes): Change remaining generic gen_rtx calls to
specific genrtl ones.
* config/sparc/sparc.c: Likewise.
Mon Jun 22 22:21:46 1998 Richard Henderson <rth@cygnus.com>
* gcc.c (handle_braces): Recognize | between options as an or.
...
...
gcc/config/sparc/sparc.c
View file @
254110c2
...
...
@@ -1039,15 +1039,15 @@ gen_compare_reg (code, x, y)
prev_args
[
reg
][
1
]
=
y
;
next_fcc_reg
=
(
next_fcc_reg
+
1
)
&
3
;
}
cc_reg
=
gen_rtx
(
REG
,
mode
,
reg
+
SPARC_FIRST_V9_FCC_REG
);
cc_reg
=
gen_rtx
_REG
(
mode
,
reg
+
SPARC_FIRST_V9_FCC_REG
);
}
#else
cc_reg
=
gen_reg_rtx
(
mode
);
#endif
/* ! experiment */
else
if
(
GET_MODE_CLASS
(
GET_MODE
(
x
))
==
MODE_FLOAT
)
cc_reg
=
gen_rtx
(
REG
,
mode
,
SPARC_FCC_REG
);
cc_reg
=
gen_rtx
_REG
(
mode
,
SPARC_FCC_REG
);
else
cc_reg
=
gen_rtx
(
REG
,
mode
,
SPARC_ICC_REG
);
cc_reg
=
gen_rtx
_REG
(
mode
,
SPARC_ICC_REG
);
if
(
TARGET_V8PLUS
&&
mode
==
CCXmode
)
{
...
...
@@ -1055,8 +1055,8 @@ gen_compare_reg (code, x, y)
}
else
{
emit_insn
(
gen_rtx
(
SET
,
VOIDmode
,
cc_reg
,
gen_rtx
(
COMPARE
,
mode
,
x
,
y
)));
emit_insn
(
gen_rtx
_SET
(
VOIDmode
,
cc_reg
,
gen_rtx
_COMPARE
(
mode
,
x
,
y
)));
}
return
cc_reg
;
...
...
@@ -1123,17 +1123,17 @@ gen_v9_scc (compare_code, operands)
&&
GET_MODE
(
operands
[
0
])
==
DImode
&&
GET_MODE
(
op0
)
==
DImode
)
{
emit_insn
(
gen_rtx
(
SET
,
VOIDmode
,
operands
[
0
],
op0
));
emit_insn
(
gen_rtx
(
SET
,
VOIDmode
,
operands
[
0
],
gen_rtx
(
IF_THEN_ELSE
,
DImode
,
gen_rtx
(
compare_code
,
DImode
,
op0
,
const0_rtx
),
emit_insn
(
gen_rtx
_SET
(
VOIDmode
,
operands
[
0
],
op0
));
emit_insn
(
gen_rtx
_SET
(
VOIDmode
,
operands
[
0
],
gen_rtx
_IF_THEN_ELSE
(
DImode
,
gen_rtx
_fmt_ee
(
compare_code
,
DImode
,
op0
,
const0_rtx
),
const1_rtx
,
operands
[
0
])));
return
1
;
}
emit_insn
(
gen_rtx
(
SET
,
VOIDmode
,
operands
[
0
],
const0_rtx
));
emit_insn
(
gen_rtx
_SET
(
VOIDmode
,
operands
[
0
],
const0_rtx
));
if
(
GET_MODE
(
op0
)
!=
DImode
)
{
temp
=
gen_reg_rtx
(
DImode
);
...
...
@@ -1141,10 +1141,10 @@ gen_v9_scc (compare_code, operands)
}
else
temp
=
op0
;
emit_insn
(
gen_rtx
(
SET
,
VOIDmode
,
operands
[
0
],
gen_rtx
(
IF_THEN_ELSE
,
GET_MODE
(
operands
[
0
]),
gen_rtx
(
compare_code
,
DImode
,
temp
,
const0_rtx
),
emit_insn
(
gen_rtx
_SET
(
VOIDmode
,
operands
[
0
],
gen_rtx
_IF_THEN_ELSE
(
GET_MODE
(
operands
[
0
]),
gen_rtx
_fmt_ee
(
compare_code
,
DImode
,
temp
,
const0_rtx
),
const1_rtx
,
operands
[
0
])));
return
1
;
...
...
@@ -1163,12 +1163,12 @@ gen_v9_scc (compare_code, operands)
default
:
abort
();
}
emit_insn
(
gen_rtx
(
SET
,
VOIDmode
,
operands
[
0
],
const0_rtx
));
emit_insn
(
gen_rtx
(
SET
,
VOIDmode
,
operands
[
0
],
gen_rtx
(
IF_THEN_ELSE
,
GET_MODE
(
operands
[
0
]),
gen_rtx
(
compare_code
,
GET_MODE
(
operands
[
1
]),
operands
[
1
],
const0_rtx
),
emit_insn
(
gen_rtx
_SET
(
VOIDmode
,
operands
[
0
],
const0_rtx
));
emit_insn
(
gen_rtx
_SET
(
VOIDmode
,
operands
[
0
],
gen_rtx
_IF_THEN_ELSE
(
GET_MODE
(
operands
[
0
]),
gen_rtx
_fmt_ee
(
compare_code
,
GET_MODE
(
operands
[
1
]),
operands
[
1
],
const0_rtx
),
const1_rtx
,
operands
[
0
])));
return
1
;
}
...
...
@@ -1183,12 +1183,12 @@ emit_v9_brxx_insn (code, op0, label)
enum
rtx_code
code
;
rtx
op0
,
label
;
{
emit_jump_insn
(
gen_rtx
(
SET
,
VOIDmode
,
emit_jump_insn
(
gen_rtx
_SET
(
VOIDmode
,
pc_rtx
,
gen_rtx
(
IF_THEN_ELSE
,
VOIDmode
,
gen_rtx
(
code
,
GET_MODE
(
op0
),
op0
,
const0_rtx
),
gen_rtx
(
LABEL_REF
,
VOIDmode
,
label
),
gen_rtx
_IF_THEN_ELSE
(
VOIDmode
,
gen_rtx
_fmt_ee
(
code
,
GET_MODE
(
op0
),
op0
,
const0_rtx
),
gen_rtx
_LABEL_REF
(
VOIDmode
,
label
),
pc_rtx
)));
}
...
...
@@ -1470,15 +1470,15 @@ legitimize_pic_address (orig, mode, reg)
else
address
=
orig
;
pic_ref
=
gen_rtx
(
MEM
,
Pmode
,
gen_rtx
(
PLUS
,
Pmode
,
pic_ref
=
gen_rtx
_MEM
(
Pmode
,
gen_rtx
_PLUS
(
Pmode
,
pic_offset_table_rtx
,
address
));
current_function_uses_pic_offset_table
=
1
;
RTX_UNCHANGING_P
(
pic_ref
)
=
1
;
insn
=
emit_move_insn
(
reg
,
pic_ref
);
/* Put a REG_EQUAL note on this insn, so that it can be optimized
by loop. */
REG_NOTES
(
insn
)
=
gen_rtx
(
EXPR_LIST
,
REG_EQUAL
,
orig
,
REG_NOTES
(
insn
)
=
gen_rtx
_EXPR_LIST
(
REG_EQUAL
,
orig
,
REG_NOTES
(
insn
));
return
reg
;
}
...
...
@@ -1517,7 +1517,7 @@ legitimize_pic_address (orig, mode, reg)
/* If we reach here, then something is seriously wrong. */
abort
();
}
return
gen_rtx
(
PLUS
,
Pmode
,
base
,
offset
);
return
gen_rtx
_PLUS
(
Pmode
,
base
,
offset
);
}
else
if
(
GET_CODE
(
orig
)
==
LABEL_REF
)
/* ??? Why do we do this? */
...
...
@@ -1578,8 +1578,8 @@ finalize_pic ()
/* Initialize every time through, since we can't easily
know this to be permanent. */
global_offset_table
=
gen_rtx
(
SYMBOL_REF
,
Pmode
,
"_GLOBAL_OFFSET_TABLE_"
);
get_pc_symbol
=
gen_rtx
(
SYMBOL_REF
,
Pmode
,
get_pc_symbol_name
);
global_offset_table
=
gen_rtx
_SYMBOL_REF
(
Pmode
,
"_GLOBAL_OFFSET_TABLE_"
);
get_pc_symbol
=
gen_rtx
_SYMBOL_REF
(
Pmode
,
get_pc_symbol_name
);
flag_pic
=
0
;
emit_insn_after
(
pic_setup_code
(),
get_insns
());
...
...
@@ -1596,7 +1596,7 @@ finalize_pic ()
since setjmp/longjmp can cause life info to screw up.
??? In the case where we don't obey regdecls, this is not sufficient
since we may not fall out the bottom. */
emit_insn
(
gen_rtx
(
USE
,
VOIDmode
,
pic_offset_table_rtx
));
emit_insn
(
gen_rtx
_USE
(
VOIDmode
,
pic_offset_table_rtx
));
}
/* Emit insns to move operands[1] into operands[0].
...
...
@@ -1638,7 +1638,7 @@ emit_move_sequence (operands, mode)
||
GET_CODE
(
operand1
)
==
MEM
)
{
/* Run this case quickly. */
emit_insn
(
gen_rtx
(
SET
,
VOIDmode
,
operand0
,
operand1
));
emit_insn
(
gen_rtx
_SET
(
VOIDmode
,
operand0
,
operand1
));
return
1
;
}
}
...
...
@@ -1648,7 +1648,7 @@ emit_move_sequence (operands, mode)
||
(
operand1
==
const0_rtx
&&
!
TARGET_LIVE_G0
))
{
/* Run this case quickly. */
emit_insn
(
gen_rtx
(
SET
,
VOIDmode
,
operand0
,
operand1
));
emit_insn
(
gen_rtx
_SET
(
VOIDmode
,
operand0
,
operand1
));
return
1
;
}
if
(
!
reload_in_progress
)
...
...
@@ -1727,10 +1727,10 @@ emit_move_sequence (operands, mode)
if
(
TARGET_ARCH64
&&
mode
==
DImode
)
emit_insn
(
gen_sethi_di_sp64
(
temp
,
operand1
));
else
emit_insn
(
gen_rtx
(
SET
,
VOIDmode
,
temp
,
gen_rtx
(
HIGH
,
mode
,
operand1
)));
emit_insn
(
gen_rtx
_SET
(
VOIDmode
,
temp
,
gen_rtx
_HIGH
(
mode
,
operand1
)));
operands
[
1
]
=
gen_rtx
(
LO_SUM
,
mode
,
temp
,
operand1
);
operands
[
1
]
=
gen_rtx
_LO_SUM
(
mode
,
temp
,
operand1
);
}
}
...
...
@@ -1983,14 +1983,14 @@ output_move_double (operands)
operands in OPERANDS to be suitable for the low-numbered word. */
if
(
optype0
==
REGOP
)
latehalf
[
0
]
=
gen_rtx
(
REG
,
SImode
,
REGNO
(
op0
)
+
1
);
latehalf
[
0
]
=
gen_rtx
_REG
(
SImode
,
REGNO
(
op0
)
+
1
);
else
if
(
optype0
==
OFFSOP
)
latehalf
[
0
]
=
adj_offsettable_operand
(
op0
,
4
);
else
latehalf
[
0
]
=
op0
;
if
(
optype1
==
REGOP
)
latehalf
[
1
]
=
gen_rtx
(
REG
,
SImode
,
REGNO
(
op1
)
+
1
);
latehalf
[
1
]
=
gen_rtx
_REG
(
SImode
,
REGNO
(
op1
)
+
1
);
else
if
(
optype1
==
OFFSOP
)
latehalf
[
1
]
=
adj_offsettable_operand
(
op1
,
4
);
else
if
(
optype1
==
CNSTOP
)
...
...
@@ -2100,7 +2100,7 @@ output_move_double (operands)
xops
[
0
]
=
latehalf
[
0
];
xops
[
1
]
=
op0
;
output_asm_insn
(
"add %1,%0,%1"
,
xops
);
operands
[
1
]
=
gen_rtx
(
MEM
,
DImode
,
op0
);
operands
[
1
]
=
gen_rtx
_MEM
(
DImode
,
op0
);
latehalf
[
1
]
=
adj_offsettable_operand
(
operands
[
1
],
4
);
addreg1
=
0
;
highest_first
=
1
;
...
...
@@ -2203,17 +2203,17 @@ output_move_quad (operands)
if
(
optype0
==
REGOP
)
{
wordpart
[
0
][
0
]
=
gen_rtx
(
REG
,
word_mode
,
REGNO
(
op0
)
+
0
);
wordpart
[
0
][
0
]
=
gen_rtx
_REG
(
word_mode
,
REGNO
(
op0
)
+
0
);
if
(
TARGET_ARCH64
&&
FP_REG_P
(
op0
)
&&
REGNO
(
op0
)
<
SPARC_FIRST_V9_FP_REG
)
wordpart
[
1
][
0
]
=
gen_rtx
(
REG
,
word_mode
,
REGNO
(
op0
)
+
2
);
wordpart
[
1
][
0
]
=
gen_rtx
_REG
(
word_mode
,
REGNO
(
op0
)
+
2
);
else
wordpart
[
1
][
0
]
=
gen_rtx
(
REG
,
word_mode
,
REGNO
(
op0
)
+
1
);
wordpart
[
1
][
0
]
=
gen_rtx
_REG
(
word_mode
,
REGNO
(
op0
)
+
1
);
if
(
TARGET_ARCH32
)
{
wordpart
[
2
][
0
]
=
gen_rtx
(
REG
,
word_mode
,
REGNO
(
op0
)
+
2
);
wordpart
[
3
][
0
]
=
gen_rtx
(
REG
,
word_mode
,
REGNO
(
op0
)
+
3
);
wordpart
[
2
][
0
]
=
gen_rtx
_REG
(
word_mode
,
REGNO
(
op0
)
+
2
);
wordpart
[
3
][
0
]
=
gen_rtx
_REG
(
word_mode
,
REGNO
(
op0
)
+
3
);
}
/* Loading into a register which overlaps a register used in the
...
...
@@ -2260,7 +2260,7 @@ output_move_quad (operands)
output_asm_insn
(
"add %0, %1, %2"
,
temp
);
load_late_half
[
0
]
=
0
;
load_late_half
[
1
]
=
1
;
op1
=
gen_rtx
(
MEM
,
TFmode
,
wordpart
[
3
][
0
]);
op1
=
gen_rtx
_MEM
(
TFmode
,
wordpart
[
3
][
0
]);
operands
[
1
]
=
op1
;
optype1
=
OFFSOP
;
}
...
...
@@ -2301,17 +2301,17 @@ output_move_quad (operands)
if
(
optype1
==
REGOP
)
{
wordpart
[
0
][
1
]
=
gen_rtx
(
REG
,
word_mode
,
REGNO
(
op1
)
+
0
);
wordpart
[
0
][
1
]
=
gen_rtx
_REG
(
word_mode
,
REGNO
(
op1
)
+
0
);
if
(
TARGET_ARCH64
&&
FP_REG_P
(
op1
)
&&
REGNO
(
op1
)
<
SPARC_FIRST_V9_FP_REG
)
wordpart
[
1
][
1
]
=
gen_rtx
(
REG
,
word_mode
,
REGNO
(
op1
)
+
2
);
wordpart
[
1
][
1
]
=
gen_rtx
_REG
(
word_mode
,
REGNO
(
op1
)
+
2
);
else
wordpart
[
1
][
1
]
=
gen_rtx
(
REG
,
word_mode
,
REGNO
(
op1
)
+
1
);
wordpart
[
1
][
1
]
=
gen_rtx
_REG
(
word_mode
,
REGNO
(
op1
)
+
1
);
if
(
TARGET_ARCH32
)
{
wordpart
[
2
][
1
]
=
gen_rtx
(
REG
,
word_mode
,
REGNO
(
op1
)
+
2
);
wordpart
[
3
][
1
]
=
gen_rtx
(
REG
,
word_mode
,
REGNO
(
op1
)
+
3
);
wordpart
[
2
][
1
]
=
gen_rtx
_REG
(
word_mode
,
REGNO
(
op1
)
+
2
);
wordpart
[
3
][
1
]
=
gen_rtx
_REG
(
word_mode
,
REGNO
(
op1
)
+
3
);
}
}
else
if
(
optype1
==
OFFSOP
)
...
...
@@ -2468,7 +2468,7 @@ output_move_quad (operands)
int
fix
=
offset
-
i
*
4
;
/* Back up to the appropriate place. */
temp
[
1
]
=
gen_rtx
(
CONST_INT
,
VOIDmode
,
-
fix
);
temp
[
1
]
=
gen_rtx
_CONST_INT
(
VOIDmode
,
-
fix
);
if
(
addreg0
)
{
temp
[
0
]
=
addreg0
;
...
...
@@ -2483,7 +2483,7 @@ output_move_quad (operands)
wordpart
[
i
]);
/* Don't modify the register that's the destination of the
move. */
temp
[
0
]
=
gen_rtx
(
CONST_INT
,
VOIDmode
,
-
(
offset
-
fix
));
temp
[
0
]
=
gen_rtx
_CONST_INT
(
VOIDmode
,
-
(
offset
-
fix
));
if
(
addreg0
&&
REGNO
(
addreg0
)
!=
REGNO
(
wordpart
[
i
][
0
]))
{
temp
[
1
]
=
addreg0
;
...
...
@@ -2500,7 +2500,7 @@ output_move_quad (operands)
}
if
(
offset
)
{
temp
[
1
]
=
gen_rtx
(
CONST_INT
,
VOIDmode
,
-
offset
);
temp
[
1
]
=
gen_rtx
_CONST_INT
(
VOIDmode
,
-
offset
);
/* Undo the adds we just did. */
if
(
addreg0
)
{
...
...
@@ -3757,9 +3757,9 @@ output_function_epilogue (file, size, leaf_function)
/* If we wound up with things in our delay slot, flush them here. */
if
(
current_function_epilogue_delay_list
)
{
rtx
insn
=
emit_jump_insn_after
(
gen_rtx
(
RETURN
,
VOIDmode
),
rtx
insn
=
emit_jump_insn_after
(
gen_rtx
_RETURN
(
VOIDmode
),
get_last_insn
());
PATTERN
(
insn
)
=
gen_rtx
(
PARALLEL
,
VOIDmode
,
PATTERN
(
insn
)
=
gen_rtx
_PARALLEL
(
VOIDmode
,
gen_rtvec
(
2
,
PATTERN
(
XEXP
(
current_function_epilogue_delay_list
,
0
)),
PATTERN
(
insn
)));
...
...
@@ -4148,9 +4148,9 @@ function_arg_record_value_3 (bitpos, parms)
do
{
regno
=
parms
->
regbase
+
this_slotno
;
reg
=
gen_rtx
(
REG
,
mode
,
regno
);
reg
=
gen_rtx
_REG
(
mode
,
regno
);
XVECEXP
(
parms
->
ret
,
0
,
parms
->
nregs
)
=
gen_rtx
(
EXPR_LIST
,
VOIDmode
,
reg
,
GEN_INT
(
intoffset
));
=
gen_rtx
_EXPR_LIST
(
VOIDmode
,
reg
,
GEN_INT
(
intoffset
));
this_slotno
+=
1
;
intoffset
=
(
intoffset
|
(
UNITS_PER_WORD
-
1
))
+
1
;
...
...
@@ -4201,12 +4201,12 @@ function_arg_record_value_2 (type, startbitpos, parms)
function_arg_record_value_3
(
bitpos
,
parms
);
reg
=
gen_rtx
(
REG
,
DECL_MODE
(
field
),
reg
=
gen_rtx
_REG
(
DECL_MODE
(
field
),
(
SPARC_FP_ARG_FIRST
+
this_slotno
*
2
+
(
DECL_MODE
(
field
)
==
SFmode
&&
(
bitpos
&
32
)
!=
0
)));
XVECEXP
(
parms
->
ret
,
0
,
parms
->
nregs
)
=
gen_rtx
(
EXPR_LIST
,
VOIDmode
,
reg
,
=
gen_rtx
_EXPR_LIST
(
VOIDmode
,
reg
,
GEN_INT
(
bitpos
/
BITS_PER_UNIT
));
parms
->
nregs
+=
1
;
}
...
...
@@ -4263,7 +4263,7 @@ function_arg_record_value (type, slotno, named, regbase)
anyway so the rest of gcc doesn't go nuts. Returning a PARALLEL
leads to breakage due to the fact that there are zero bytes to
load. */
return
gen_rtx
(
REG
,
DImode
,
regbase
);
return
gen_rtx
_REG
(
DImode
,
regbase
);
}
else
{
...
...
@@ -4277,7 +4277,7 @@ function_arg_record_value (type, slotno, named, regbase)
if
(
nregs
==
0
)
abort
();
parms
.
ret
=
gen_rtx
(
PARALLEL
,
VOIDmode
,
rtvec_alloc
(
nregs
));
parms
.
ret
=
gen_rtx
_PARALLEL
(
VOIDmode
,
rtvec_alloc
(
nregs
));
/* Fill in the entries. */
parms
.
nregs
=
0
;
...
...
@@ -4328,7 +4328,7 @@ function_arg (cum, mode, type, named, incoming_p)
if
(
TARGET_ARCH32
)
{
reg
=
gen_rtx
(
REG
,
mode
,
regno
);
reg
=
gen_rtx
_REG
(
mode
,
regno
);
return
reg
;
}
...
...
@@ -4340,7 +4340,7 @@ function_arg (cum, mode, type, named, incoming_p)
||
GET_MODE_CLASS
(
mode
)
==
MODE_COMPLEX_FLOAT
)
&&
SPARC_FP_REG_P
(
regno
))
{
reg
=
gen_rtx
(
REG
,
mode
,
regno
);
reg
=
gen_rtx
_REG
(
mode
,
regno
);
if
(
cum
->
prototype_p
||
cum
->
libcall_p
)
{
/* "* 2" because fp reg numbers are recorded in 4 byte
...
...
@@ -4351,11 +4351,11 @@ function_arg (cum, mode, type, named, incoming_p)
value in the reg but reserve space on the stack. That's an
optimization, and is deferred [for a bit]. */
if ((regno - SPARC_FP_ARG_FIRST) >= SPARC_INT_ARG_MAX * 2)
return gen_rtx
(PARALLEL,
mode,
return gen_rtx
_PARALLEL (
mode,
gen_rtvec (2,
gen_rtx
(EXPR_LIST,
VOIDmode,
gen_rtx
_EXPR_LIST (
VOIDmode,
NULL_RTX, const0_rtx),
gen_rtx
(EXPR_LIST,
VOIDmode,
gen_rtx
_EXPR_LIST (
VOIDmode,
reg, const0_rtx)));
else
#else
...
...
@@ -4420,12 +4420,12 @@ function_arg (cum, mode, type, named, incoming_p)
abort
();
mode
=
mode_for_size
(
bytes
*
BITS_PER_UNIT
,
MODE_INT
,
0
);
reg
=
gen_rtx
(
REG
,
mode
,
regno
);
reg
=
gen_rtx
_REG
(
mode
,
regno
);
}
else
{
/* Scalar or complex int. */
reg
=
gen_rtx
(
REG
,
mode
,
regno
);
reg
=
gen_rtx
_REG
(
mode
,
regno
);
}
return
reg
;
...
...
@@ -4657,7 +4657,7 @@ function_value (type, mode, incoming_p)
else
regno
=
BASE_OUTGOING_VALUE_REG
(
mode
);
return
gen_rtx
(
REG
,
mode
,
regno
);
return
gen_rtx
_REG
(
mode
,
regno
);
}
/* Do what is necessary for `va_start'. The argument is ignored.
...
...
@@ -4674,15 +4674,15 @@ sparc_builtin_saveregs (arglist)
int
regno
;
for
(
regno
=
first_reg
;
regno
<
NPARM_REGS
(
word_mode
);
regno
++
)
emit_move_insn
(
gen_rtx
(
MEM
,
word_mode
,
gen_rtx
(
PLUS
,
Pmode
,
emit_move_insn
(
gen_rtx
_MEM
(
word_mode
,
gen_rtx
_PLUS
(
Pmode
,
frame_pointer_rtx
,
GEN_INT
(
STACK_POINTER_OFFSET
+
UNITS_PER_WORD
*
regno
))),
gen_rtx
(
REG
,
word_mode
,
gen_rtx
_REG
(
word_mode
,
BASE_INCOMING_ARG_REG
(
word_mode
)
+
regno
));
address
=
gen_rtx
(
PLUS
,
Pmode
,
address
=
gen_rtx
_PLUS
(
Pmode
,
frame_pointer_rtx
,
GEN_INT
(
STACK_POINTER_OFFSET
+
UNITS_PER_WORD
*
first_reg
));
...
...
@@ -5706,27 +5706,27 @@ sparc_initialize_trampoline (tramp, fnaddr, cxt)
size_int
(
10
),
0
,
1
);
rtx
low_cxt
=
expand_and
(
cxt
,
GEN_INT
(
0x3ff
),
0
);
rtx
low_fn
=
expand_and
(
fnaddr
,
GEN_INT
(
0x3ff
),
0
);
rtx
g1_sethi
=
gen_rtx
(
HIGH
,
SImode
,
GEN_INT
(
0x03000000
));
rtx
g2_sethi
=
gen_rtx
(
HIGH
,
SImode
,
GEN_INT
(
0x05000000
));
rtx
g1_ori
=
gen_rtx
(
HIGH
,
SImode
,
GEN_INT
(
0x82106000
));
rtx
g2_ori
=
gen_rtx
(
HIGH
,
SImode
,
GEN_INT
(
0x8410A000
));
rtx
g1_sethi
=
gen_rtx
_HIGH
(
SImode
,
GEN_INT
(
0x03000000
));
rtx
g2_sethi
=
gen_rtx
_HIGH
(
SImode
,
GEN_INT
(
0x05000000
));
rtx
g1_ori
=
gen_rtx
_HIGH
(
SImode
,
GEN_INT
(
0x82106000
));
rtx
g2_ori
=
gen_rtx
_HIGH
(
SImode
,
GEN_INT
(
0x8410A000
));
rtx
tem
=
gen_reg_rtx
(
SImode
);
emit_move_insn
(
tem
,
g1_sethi
);
emit_insn
(
gen_iorsi3
(
high_fn
,
high_fn
,
tem
));
emit_move_insn
(
gen_rtx
(
MEM
,
SImode
,
plus_constant
(
tramp
,
0
)),
high_fn
);
emit_move_insn
(
gen_rtx
_MEM
(
SImode
,
plus_constant
(
tramp
,
0
)),
high_fn
);
emit_move_insn
(
tem
,
g1_ori
);
emit_insn
(
gen_iorsi3
(
low_fn
,
low_fn
,
tem
));
emit_move_insn
(
gen_rtx
(
MEM
,
SImode
,
plus_constant
(
tramp
,
4
)),
low_fn
);
emit_move_insn
(
gen_rtx
_MEM
(
SImode
,
plus_constant
(
tramp
,
4
)),
low_fn
);
emit_move_insn
(
tem
,
g2_sethi
);
emit_insn
(
gen_iorsi3
(
high_cxt
,
high_cxt
,
tem
));
emit_move_insn
(
gen_rtx
(
MEM
,
SImode
,
plus_constant
(
tramp
,
8
)),
high_cxt
);
emit_move_insn
(
gen_rtx
_MEM
(
SImode
,
plus_constant
(
tramp
,
8
)),
high_cxt
);
emit_move_insn
(
tem
,
g2_ori
);
emit_insn
(
gen_iorsi3
(
low_cxt
,
low_cxt
,
tem
));
emit_move_insn
(
gen_rtx
(
MEM
,
SImode
,
plus_constant
(
tramp
,
16
)),
low_cxt
);
emit_insn
(
gen_flush
(
validize_mem
(
gen_rtx
(
MEM
,
SImode
,
tramp
))));
emit_insn
(
gen_flush
(
validize_mem
(
gen_rtx
(
MEM
,
SImode
,
emit_move_insn
(
gen_rtx
_MEM
(
SImode
,
plus_constant
(
tramp
,
16
)),
low_cxt
);
emit_insn
(
gen_flush
(
validize_mem
(
gen_rtx
_MEM
(
SImode
,
tramp
))));
emit_insn
(
gen_flush
(
validize_mem
(
gen_rtx
_MEM
(
SImode
,
plus_constant
(
tramp
,
8
)))));
emit_insn
(
gen_flush
(
validize_mem
(
gen_rtx
(
MEM
,
SImode
,
emit_insn
(
gen_flush
(
validize_mem
(
gen_rtx
_MEM
(
SImode
,
plus_constant
(
tramp
,
16
)))));
}
...
...
@@ -5738,16 +5738,16 @@ void
sparc64_initialize_trampoline
(
tramp
,
fnaddr
,
cxt
)
rtx
tramp
,
fnaddr
,
cxt
;
{
emit_move_insn
(
gen_rtx
(
MEM
,
DImode
,
plus_constant
(
tramp
,
24
)),
cxt
);
emit_move_insn
(
gen_rtx
(
MEM
,
DImode
,
plus_constant
(
tramp
,
32
)),
fnaddr
);
emit_insn
(
gen_flush
(
validize_mem
(
gen_rtx
(
MEM
,
DImode
,
tramp
))));
emit_insn
(
gen_flush
(
validize_mem
(
gen_rtx
(
MEM
,
DImode
,
emit_move_insn
(
gen_rtx
_MEM
(
DImode
,
plus_constant
(
tramp
,
24
)),
cxt
);
emit_move_insn
(
gen_rtx
_MEM
(
DImode
,
plus_constant
(
tramp
,
32
)),
fnaddr
);
emit_insn
(
gen_flush
(
validize_mem
(
gen_rtx
_MEM
(
DImode
,
tramp
))));
emit_insn
(
gen_flush
(
validize_mem
(
gen_rtx
_MEM
(
DImode
,
plus_constant
(
tramp
,
8
)))));
emit_insn
(
gen_flush
(
validize_mem
(
gen_rtx
(
MEM
,
DImode
,
emit_insn
(
gen_flush
(
validize_mem
(
gen_rtx
_MEM
(
DImode
,
plus_constant
(
tramp
,
16
)))));
emit_insn
(
gen_flush
(
validize_mem
(
gen_rtx
(
MEM
,
DImode
,
emit_insn
(
gen_flush
(
validize_mem
(
gen_rtx
_MEM
(
DImode
,
plus_constant
(
tramp
,
24
)))));
emit_insn
(
gen_flush
(
validize_mem
(
gen_rtx
(
MEM
,
DImode
,
emit_insn
(
gen_flush
(
validize_mem
(
gen_rtx
_MEM
(
DImode
,
plus_constant
(
tramp
,
32
)))));
}
...
...
gcc/config/sparc/sparc.md
View file @
254110c2
...
...
@@ -2701,14 +2701,14 @@
&& GET_MODE (sparc_compare_op0) == DImode
&& v9_regcmp_p (code))
{
operands
[
1
]
= gen_rtx (code, DImode,
operands
[
1
]
= gen_rtx
_fmt_ee
(code, DImode,
sparc_compare_op0, sparc_compare_op1);
}
else
{
rtx cc_reg = gen_compare_reg (code,
sparc_compare_op0, sparc_compare_op1);
operands
[
1
]
= gen_rtx (code, GET_MODE (cc_reg), cc_reg, const0_rtx);
operands
[
1
]
= gen_rtx
_fmt_ee
(code, GET_MODE (cc_reg), cc_reg, const0_rtx);
}
}")
...
...
@@ -2731,14 +2731,14 @@
&& GET_MODE (sparc_compare_op0) == DImode
&& v9_regcmp_p (code))
{
operands
[
1
]
= gen_rtx (code, DImode,
operands
[
1
]
= gen_rtx
_fmt_ee
(code, DImode,
sparc_compare_op0, sparc_compare_op1);
}
else
{
rtx cc_reg = gen_compare_reg (code,
sparc_compare_op0, sparc_compare_op1);
operands
[
1
]
= gen_rtx (code, GET_MODE (cc_reg), cc_reg, const0_rtx);
operands
[
1
]
= gen_rtx
_fmt_ee
(code, GET_MODE (cc_reg), cc_reg, const0_rtx);
}
}")
...
...
@@ -2816,14 +2816,14 @@
&& GET_MODE (sparc_compare_op0) == DImode
&& v9_regcmp_p (code))
{
operands
[
1
]
= gen_rtx (code, DImode,
operands
[
1
]
= gen_rtx
_fmt_ee
(code, DImode,
sparc_compare_op0, sparc_compare_op1);
}
else
{
rtx cc_reg = gen_compare_reg (code,
sparc_compare_op0, sparc_compare_op1);
operands
[
1
]
= gen_rtx (code, GET_MODE (cc_reg), cc_reg, const0_rtx);
operands
[
1
]
= gen_rtx
_fmt_ee
(code, GET_MODE (cc_reg), cc_reg, const0_rtx);
}
}")
...
...
@@ -2846,14 +2846,14 @@
&& GET_MODE (sparc_compare_op0) == DImode
&& v9_regcmp_p (code))
{
operands
[
1
]
= gen_rtx (code, DImode,
operands
[
1
]
= gen_rtx
_fmt_ee
(code, DImode,
sparc_compare_op0, sparc_compare_op1);
}
else
{
rtx cc_reg = gen_compare_reg (code,
sparc_compare_op0, sparc_compare_op1);
operands
[
1
]
= gen_rtx (code, GET_MODE (cc_reg), cc_reg, const0_rtx);
operands
[
1
]
= gen_rtx
_fmt_ee
(code, GET_MODE (cc_reg), cc_reg, const0_rtx);
}
}")
...
...
@@ -2876,14 +2876,14 @@
&& GET_MODE (sparc_compare_op0) == DImode
&& v9_regcmp_p (code))
{
operands
[
1
]
= gen_rtx (code, DImode,
operands
[
1
]
= gen_rtx
_fmt_ee
(code, DImode,
sparc_compare_op0, sparc_compare_op1);
}
else
{
rtx cc_reg = gen_compare_reg (code,
sparc_compare_op0, sparc_compare_op1);
operands
[
1
]
= gen_rtx (code, GET_MODE (cc_reg), cc_reg, const0_rtx);
operands
[
1
]
= gen_rtx
_fmt_ee
(code, GET_MODE (cc_reg), cc_reg, const0_rtx);
}
}")
...
...
@@ -3146,7 +3146,7 @@
operand1 = XEXP (operand1, 0);
}
emit_insn (gen_ashlsi3 (temp, gen_rtx
(SUBREG,
SImode, operand1,
emit_insn (gen_ashlsi3 (temp, gen_rtx
_SUBREG (
SImode, operand1,
op1_subword),
shift_16));
emit_insn (gen_lshrsi3 (operand0, temp, shift_16));
...
...
@@ -3688,7 +3688,7 @@ return \"srl %1,0,%0\";
gen_rtx_PLUS (DImode, operands
[
1
]
,
operands
[
2
]
)),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_
raw_
REG (SImode, SPARC_ICC_REG)))));
gen_rtx_REG (SImode, SPARC_ICC_REG)))));
DONE;
}
}")
...
...
@@ -3872,7 +3872,7 @@ return \"srl %1,0,%0\";
gen_rtx_MINUS (DImode, operands
[
1
]
,
operands
[
2
]
)),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_
raw_
REG (SImode, SPARC_ICC_REG)))));
gen_rtx_REG (SImode, SPARC_ICC_REG)))));
DONE;
}
}")
...
...
@@ -4948,7 +4948,7 @@ return \"srl %1,0,%0\";
gen_rtx_SET (VOIDmode, operand0,
gen_rtx_NEG (DImode, operand1)),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_
raw_
REG (SImode, SPARC_ICC_REG)))));
gen_rtx_REG (SImode, SPARC_ICC_REG)))));
DONE;
}
}")
...
...
@@ -5628,7 +5628,7 @@ if (! TARGET_ARCH64)
XEXP (operands[0], 0)),
GEN_INT (INTVAL (operands[3]) & 0xfff),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_
raw_
REG (Pmode, 15)))));
gen_rtx_REG (Pmode, 15)))));
else
emit_jump_insn
(gen_rtx_PARALLEL (VOIDmode,
...
...
@@ -5636,7 +5636,7 @@ if (! TARGET_ARCH64)
gen_rtx_SET (VOIDmode, pc_rtx,
XEXP (operands[0], 0)),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_
raw_
REG (Pmode, 15)))));
gen_rtx_REG (Pmode, 15)))));
goto finish_call;
}
...
...
@@ -5660,13 +5660,13 @@ if (! TARGET_ARCH64)
gen_rtvec (3, gen_rtx_CALL (VOIDmode, fn_rtx, nregs_rtx),
GEN_INT (INTVAL (operands[3]) & 0xfff),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_
raw_
REG (Pmode, 15)))));
gen_rtx_REG (Pmode, 15)))));
else
emit_call_insn
(gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2, gen_rtx_CALL (VOIDmode, fn_rtx, nregs_rtx),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_
raw_
REG (Pmode, 15)))));
gen_rtx_REG (Pmode, 15)))));
finish_call:
#if 0
...
...
@@ -5799,7 +5799,7 @@ if (! TARGET_ARCH64)
vec = gen_rtvec (2,
gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_CALL (VOIDmode, fn_rtx, nregs_rtx)),
gen_rtx_CLOBBER (VOIDmode, gen_rtx_
raw_
REG (Pmode, 15)));
gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 15)));
emit_call_insn (gen_rtx_PARALLEL (VOIDmode, vec));
...
...
@@ -5891,13 +5891,13 @@ if (! TARGET_ARCH64)
""
"
{
rtx valreg1 = gen_rtx_
raw_
REG (DImode, 24);
rtx valreg2 = gen_rtx_
raw_
REG (TARGET_ARCH64 ? TFmode : DFmode, 32);
rtx valreg1 = gen_rtx_REG (DImode, 24);
rtx valreg2 = gen_rtx_REG (TARGET_ARCH64 ? TFmode : DFmode, 32);
rtx result = operands[0];
if (! TARGET_ARCH64)
{
rtx rtnreg = gen_rtx_
raw_
REG (SImode, (leaf_function ? 15 : 31));
rtx rtnreg = gen_rtx_REG (SImode, (leaf_function ? 15 : 31));
rtx value = gen_reg_rtx (SImode);
/* Fetch the instruction where we will return to and see if it's an unimp
...
...
@@ -5999,7 +5999,7 @@ if (! TARGET_ARCH64)
/* Find the containing function's current nonlocal goto handler,
which will do any cleanups and then jump to the label. */
labreg = gen_rtx_
raw_
REG (Pmode, 8);
labreg = gen_rtx_REG (Pmode, 8);
emit_move_insn (labreg, lab);
/* Restore %fp from stack pointer value for containing function.
...
...
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