Commit 1f6fc4de by Jim Wilson

(true_dependence): An unchanging read is guaranteed independent of a store only…

(true_dependence): An unchanging read is guaranteed independent of a store only if the store is not unchanging.

(true_dependence): An unchanging read is guaranteed
independent of a store only if the store is not unchanging.
(anti_dependence): Added comment about unchanging reads.
(sched_analyze_2): Don't ignore unchanging reads, they may be
dependent on unchanging writes.

From-SVN: r1777
parent 5584677e
......@@ -653,7 +653,14 @@ true_dependence (mem, x)
rtx mem;
rtx x;
{
if (RTX_UNCHANGING_P (x))
/* If X is an unchanging read, then it can't possibly conflict with any
non-unchanging store. It may conflict with an unchanging write though,
because there may be a single store to this address to initialize it.
Just fall through to the code below to resolve the case where we have
both an unchanging read and an unchanging write. This won't handle all
cases optimally, but the possible performance loss should be
negligible. */
if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem))
return 0;
return ((MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
......@@ -672,6 +679,9 @@ anti_dependence (mem, x)
rtx mem;
rtx x;
{
/* If MEM is an unchanging read, then it can't possibly conflict with
the store to X, because there is at most one store to MEM, and it must
have occured somewhere before MEM. */
if (RTX_UNCHANGING_P (mem))
return 0;
......@@ -1389,11 +1399,6 @@ sched_analyze_2 (x, insn)
{
/* Reading memory. */
/* Don't create a dependence for memory references which are known to
be unchanging, such as constant pool accesses. These will never
conflict with any other memory access. */
if (RTX_UNCHANGING_P (x) == 0)
{
rtx pending, pending_mem;
pending = pending_read_insns;
......@@ -1428,7 +1433,7 @@ sched_analyze_2 (x, insn)
this insn may be followed by a write. */
add_insn_mem_dependence (&pending_read_insns, &pending_read_mems,
insn, x);
}
/* Take advantage of tail recursion here. */
sched_analyze_2 (XEXP (x, 0), insn);
return;
......
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