Commit 1e6a67d1 by Georg-Johann Lay Committed by Georg-Johann Lay

avr.md (*reload_insi): Change predicate #1 to const_int_operand.

	
	* config/avr/avr.md (*reload_insi): Change predicate #1 to
	const_int_operand.  Ditto for peep2 producing this insn.
	Add argument to output_reload_insisf call.
	(*movsi,*movsf): Add argument to output_movsisf call.
	(*reload_insf): New insn and new peep2 to produce it.
	* config/avr/avr-protos.h (output_movsisf): Change prototype.
	(output_reload_insisf): Change prototype.
	* config/avr/avr.c (avr_asm_len): New function.
	(output_reload_insisf): Rewrite.
	(output_movsisf): Change prototype.  output_reload_insisf for
	all CONST_INT and CONST_DOUBLE.  ALlow moving 0.0f to memory.
	(adjust_insn_length): Add argument to output_movsisf and
	output_reload_insisf call.

From-SVN: r175956
parent ffca9d53
2011-07-07 Georg-Johann Lay <avr@gjlay.de>
* config/avr/avr.md (*reload_insi): Change predicate #1 to
const_int_operand. Ditto for peep2 producing this insn.
Add argument to output_reload_insisf call.
(*movsi,*movsf): Add argument to output_movsisf call.
(*reload_insf): New insn and new peep2 to produce it.
* config/avr/avr-protos.h (output_movsisf): Change prototype.
(output_reload_insisf): Change prototype.
* config/avr/avr.c (avr_asm_len): New function.
(output_reload_insisf): Rewrite.
(output_movsisf): Change prototype. output_reload_insisf for
all CONST_INT and CONST_DOUBLE. ALlow moving 0.0f to memory.
(adjust_insn_length): Add argument to output_movsisf and
output_reload_insisf call.
2011-07-07 Bernd Schmidt <bernds@codesourcery.com>
* emit-rtl.c (paradoxical_subreg_p): New function.
......
......@@ -56,7 +56,7 @@ extern const char *out_movhi_r_mr (rtx insn, rtx op[], int *l);
extern const char *out_movhi_mr_r (rtx insn, rtx op[], int *l);
extern const char *out_movsi_r_mr (rtx insn, rtx op[], int *l);
extern const char *out_movsi_mr_r (rtx insn, rtx op[], int *l);
extern const char *output_movsisf (rtx insn, rtx operands[], int *l);
extern const char *output_movsisf (rtx insn, rtx operands[], rtx clobber, int *l);
extern const char *out_tstsi (rtx insn, rtx src, int *l);
extern const char *out_tsthi (rtx insn, rtx src, int *l);
extern const char *ret_cond_branch (rtx x, int len, int reverse);
......@@ -85,7 +85,7 @@ extern const char *avr_out_sbxx_branch (rtx insn, rtx operands[]);
extern int extra_constraint_Q (rtx x);
extern int adjust_insn_length (rtx insn, int len);
extern const char *output_reload_inhi (rtx insn, rtx *operands, int *len);
extern const char *output_reload_insisf (rtx insn, rtx *operands, int *len);
extern const char *output_reload_insisf (rtx insn, rtx *operands, rtx clobber, int *len);
extern enum reg_class secondary_input_reload_class (enum reg_class,
enum machine_mode,
rtx);
......
......@@ -402,10 +402,10 @@
(define_peephole2 ; movsi_lreg_const
(define_peephole2 ; *reload_insi
[(match_scratch:QI 2 "d")
(set (match_operand:SI 0 "l_register_operand" "")
(match_operand:SI 1 "immediate_operand" ""))
(match_operand:SI 1 "const_int_operand" ""))
(match_dup 2)]
"(operands[1] != const0_rtx
&& operands[1] != constm1_rtx)"
......@@ -416,12 +416,14 @@
;; '*' because it is not used in rtl generation.
(define_insn "*reload_insi"
[(set (match_operand:SI 0 "register_operand" "=r")
(match_operand:SI 1 "immediate_operand" "i"))
(match_operand:SI 1 "const_int_operand" "n"))
(clobber (match_operand:QI 2 "register_operand" "=&d"))]
"reload_completed"
"* return output_reload_insisf (insn, operands, NULL);"
{
return output_reload_insisf (insn, operands, operands[2], NULL);
}
[(set_attr "length" "8")
(set_attr "cc" "none")])
(set_attr "cc" "clobber")])
(define_insn "*movsi"
......@@ -429,9 +431,11 @@
(match_operand:SI 1 "general_operand" "r,L,Qm,rL,i,i"))]
"(register_operand (operands[0],SImode)
|| register_operand (operands[1],SImode) || const0_rtx == operands[1])"
"* return output_movsisf (insn, operands, NULL);"
{
return output_movsisf (insn, operands, NULL_RTX, NULL);
}
[(set_attr "length" "4,4,8,9,4,10")
(set_attr "cc" "none,set_zn,clobber,clobber,none,clobber")])
(set_attr "cc" "none,set_zn,clobber,clobber,clobber,clobber")])
;; fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
;; move floating point numbers (32 bit)
......@@ -452,12 +456,38 @@
(define_insn "*movsf"
[(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,r,Qm,!d,r")
(match_operand:SF 1 "general_operand" "r,G,Qm,r,F,F"))]
(match_operand:SF 1 "general_operand" "r,G,Qm,rG,F,F"))]
"register_operand (operands[0], SFmode)
|| register_operand (operands[1], SFmode)"
"* return output_movsisf (insn, operands, NULL);"
|| register_operand (operands[1], SFmode)
|| operands[1] == CONST0_RTX (SFmode)"
{
return output_movsisf (insn, operands, NULL_RTX, NULL);
}
[(set_attr "length" "4,4,8,9,4,10")
(set_attr "cc" "none,set_zn,clobber,clobber,none,clobber")])
(set_attr "cc" "none,set_zn,clobber,clobber,clobber,clobber")])
(define_peephole2 ; *reload_insf
[(match_scratch:QI 2 "d")
(set (match_operand:SF 0 "l_register_operand" "")
(match_operand:SF 1 "const_double_operand" ""))
(match_dup 2)]
"operands[1] != CONST0_RTX (SFmode)"
[(parallel [(set (match_dup 0)
(match_dup 1))
(clobber (match_dup 2))])]
"")
;; '*' because it is not used in rtl generation.
(define_insn "*reload_insf"
[(set (match_operand:SF 0 "register_operand" "=r")
(match_operand:SF 1 "const_double_operand" "F"))
(clobber (match_operand:QI 2 "register_operand" "=&d"))]
"reload_completed"
{
return output_reload_insisf (insn, operands, operands[2], NULL);
}
[(set_attr "length" "8")
(set_attr "cc" "clobber")])
;;=========================================================================
;; move string (like memcpy)
......
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