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riscv-gcc-1
Commit 1e4c04e0 by Michael Hayes
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c4x.md (UNSPEC_BU): New constants. 

	* config/c4x/c4x.md (UNSPEC_BU): New constants.
	(UNSPEC_RPTS, UNSPEC_LSH, UNSPEC_CMPHI, UNSPEC_RCPF): Likewise.
	(UNSPEC_RND, UNSPEC_RPTB_FILL, UNSPEC_LOADHF_INT): Likewise.
	(UNSPEC_STOREHF_INT, UNSPEC_RSQRF, UNSPEC_LOADQF_INT): Likewise.
	(UNSPEC_STOREQF_INT, UNSPEC_LDIV, UNSPEC_PUSH_ST):  Likewise.
	(UNSPEC_POP_ST, UNSPEC_PUSH_DP, UNSPEC_POP_DP):  Likewise.
	(UNSPEC_POPQI, UNSPEC_POPQF, UNSPEC_ANDN_ST):  Likewise.
	(UNSPEC_RPTB_INIT, UNSPEC_TOIEEE, UNSPEC_FRIEEE):  Likewise.

From-SVN: r61754
parent e5c81eff
Showing with 94 additions and 76 deletions
gcc/ChangeLog
2003-01-25 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
* config/c4x/c4x.md (UNSPEC_BU): New constants.
(UNSPEC_RPTS, UNSPEC_LSH, UNSPEC_CMPHI, UNSPEC_RCPF): Likewise.
(UNSPEC_RND, UNSPEC_RPTB_FILL, UNSPEC_LOADHF_INT): Likewise.
(UNSPEC_STOREHF_INT, UNSPEC_RSQRF, UNSPEC_LOADQF_INT): Likewise.
(UNSPEC_STOREQF_INT, UNSPEC_LDIV, UNSPEC_PUSH_ST): Likewise.
(UNSPEC_POP_ST, UNSPEC_PUSH_DP, UNSPEC_POP_DP): Likewise.
(UNSPEC_POPQI, UNSPEC_POPQF, UNSPEC_ANDN_ST): Likewise.
(UNSPEC_RPTB_INIT, UNSPEC_TOIEEE, UNSPEC_FRIEEE): Likewise.
Fri Jan 24 23:44:12 CET 2003 Jan Hubicka <jh@suse.cz> Fri Jan 24 23:44:12 CET 2003 Jan Hubicka <jh@suse.cz>
* emit-rtl.c (reg_attrs_htab): New static variable. : New static variable.
(reg_attrs_htab_hash, reg_attrs_htab_eq, get_reg_attrs): New static (reg_attrs_htab_hash, reg_attrs_htab_eq, get_reg_attrs): New static
functions. functions.
(reg_rtx): Do not maintain regno_decl. (reg_rtx): Do not maintain regno_decl.
......
gcc/config/c4x/c4x.md
...@@ -446,29 +446,32 @@ ...@@ -446,29 +446,32 @@
; ;
; C4x UNSPEC NUMBERS ; C4x UNSPEC NUMBERS
; ;
; 1 BU/BUD (define_constants
; 2 RPTS [
; 3 LSH (UNSPEC_BU 1)
; 4 cmphi (UNSPEC_RPTS 2)
; 5 RCPF (UNSPEC_LSH 3)
; 6 RND (UNSPEC_CMPHI 4)
; 7 repeat block filler (UNSPEC_RCPF 5)
; 8 loadhf_int (UNSPEC_RND 6)
; 9 storehf_int (UNSPEC_RPTB_FILL 7)
; 10 RSQRF (UNSPEC_LOADHF_INT 8)
; 11 loadqf_int (UNSPEC_STOREHF_INT 9)
; 12 storeqf_int (UNSPEC_RSQRF 10)
; 13 Conditional load on overflow (UNSPEC_LOADQF_INT 11)
; 14 push_st (UNSPEC_STOREQF_INT 12)
; 15 pop_st (UNSPEC_LDIV 13)
; 16 push_dp (UNSPEC_PUSH_ST 14)
; 17 pop_dp (UNSPEC_POP_ST 15)
; 18 popqi_unspec (UNSPEC_PUSH_DP 16)
; 19 popqf_unspec (UNSPEC_POP_DP 17)
; 20 andn_st (UNSPEC_POPQI 18)
; 22 rptb_init (UNSPEC_POPQF 19)
; 23 toieee (UNSPEC_ANDN_ST 20)
; 24 frieee (UNSPEC_RPTB_INIT 22)
(UNSPEC_TOIEEE 23)
(UNSPEC_FRIEEE 24)
])
; ;
; C4x FUNCTIONAL UNITS ; C4x FUNCTIONAL UNITS
...@@ -1414,14 +1417,16 @@ ...@@ -1414,14 +1417,16 @@
[(set_attr "type" "push")]) [(set_attr "type" "push")])
(define_insn "push_st" (define_insn "push_st"
[(set (mem:QI (pre_inc:QI (reg:QI 20))) (unspec:QI [(reg:QI 21)] 14)) [(set (mem:QI (pre_inc:QI (reg:QI 20)))
(unspec:QI [(reg:QI 21)] UNSPEC_PUSH_ST))
(use (reg:QI 21))] (use (reg:QI 21))]
"" ""
"push\\tst" "push\\tst"
[(set_attr "type" "push")]) [(set_attr "type" "push")])
(define_insn "push_dp" (define_insn "push_dp"
[(set (mem:QI (pre_inc:QI (reg:QI 20))) (unspec:QI [(reg:QI 16)] 16)) [(set (mem:QI (pre_inc:QI (reg:QI 20)))
(unspec:QI [(reg:QI 16)] UNSPEC_PUSH_DP))
(use (reg:QI 16))] (use (reg:QI 16))]
"" ""
"push\\tdp" "push\\tdp"
...@@ -1436,21 +1441,23 @@ ...@@ -1436,21 +1441,23 @@
[(set_attr "type" "pop")]) [(set_attr "type" "pop")])
(define_insn "pop_st" (define_insn "pop_st"
[(set (unspec:QI [(reg:QI 21)] 15) (mem:QI (post_dec:QI (reg:QI 20)))) [(set (unspec:QI [(reg:QI 21)] UNSPEC_POP_ST)
(mem:QI (post_dec:QI (reg:QI 20))))
(clobber (reg:CC 21))] (clobber (reg:CC 21))]
"" ""
"pop\\tst" "pop\\tst"
[(set_attr "type" "pop")]) [(set_attr "type" "pop")])
(define_insn "pop_dp" (define_insn "pop_dp"
[(set (unspec:QI [(reg:QI 16)] 17) (mem:QI (post_dec:QI (reg:QI 20)))) [(set (unspec:QI [(reg:QI 16)] UNSPEC_POP_DP)
(mem:QI (post_dec:QI (reg:QI 20))))
(clobber (reg:CC 16))] (clobber (reg:CC 16))]
"" ""
"pop\\tdp" "pop\\tdp"
[(set_attr "type" "pop")]) [(set_attr "type" "pop")])
(define_insn "popqi_unspec" (define_insn "popqi_unspec"
[(set (unspec:QI [(match_operand:QI 0 "reg_operand" "=r")] 18) [(set (unspec:QI [(match_operand:QI 0 "reg_operand" "=r")] UNSPEC_POPQI)
(mem:QI (post_dec:QI (reg:QI 20)))) (mem:QI (post_dec:QI (reg:QI 20))))
(clobber (match_dup 0)) (clobber (match_dup 0))
(clobber (reg:CC 21))] (clobber (reg:CC 21))]
...@@ -2489,7 +2496,7 @@ ...@@ -2489,7 +2496,7 @@
(define_insn "andn_st" (define_insn "andn_st"
[(set (unspec:QI [(reg:QI 21)] 20) [(set (unspec:QI [(reg:QI 21)] 20)
(and:QI (unspec:QI [(reg:QI 21)] 20) (and:QI (unspec:QI [(reg:QI 21)] UNSPEC_ANDN_ST)
(match_operand:QI 0 "" "N"))) (match_operand:QI 0 "" "N")))
(use (match_dup 0)) (use (match_dup 0))
(use (reg:CC 21)) (use (reg:CC 21))
...@@ -2890,7 +2897,7 @@ ...@@ -2890,7 +2897,7 @@
(define_insn "*lshlqi3_clobber" (define_insn "*lshlqi3_clobber"
[(set (match_operand:QI 0 "reg_operand" "=d,d,?d,c,c,?c") [(set (match_operand:QI 0 "reg_operand" "=d,d,?d,c,c,?c")
(ashift:QI (match_operand:QI 1 "src_operand" "0,rR,rS<>,0,rR,rS<>") (ashift:QI (match_operand:QI 1 "src_operand" "0,rR,rS<>,0,rR,rS<>")
(unspec:QI [(match_operand:QI 2 "src_operand" "rIm,JR,rS<>,rIm,JR,rS<>")] 3))) (unspec:QI [(match_operand:QI 2 "src_operand" "rIm,JR,rS<>,rIm,JR,rS<>")] UNSPEC_LSH)))
(clobber (reg:CC 21))] (clobber (reg:CC 21))]
"valid_operands (ASHIFT, operands, QImode)" "valid_operands (ASHIFT, operands, QImode)"
"@ "@
...@@ -3425,7 +3432,7 @@ ...@@ -3425,7 +3432,7 @@
; This can generate invalid stack slot displacements ; This can generate invalid stack slot displacements
(define_split (define_split
[(set (match_operand:QI 0 "reg_operand" "") [(set (match_operand:QI 0 "reg_operand" "")
(unspec:QI [(match_operand:QF 1 "reg_operand" "")] 12))] (unspec:QI [(match_operand:QF 1 "reg_operand" "")] UNSPEC_STOREQF_INT))]
"reload_completed" "reload_completed"
[(set (match_dup 3) (match_dup 1)) [(set (match_dup 3) (match_dup 1))
(set (match_dup 0) (match_dup 2))] (set (match_dup 0) (match_dup 2))]
...@@ -3436,14 +3443,14 @@ ...@@ -3436,14 +3443,14 @@
(define_insn "storeqf_int" (define_insn "storeqf_int"
[(set (match_operand:QI 0 "reg_operand" "=r") [(set (match_operand:QI 0 "reg_operand" "=r")
(unspec:QI [(match_operand:QF 1 "reg_operand" "f")] 12))] (unspec:QI [(match_operand:QF 1 "reg_operand" "f")] UNSPEC_STOREQF_INT))]
"" ""
"#" "#"
[(set_attr "type" "multi")]) [(set_attr "type" "multi")])
(define_split (define_split
[(parallel [(set (match_operand:QI 0 "reg_operand" "") [(parallel [(set (match_operand:QI 0 "reg_operand" "")
(unspec:QI [(match_operand:QF 1 "reg_operand" "")] 12)) (unspec:QI [(match_operand:QF 1 "reg_operand" "")] UNSPEC_STOREQF_INT))
(clobber (reg:CC 21))])] (clobber (reg:CC 21))])]
"reload_completed" "reload_completed"
[(set (mem:QF (pre_inc:QI (reg:QI 20))) [(set (mem:QF (pre_inc:QI (reg:QI 20)))
...@@ -3468,7 +3475,7 @@ ...@@ -3468,7 +3475,7 @@
(define_insn "storeqf_int_clobber" (define_insn "storeqf_int_clobber"
[(parallel [(set (match_operand:QI 0 "reg_operand" "=r") [(parallel [(set (match_operand:QI 0 "reg_operand" "=r")
(unspec:QI [(match_operand:QF 1 "reg_operand" "f")] 12)) (unspec:QI [(match_operand:QF 1 "reg_operand" "f")] UNSPEC_STOREQF_INT))
(clobber (reg:CC 21))])] (clobber (reg:CC 21))])]
"" ""
"#" "#"
...@@ -3478,7 +3485,7 @@ ...@@ -3478,7 +3485,7 @@
; This can generate invalid stack slot displacements ; This can generate invalid stack slot displacements
(define_split (define_split
[(set (match_operand:QF 0 "reg_operand" "") [(set (match_operand:QF 0 "reg_operand" "")
(unspec:QF [(match_operand:QI 1 "reg_operand" "")] 11))] (unspec:QF [(match_operand:QI 1 "reg_operand" "")] UNSPEC_LOADQF_INT))]
"reload_completed" "reload_completed"
[(set (match_dup 2) (match_dup 1)) [(set (match_dup 2) (match_dup 1))
(set (match_dup 0) (match_dup 3))] (set (match_dup 0) (match_dup 3))]
...@@ -3489,14 +3496,14 @@ ...@@ -3489,14 +3496,14 @@
(define_insn "loadqf_int" (define_insn "loadqf_int"
[(set (match_operand:QF 0 "reg_operand" "=f") [(set (match_operand:QF 0 "reg_operand" "=f")
(unspec:QF [(match_operand:QI 1 "reg_operand" "r")] 11))] (unspec:QF [(match_operand:QI 1 "reg_operand" "r")] UNSPEC_LOADQF_INT))]
"" ""
"#" "#"
[(set_attr "type" "multi")]) [(set_attr "type" "multi")])
(define_split (define_split
[(parallel [(set (match_operand:QF 0 "reg_operand" "") [(parallel [(set (match_operand:QF 0 "reg_operand" "")
(unspec:QF [(match_operand:QI 1 "reg_operand" "")] 11)) (unspec:QF [(match_operand:QI 1 "reg_operand" "")] UNSPEC_LOADQF_INT))
(clobber (reg:CC 21))])] (clobber (reg:CC 21))])]
"reload_completed" "reload_completed"
[(set (mem:QI (pre_inc:QI (reg:QI 20))) [(set (mem:QI (pre_inc:QI (reg:QI 20)))
...@@ -3508,7 +3515,7 @@ ...@@ -3508,7 +3515,7 @@
(define_insn "loadqf_int_clobber" (define_insn "loadqf_int_clobber"
[(parallel [(set (match_operand:QF 0 "reg_operand" "=f") [(parallel [(set (match_operand:QF 0 "reg_operand" "=f")
(unspec:QF [(match_operand:QI 1 "reg_operand" "r")] 11)) (unspec:QF [(match_operand:QI 1 "reg_operand" "r")] UNSPEC_LOADQF_INT))
(clobber (reg:CC 21))])] (clobber (reg:CC 21))])]
"" ""
"#" "#"
...@@ -3586,7 +3593,7 @@ ...@@ -3586,7 +3593,7 @@
[(set_attr "type" "pop")]) [(set_attr "type" "pop")])
(define_insn "popqf_unspec" (define_insn "popqf_unspec"
[(set (unspec:QF [(match_operand:QF 0 "reg_operand" "=f")] 19) [(set (unspec:QF [(match_operand:QF 0 "reg_operand" "=f")] UNSPEC_POPQF)
(mem:QF (post_dec:QI (reg:QI 20)))) (mem:QF (post_dec:QI (reg:QI 20))))
(clobber (match_dup 0)) (clobber (match_dup 0))
(clobber (reg:CC 21))] (clobber (reg:CC 21))]
...@@ -3867,7 +3874,7 @@ ...@@ -3867,7 +3874,7 @@
(const_int 0))) (const_int 0)))
(set (match_dup 4) (set (match_dup 4)
(fix:QI (match_dup 3)))]) (fix:QI (match_dup 3)))])
(parallel [(set (match_dup 4) (unspec:QI [(match_dup 2)] 13)) (parallel [(set (match_dup 4) (unspec:QI [(match_dup 2)] UNSPEC_LDIV))
(use (reg:CC 21))]) (use (reg:CC 21))])
(set (match_operand:QI 0 "reg_operand" "=r") (match_dup 4))] (set (match_operand:QI 0 "reg_operand" "=r") (match_dup 4))]
"" ""
...@@ -3889,7 +3896,7 @@ ...@@ -3889,7 +3896,7 @@
(const_int 0))) (const_int 0)))
(set (match_dup 4) (set (match_dup 4)
(fix:QI (match_dup 3)))]) (fix:QI (match_dup 3)))])
(parallel [(set (match_dup 4) (unspec:QI [(match_dup 2)] 13)) (parallel [(set (match_dup 4) (unspec:QI [(match_dup 2)] UNSPEC_LDIV))
(use (reg:CC 21))]) (use (reg:CC 21))])
(set (match_operand:QI 0 "reg_operand" "=r") (match_dup 4))] (set (match_operand:QI 0 "reg_operand" "=r") (match_dup 4))]
"" ""
...@@ -3913,7 +3920,7 @@ ...@@ -3913,7 +3920,7 @@
; ;
(define_insn "rcpfqf_clobber" (define_insn "rcpfqf_clobber"
[(set (match_operand:QF 0 "reg_operand" "=f") [(set (match_operand:QF 0 "reg_operand" "=f")
(unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] 5)) (unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] UNSPEC_RCPF))
(clobber (reg:CC_NOOV 21))] (clobber (reg:CC_NOOV 21))]
"! TARGET_C3X" "! TARGET_C3X"
"rcpf\\t%1,%0" "rcpf\\t%1,%0"
...@@ -3924,7 +3931,7 @@ ...@@ -3924,7 +3931,7 @@
; ;
(define_insn "*rsqrfqf_clobber" (define_insn "*rsqrfqf_clobber"
[(set (match_operand:QF 0 "reg_operand" "=f") [(set (match_operand:QF 0 "reg_operand" "=f")
(unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] 10)) (unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] UNSPEC_RSQRF))
(clobber (reg:CC_NOOV 21))] (clobber (reg:CC_NOOV 21))]
"! TARGET_C3X" "! TARGET_C3X"
"rsqrf\\t%1,%0" "rsqrf\\t%1,%0"
...@@ -3935,7 +3942,7 @@ ...@@ -3935,7 +3942,7 @@
; ;
(define_insn "*rndqf_clobber" (define_insn "*rndqf_clobber"
[(set (match_operand:QF 0 "reg_operand" "=f") [(set (match_operand:QF 0 "reg_operand" "=f")
(unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] 6)) (unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] UNSPEC_RND))
(clobber (reg:CC_NOOV 21))] (clobber (reg:CC_NOOV 21))]
"! TARGET_C3X" "! TARGET_C3X"
"rnd\\t%1,%0" "rnd\\t%1,%0"
...@@ -3945,7 +3952,7 @@ ...@@ -3945,7 +3952,7 @@
; Inlined float square root for C4x ; Inlined float square root for C4x
(define_expand "sqrtqf2_inline" (define_expand "sqrtqf2_inline"
[(parallel [(set (match_dup 2) [(parallel [(set (match_dup 2)
(unspec:QF [(match_operand:QF 1 "src_operand" "")] 10)) (unspec:QF [(match_operand:QF 1 "src_operand" "")] UNSPEC_RSQRF))
(clobber (reg:CC_NOOV 21))]) (clobber (reg:CC_NOOV 21))])
(parallel [(set (match_dup 3) (mult:QF (match_dup 5) (match_dup 1))) (parallel [(set (match_dup 3) (mult:QF (match_dup 5) (match_dup 1)))
(clobber (reg:CC_NOOV 21))]) (clobber (reg:CC_NOOV 21))])
...@@ -3968,7 +3975,7 @@ ...@@ -3968,7 +3975,7 @@
(parallel [(set (match_dup 4) (mult:QF (match_dup 2) (match_dup 1))) (parallel [(set (match_dup 4) (mult:QF (match_dup 2) (match_dup 1)))
(clobber (reg:CC_NOOV 21))]) (clobber (reg:CC_NOOV 21))])
(parallel [(set (match_operand:QF 0 "reg_operand" "") (parallel [(set (match_operand:QF 0 "reg_operand" "")
(unspec:QF [(match_dup 4)] 6)) (unspec:QF [(match_dup 4)] UNSPEC_RND))
(clobber (reg:CC_NOOV 21))])] (clobber (reg:CC_NOOV 21))])]
"! TARGET_C3X" "! TARGET_C3X"
"if (! reload_in_progress "if (! reload_in_progress
...@@ -3993,14 +4000,14 @@ ...@@ -3993,14 +4000,14 @@
; ;
(define_insn "toieee" (define_insn "toieee"
[(set (match_operand:QF 0 "reg_operand" "=f") [(set (match_operand:QF 0 "reg_operand" "=f")
(unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] 23)) (unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] UNSPEC_TOIEEE))
(clobber (reg:CC 21))] (clobber (reg:CC 21))]
"" ""
"toieee\\t%1,%0") "toieee\\t%1,%0")
(define_insn "frieee" (define_insn "frieee"
[(set (match_operand:QF 0 "reg_operand" "=f") [(set (match_operand:QF 0 "reg_operand" "=f")
(unspec:QF [(match_operand:QF 1 "memory_operand" "m")] 24)) (unspec:QF [(match_operand:QF 1 "memory_operand" "m")] UNSPEC_FRIEEE))
(clobber (reg:CC 21))] (clobber (reg:CC 21))]
"" ""
"frieee\\t%1,%0") "frieee\\t%1,%0")
...@@ -4203,7 +4210,7 @@ ...@@ -4203,7 +4210,7 @@
; Inlined float divide for C4x ; Inlined float divide for C4x
(define_expand "divqf3_inline" (define_expand "divqf3_inline"
[(parallel [(set (match_dup 3) [(parallel [(set (match_dup 3)
(unspec:QF [(match_operand:QF 2 "src_operand" "")] 5)) (unspec:QF [(match_operand:QF 2 "src_operand" "")] UNSPEC_RCPF))
(clobber (reg:CC_NOOV 21))]) (clobber (reg:CC_NOOV 21))])
(parallel [(set (match_dup 4) (mult:QF (match_dup 2) (match_dup 3))) (parallel [(set (match_dup 4) (mult:QF (match_dup 2) (match_dup 3)))
(clobber (reg:CC_NOOV 21))]) (clobber (reg:CC_NOOV 21))])
...@@ -4222,7 +4229,7 @@ ...@@ -4222,7 +4229,7 @@
(match_dup 3))) (match_dup 3)))
(clobber (reg:CC_NOOV 21))]) (clobber (reg:CC_NOOV 21))])
(parallel [(set (match_operand:QF 0 "reg_operand" "") (parallel [(set (match_operand:QF 0 "reg_operand" "")
(unspec:QF [(match_dup 3)] 6)) (unspec:QF [(match_dup 3)] UNSPEC_RND))
(clobber (reg:CC_NOOV 21))])] (clobber (reg:CC_NOOV 21))])]
"! TARGET_C3X" "! TARGET_C3X"
"if (! reload_in_progress "if (! reload_in_progress
...@@ -4278,7 +4285,7 @@ ...@@ -4278,7 +4285,7 @@
(define_insn "*ldi_on_overflow" (define_insn "*ldi_on_overflow"
[(set (match_operand:QI 0 "reg_operand" "=r") [(set (match_operand:QI 0 "reg_operand" "=r")
(unspec:QI [(match_operand:QI 1 "src_operand" "rIm")] 13)) (unspec:QI [(match_operand:QI 1 "src_operand" "rIm")] UNSPEC_LDIV))
(use (reg:CC 21))] (use (reg:CC 21))]
"" ""
"ldiv\\t%1,%0" "ldiv\\t%1,%0"
...@@ -4519,7 +4526,7 @@ ...@@ -4519,7 +4526,7 @@
(define_insn "*bu" (define_insn "*bu"
[(set (pc) [(set (pc)
(unspec [(match_operand:QI 0 "reg_operand" "r")] 1))] (unspec [(match_operand:QI 0 "reg_operand" "r")] UNSPEC_BU))]
"" ""
"bu%#\\t%0" "bu%#\\t%0"
[(set_attr "type" "jump")]) [(set_attr "type" "jump")])
...@@ -4695,7 +4702,7 @@ ...@@ -4695,7 +4702,7 @@
(define_insn "*toieee_movqf_clobber" (define_insn "*toieee_movqf_clobber"
[(set (match_operand:QF 0 "ext_low_reg_operand" "=q") [(set (match_operand:QF 0 "ext_low_reg_operand" "=q")
(unspec:QF [(match_operand:QF 1 "par_ind_operand" "S<>")] 23)) (unspec:QF [(match_operand:QF 1 "par_ind_operand" "S<>")] UNSPEC_TOIEEE))
(set (match_operand:QF 2 "par_ind_operand" "=S<>") (set (match_operand:QF 2 "par_ind_operand" "=S<>")
(match_operand:QF 3 "ext_low_reg_operand" "q")) (match_operand:QF 3 "ext_low_reg_operand" "q"))
(clobber (reg:CC 21))] (clobber (reg:CC 21))]
...@@ -4709,7 +4716,7 @@ ...@@ -4709,7 +4716,7 @@
(define_insn "*frieee_movqf_clobber" (define_insn "*frieee_movqf_clobber"
[(set (match_operand:QF 0 "ext_low_reg_operand" "=q") [(set (match_operand:QF 0 "ext_low_reg_operand" "=q")
(unspec:QF [(match_operand:QF 1 "par_ind_operand" "S<>")] 24)) (unspec:QF [(match_operand:QF 1 "par_ind_operand" "S<>")] UNSPEC_FRIEEE))
(set (match_operand:QF 2 "par_ind_operand" "=S<>") (set (match_operand:QF 2 "par_ind_operand" "=S<>")
(match_operand:QF 3 "ext_low_reg_operand" "q")) (match_operand:QF 3 "ext_low_reg_operand" "q"))
(clobber (reg:CC 21))] (clobber (reg:CC 21))]
...@@ -5504,7 +5511,7 @@ ...@@ -5504,7 +5511,7 @@
(define_insn "rpts_top" (define_insn "rpts_top"
[(unspec [(use (label_ref (match_operand 0 "" ""))) [(unspec [(use (label_ref (match_operand 0 "" "")))
(use (label_ref (match_operand 1 "" "")))] 2) (use (label_ref (match_operand 1 "" "")))] UNSPEC_RPTS)
(clobber (reg:QI 25)) (clobber (reg:QI 25))
(clobber (reg:QI 26))] (clobber (reg:QI 26))]
"" ""
...@@ -5517,7 +5524,7 @@ ...@@ -5517,7 +5524,7 @@
; This pattern needs to be emitted at the start of the loop to ; This pattern needs to be emitted at the start of the loop to
; say that RS and RE are loaded. ; say that RS and RE are loaded.
(define_insn "rptb_init" (define_insn "rptb_init"
[(unspec [(match_operand:QI 0 "register_operand" "va")] 22) [(unspec [(match_operand:QI 0 "register_operand" "va")] UNSPEC_RPTB_INIT)
(clobber (reg:QI 25)) (clobber (reg:QI 25))
(clobber (reg:QI 26))] (clobber (reg:QI 26))]
"" ""
...@@ -5893,7 +5900,7 @@ ...@@ -5893,7 +5900,7 @@
"reload_completed" "reload_completed"
[(set (match_dup 0) (float_extend:HF (match_dup 2))) [(set (match_dup 0) (float_extend:HF (match_dup 2)))
(set (match_dup 0) (unspec:HF [(subreg:QI (match_dup 0) 0) (set (match_dup 0) (unspec:HF [(subreg:QI (match_dup 0) 0)
(match_dup 3)] 8))] (match_dup 3)] UNSPEC_LOADHF_INT))]
"operands[2] = c4x_operand_subword (operands[1], 0, 1, HFmode); "operands[2] = c4x_operand_subword (operands[1], 0, 1, HFmode);
operands[3] = c4x_operand_subword (operands[1], 1, 1, HFmode); operands[3] = c4x_operand_subword (operands[1], 1, 1, HFmode);
PUT_MODE (operands[2], QFmode); PUT_MODE (operands[2], QFmode);
...@@ -5905,7 +5912,7 @@ ...@@ -5905,7 +5912,7 @@
"reload_completed && 0" "reload_completed && 0"
[(set (match_dup 0) (float_extend:HF (match_dup 2))) [(set (match_dup 0) (float_extend:HF (match_dup 2)))
(set (match_dup 0) (unspec:HF [(subreg:QI (match_dup 0) 0) (set (match_dup 0) (unspec:HF [(subreg:QI (match_dup 0) 0)
(match_dup 3)] 8))] (match_dup 3)] UNSPEC_LOADHF_INT))]
"operands[2] = c4x_operand_subword (operands[1], 0, 1, HFmode); "operands[2] = c4x_operand_subword (operands[1], 0, 1, HFmode);
operands[3] = c4x_operand_subword (operands[1], 1, 1, HFmode); operands[3] = c4x_operand_subword (operands[1], 1, 1, HFmode);
PUT_MODE (operands[2], QFmode); PUT_MODE (operands[2], QFmode);
...@@ -5916,7 +5923,7 @@ ...@@ -5916,7 +5923,7 @@
(match_operand:HF 1 "reg_operand" ""))] (match_operand:HF 1 "reg_operand" ""))]
"reload_completed" "reload_completed"
[(set (match_dup 2) (float_truncate:QF (match_dup 1))) [(set (match_dup 2) (float_truncate:QF (match_dup 1)))
(set (match_dup 3) (unspec:QI [(match_dup 1)] 9))] (set (match_dup 3) (unspec:QI [(match_dup 1)] UNSPEC_STOREHF_INT))]
"operands[2] = c4x_operand_subword (operands[0], 0, 1, HFmode); "operands[2] = c4x_operand_subword (operands[0], 0, 1, HFmode);
operands[3] = c4x_operand_subword (operands[0], 1, 1, HFmode); operands[3] = c4x_operand_subword (operands[0], 1, 1, HFmode);
PUT_MODE (operands[2], QFmode); PUT_MODE (operands[2], QFmode);
...@@ -5932,7 +5939,7 @@ ...@@ -5932,7 +5939,7 @@
(define_insn "*loadhf_int" (define_insn "*loadhf_int"
[(set (match_operand:HF 0 "reg_operand" "+h") [(set (match_operand:HF 0 "reg_operand" "+h")
(unspec:HF [(subreg:QI (match_dup 0) 0) (unspec:HF [(subreg:QI (match_dup 0) 0)
(match_operand:QI 1 "src_operand" "rIm")] 8))] (match_operand:QI 1 "src_operand" "rIm")] UNSPEC_LOADHF_INT))]
"" ""
"ldiu\\t%1,%0" "ldiu\\t%1,%0"
[(set_attr "type" "unary")]) [(set_attr "type" "unary")])
...@@ -5946,7 +5953,7 @@ ...@@ -5946,7 +5953,7 @@
(define_insn "*storehf_int" (define_insn "*storehf_int"
[(set (match_operand:QI 0 "memory_operand" "=m") [(set (match_operand:QI 0 "memory_operand" "=m")
(unspec:QI [(match_operand:HF 1 "reg_operand" "h")] 9))] (unspec:QI [(match_operand:HF 1 "reg_operand" "h")] UNSPEC_STOREHF_INT))]
"" ""
"sti\\t%1,%0" "sti\\t%1,%0"
[(set_attr "type" "store")]) [(set_attr "type" "store")])
...@@ -5983,7 +5990,7 @@ ...@@ -5983,7 +5990,7 @@
[(set (mem:QF (pre_inc:QI (reg:QI 20))) [(set (mem:QF (pre_inc:QI (reg:QI 20)))
(float_truncate:QF (match_dup 0))) (float_truncate:QF (match_dup 0)))
(set (mem:QI (pre_inc:QI (reg:QI 20))) (set (mem:QI (pre_inc:QI (reg:QI 20)))
(unspec:QI [(match_dup 0)] 9))] (unspec:QI [(match_dup 0)] UNSPEC_STOREHF_INT))]
"") "")
(define_insn "pushhf_trunc" (define_insn "pushhf_trunc"
...@@ -5995,7 +6002,7 @@ ...@@ -5995,7 +6002,7 @@
(define_insn "pushhf_int" (define_insn "pushhf_int"
[(set (mem:QI (pre_inc:QI (reg:QI 20))) [(set (mem:QI (pre_inc:QI (reg:QI 20)))
(unspec:QI [(match_operand:HF 0 "reg_operand" "h")] 9))] (unspec:QI [(match_operand:HF 0 "reg_operand" "h")] UNSPEC_STOREHF_INT))]
"" ""
"push\\t%0" "push\\t%0"
[(set_attr "type" "push")]) [(set_attr "type" "push")])
...@@ -6019,14 +6026,14 @@ ...@@ -6019,14 +6026,14 @@
(clobber (reg:CC 21))]) (clobber (reg:CC 21))])
(parallel [(set (match_dup 0) (parallel [(set (match_dup 0)
(unspec:HF [(subreg:QI (match_dup 0) 0) (unspec:HF [(subreg:QI (match_dup 0) 0)
(mem:QI (post_dec:QI (reg:QI 20)))] 8)) (mem:QI (post_dec:QI (reg:QI 20)))] UNSPEC_LOADHF_INT))
(clobber (reg:CC 21))])] (clobber (reg:CC 21))])]
"") "")
(define_insn "*pophf_int" (define_insn "*pophf_int"
[(set (match_operand:HF 0 "reg_operand" "+h") [(set (match_operand:HF 0 "reg_operand" "+h")
(unspec:HF [(subreg:QI (match_dup 0) 0) (unspec:HF [(subreg:QI (match_dup 0) 0)
(mem:QI (post_dec:QI (reg:QI 20)))] 8)) (mem:QI (post_dec:QI (reg:QI 20)))] UNSPEC_LOADHF_INT))
(clobber (reg:CC 21))] (clobber (reg:CC 21))]
"" ""
"pop\\t%0" "pop\\t%0"
...@@ -6131,7 +6138,7 @@ ...@@ -6131,7 +6138,7 @@
; ;
(define_insn "*rcpfhf_clobber" (define_insn "*rcpfhf_clobber"
[(set (match_operand:HF 0 "reg_operand" "=h") [(set (match_operand:HF 0 "reg_operand" "=h")
(unspec:HF [(match_operand:HF 1 "reg_or_const_operand" "hH")] 5)) (unspec:HF [(match_operand:HF 1 "reg_or_const_operand" "hH")] UNSPEC_RCPF))
(clobber (reg:CC_NOOV 21))] (clobber (reg:CC_NOOV 21))]
"! TARGET_C3X" "! TARGET_C3X"
"rcpf\\t%1,%0" "rcpf\\t%1,%0"
...@@ -6142,7 +6149,7 @@ ...@@ -6142,7 +6149,7 @@
; ;
(define_insn "*rsqrfhf_clobber" (define_insn "*rsqrfhf_clobber"
[(set (match_operand:HF 0 "reg_operand" "=h") [(set (match_operand:HF 0 "reg_operand" "=h")
(unspec:HF [(match_operand:HF 1 "reg_or_const_operand" "hH")] 10)) (unspec:HF [(match_operand:HF 1 "reg_or_const_operand" "hH")] UNSPEC_RSQRF))
(clobber (reg:CC_NOOV 21))] (clobber (reg:CC_NOOV 21))]
"! TARGET_C3X" "! TARGET_C3X"
"rsqrf\\t%1,%0" "rsqrf\\t%1,%0"
...@@ -6153,7 +6160,7 @@ ...@@ -6153,7 +6160,7 @@
; ;
(define_insn "*rndhf_clobber" (define_insn "*rndhf_clobber"
[(set (match_operand:HF 0 "reg_operand" "=h") [(set (match_operand:HF 0 "reg_operand" "=h")
(unspec:HF [(match_operand:HF 1 "reg_or_const_operand" "hH")] 6)) (unspec:HF [(match_operand:HF 1 "reg_or_const_operand" "hH")] UNSPEC_RND))
(clobber (reg:CC_NOOV 21))] (clobber (reg:CC_NOOV 21))]
"! TARGET_C3X" "! TARGET_C3X"
"rnd\\t%1,%0" "rnd\\t%1,%0"
...@@ -6163,7 +6170,7 @@ ...@@ -6163,7 +6170,7 @@
; Inlined float square root for C4x ; Inlined float square root for C4x
(define_expand "sqrthf2_inline" (define_expand "sqrthf2_inline"
[(parallel [(set (match_dup 2) [(parallel [(set (match_dup 2)
(unspec:HF [(match_operand:HF 1 "reg_operand" "")] 10)) (unspec:HF [(match_operand:HF 1 "reg_operand" "")] UNSPEC_RSQRF))
(clobber (reg:CC_NOOV 21))]) (clobber (reg:CC_NOOV 21))])
(parallel [(set (match_dup 3) (mult:HF (match_dup 5) (match_dup 1))) (parallel [(set (match_dup 3) (mult:HF (match_dup 5) (match_dup 1)))
(clobber (reg:CC_NOOV 21))]) (clobber (reg:CC_NOOV 21))])
...@@ -6310,7 +6317,7 @@ ...@@ -6310,7 +6317,7 @@
; Inlined float divide for C4x ; Inlined float divide for C4x
(define_expand "divhf3_inline" (define_expand "divhf3_inline"
[(parallel [(set (match_dup 3) [(parallel [(set (match_dup 3)
(unspec:HF [(match_operand:HF 2 "reg_operand" "")] 5)) (unspec:HF [(match_operand:HF 2 "reg_operand" "")] UNSPEC_RCPF))
(clobber (reg:CC_NOOV 21))]) (clobber (reg:CC_NOOV 21))])
(parallel [(set (match_dup 4) (mult:HF (match_dup 2) (match_dup 3))) (parallel [(set (match_dup 4) (mult:HF (match_dup 2) (match_dup 3)))
(clobber (reg:CC_NOOV 21))]) (clobber (reg:CC_NOOV 21))])
...@@ -6886,7 +6893,7 @@ ...@@ -6886,7 +6893,7 @@
/* If the shift count is greater than 32 this will do an arithmetic /* If the shift count is greater than 32 this will do an arithmetic
right shift. However, we need a logical right shift. */ right shift. However, we need a logical right shift. */
(parallel [(set (match_dup 9) (parallel [(set (match_dup 9)
(ashift:QI (match_dup 4) (unspec:QI [(match_dup 10)] 3))) (ashift:QI (match_dup 4) (unspec:QI [(match_dup 10)] UNSPEC_LSH)))
(clobber (reg:CC 21))]) (clobber (reg:CC 21))])
(set (match_dup 6) (match_dup 8)) (set (match_dup 6) (match_dup 8))
(parallel [(set (match_dup 5) (parallel [(set (match_dup 5)
...@@ -7010,7 +7017,7 @@ ...@@ -7010,7 +7017,7 @@
"! reload_completed" "! reload_completed"
[(parallel [(set (reg:CC 21) [(parallel [(set (reg:CC 21)
(unspec:CC [(compare:CC (match_dup 0) (unspec:CC [(compare:CC (match_dup 0)
(match_dup 1))] 4)) (match_dup 1))] UNSPEC_CMPHI))
(clobber (match_scratch:QI 2 "")) (clobber (match_scratch:QI 2 ""))
(clobber (match_scratch:QI 3 ""))])] (clobber (match_scratch:QI 3 ""))])]
"") "")
...@@ -7022,7 +7029,7 @@ ...@@ -7022,7 +7029,7 @@
"! reload_completed" "! reload_completed"
[(parallel [(set (reg:CC_NOOV 21) [(parallel [(set (reg:CC_NOOV 21)
(unspec:CC_NOOV [(compare:CC_NOOV (match_dup 0) (unspec:CC_NOOV [(compare:CC_NOOV (match_dup 0)
(match_dup 1))] 4)) (match_dup 1))] UNSPEC_CMPHI))
(clobber (match_scratch:QI 2 "")) (clobber (match_scratch:QI 2 ""))
(clobber (match_scratch:QI 3 ""))])] (clobber (match_scratch:QI 3 ""))])]
"") "")
...@@ -7154,7 +7161,7 @@ ...@@ -7154,7 +7161,7 @@
(define_insn "cmphi_cc" (define_insn "cmphi_cc"
[(set (reg:CC 21) [(set (reg:CC 21)
(unspec:CC [(compare:CC (match_operand:HI 0 "src_operand" "rR,rS<>") (unspec:CC [(compare:CC (match_operand:HI 0 "src_operand" "rR,rS<>")
(match_operand:HI 1 "src_operand" "R,rS<>"))] 4)) (match_operand:HI 1 "src_operand" "R,rS<>"))] UNSPEC_CMPHI))
(clobber (match_scratch:QI 2 "=&d,&d")) (clobber (match_scratch:QI 2 "=&d,&d"))
(clobber (match_scratch:QI 3 "=&c,&c"))] (clobber (match_scratch:QI 3 "=&c,&c"))]
"valid_operands (COMPARE, operands, HImode)" "valid_operands (COMPARE, operands, HImode)"
...@@ -7170,7 +7177,7 @@ ...@@ -7170,7 +7177,7 @@
(define_insn "cmphi_cc_noov" (define_insn "cmphi_cc_noov"
[(set (reg:CC_NOOV 21) [(set (reg:CC_NOOV 21)
(unspec:CC_NOOV [(compare:CC_NOOV (match_operand:HI 0 "src_operand" "rR,rS<>") (unspec:CC_NOOV [(compare:CC_NOOV (match_operand:HI 0 "src_operand" "rR,rS<>")
(match_operand:HI 1 "src_operand" "R,rS<>"))] 4)) (match_operand:HI 1 "src_operand" "R,rS<>"))] UNSPEC_CMPHI))
(clobber (match_scratch:QI 2 "=&d,&d")) (clobber (match_scratch:QI 2 "=&d,&d"))
(clobber (match_scratch:QI 3 "=&c,&c"))] (clobber (match_scratch:QI 3 "=&c,&c"))]
"valid_operands (COMPARE, operands, HImode)" "valid_operands (COMPARE, operands, HImode)"
......
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