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riscv-gcc-1
Commit 1d7254c5 by Kazu Hirata Committed by Jeff Law
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* reload1.c: Fix formatting. 

From-SVN: r35574
parent 0499c2e4
Showing with 34 additions and 32 deletions
gcc/ChangeLog
2000-08-08 Kazu Hirata <kazu@hxi.com>
* reload1.c: Fix formatting.
2000-08-08 Rodney Brown <RodneyBrown@mynd.com>
* alpha/alpha.c (alpha_emit_xfloating_libcall):
......
gcc/reload1.c
......@@ -19,7 +19,6 @@ along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "config.h"
#include "system.h"
......@@ -81,7 +80,6 @@ Boston, MA 02111-1307, USA. */
fixing up each insn, and generating the new insns to copy values
into the reload registers. */
#ifndef REGISTER_MOVE_COST
#define REGISTER_MOVE_COST(x, y) 2
#endif
......@@ -325,7 +323,7 @@ struct elim_table
rtx to_rtx; /* REG rtx for the replacement. */
};
static struct elim_table * reg_eliminate = 0;
static struct elim_table *reg_eliminate = 0;
/* This is an intermediate structure to initialize the table. It has
exactly the members provided by ELIMINABLE_REGS. */
......@@ -1449,7 +1447,7 @@ reload_reg_class_lower (r1p, r2p)
const PTR r1p;
const PTR r2p;
{
register int r1 = *(const short *)r1p, r2 = *(const short *)r2p;
register int r1 = *(const short *) r1p, r2 = *(const short *) r2p;
register int t;
/* Consider required reloads before optional ones. */
......@@ -3042,7 +3040,7 @@ eliminate_regs_in_insn (insn, replace)
for (i = 0; i < recog_data.n_dups; i++)
*recog_data.dup_loc[i]
= *recog_data.operand_loc[(int)recog_data.dup_num[i]];
= *recog_data.operand_loc[(int) recog_data.dup_num[i]];
/* If any eliminable remain, they aren't eliminable anymore. */
check_eliminable_occurrences (old_body);
......@@ -3052,7 +3050,7 @@ eliminate_regs_in_insn (insn, replace)
for (i = 0; i < recog_data.n_operands; i++)
*recog_data.operand_loc[i] = substed_operand[i];
for (i = 0; i < recog_data.n_dups; i++)
*recog_data.dup_loc[i] = substed_operand[(int)recog_data.dup_num[i]];
*recog_data.dup_loc[i] = substed_operand[(int) recog_data.dup_num[i]];
/* If we are replacing a body that was a (set X (plus Y Z)), try to
re-recognize the insn. We do this in case we had a simple addition
......@@ -3061,7 +3059,7 @@ eliminate_regs_in_insn (insn, replace)
If re-recognition fails, the old insn code number will still be used,
and some register operands may have changed into PLUS expressions.
These will be handled by find_reloads by loading them into a register
again.*/
again. */
if (val)
{
......@@ -3116,7 +3114,7 @@ eliminate_regs_in_insn (insn, replace)
for (i = 0; i < recog_data.n_operands; i++)
*recog_data.operand_loc[i] = orig_operand[i];
for (i = 0; i < recog_data.n_dups; i++)
*recog_data.dup_loc[i] = orig_operand[(int)recog_data.dup_num[i]];
*recog_data.dup_loc[i] = orig_operand[(int) recog_data.dup_num[i]];
}
/* Update all elimination pairs to reflect the status after the current
......@@ -3404,7 +3402,7 @@ init_elim_table ()
if (!reg_eliminate)
reg_eliminate = (struct elim_table *)
xcalloc(sizeof(struct elim_table), NUM_ELIMINABLE_REGS);
xcalloc (sizeof (struct elim_table), NUM_ELIMINABLE_REGS);
/* Does this function require a frame pointer? */
......@@ -3703,7 +3701,7 @@ scan_paradoxical_subregs (x)
else if (fmt[i] == 'E')
{
register int j;
for (j = XVECLEN (x, i) - 1; j >=0; j--)
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
scan_paradoxical_subregs (XVECEXP (x, i, j));
}
}
......@@ -5176,7 +5174,7 @@ choose_reload_regs (chain)
{
max_group_size = MAX (rld[j].nregs, max_group_size);
group_class
= reg_class_superunion[(int)rld[j].class][(int)group_class];
= reg_class_superunion[(int) rld[j].class][(int)group_class];
}
save_reload_reg_rtx[j] = rld[j].reg_rtx;
......@@ -5368,8 +5366,7 @@ choose_reload_regs (chain)
{
/* If a group is needed, verify that all the subsequent
registers still have their values intact. */
int nr
= HARD_REGNO_NREGS (i, rld[r].mode);
int nr = HARD_REGNO_NREGS (i, rld[r].mode);
int k;
for (k = 1; k < nr; k++)
......@@ -5406,7 +5403,8 @@ choose_reload_regs (chain)
&& rld[r].out
&& ! TEST_HARD_REG_BIT (reg_reloaded_dead, i))
/* Don't clobber the frame pointer. */
|| (i == HARD_FRAME_POINTER_REGNUM && rld[r].out)
|| (i == HARD_FRAME_POINTER_REGNUM
&& rld[r].out)
/* Don't really use the inherited spill reg
if we need it wider than we've got it. */
|| (GET_MODE_SIZE (rld[r].mode)
......@@ -5589,8 +5587,9 @@ choose_reload_regs (chain)
if (rld[r].reg_rtx != 0 || rld[r].optional != 0)
continue;
#if 0 /* No longer needed for correct operation. Might or might not
give better code on the average. Want to experiment? */
#if 0
/* No longer needed for correct operation. Might or might
not give better code on the average. Want to experiment? */
/* See if there is a later reload that has a class different from our
class that intersects our class or that requires less register
......@@ -5921,7 +5920,6 @@ merge_assigned_reloads (insn)
}
}
/* These arrays are filled by emit_reload_insns and its subroutines. */
static rtx input_reload_insns[MAX_RECOG_OPERANDS];
static rtx other_input_address_reload_insns = 0;
......@@ -6593,9 +6591,10 @@ emit_output_reload_insns (chain, rl, j)
register, the secondary reload does the actual
store. */
if (s >= 0 && set == NULL_RTX)
; /* We can't tell what function the secondary reload
/* We can't tell what function the secondary reload
has and where the actual store to the pseudo is
made; leave new_spill_reg_store alone. */
;
else if (s >= 0
&& SET_SRC (set) == rl->reg_rtx
&& SET_DEST (set) == rld[s].reg_rtx)
......@@ -6666,8 +6665,7 @@ do_input_reload (chain, rl, j)
{
expect_occurrences
= count_occurrences (PATTERN (insn), rl->in, 0) == 1 ? 0 : -1;
rl->in
= regno_reg_rtx[reg_reloaded_contents[reload_spill_index[j]]];
rl->in = regno_reg_rtx[reg_reloaded_contents[reload_spill_index[j]]];
}
/* If we are reloading a register that was recently stored in with an
......@@ -6909,8 +6907,7 @@ emit_reload_insns (chain)
if (i >= 0 && rld[r].reg_rtx != 0)
{
int nr
= HARD_REGNO_NREGS (i, GET_MODE (rld[r].reg_rtx));
int nr = HARD_REGNO_NREGS (i, GET_MODE (rld[r].reg_rtx));
int k;
int part_reaches_end = 0;
int all_reaches_end = 1;
......@@ -7136,7 +7133,7 @@ emit_reload_insns (chain)
}
else
{
int num_regs = HARD_REGNO_NREGS (nregno,GET_MODE (rld[r].out));
int num_regs = HARD_REGNO_NREGS (nregno, GET_MODE (rld[r].out));
while (num_regs-- > 0)
reg_last_reload_reg[nregno + num_regs] = 0;
......@@ -7569,7 +7566,7 @@ delete_address_reloads (dead_insn, current_insn)
|| ! rtx_equal_p (dst, XEXP (SET_SRC (set), 0))
|| ! rtx_equal_p (dst, XEXP (SET_SRC (set2), 0))
|| (INTVAL (XEXP (SET_SRC (set), 1))
!= - INTVAL (XEXP (SET_SRC (set2), 1))))
!= -INTVAL (XEXP (SET_SRC (set2), 1))))
return;
delete_insn (prev);
delete_insn (next);
......@@ -7586,14 +7583,14 @@ delete_address_reloads_1 (dead_insn, x, current_insn)
if (code != REG)
{
const char *fmt= GET_RTX_FORMAT (code);
const char *fmt = GET_RTX_FORMAT (code);
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
if (fmt[i] == 'e')
delete_address_reloads_1 (dead_insn, XEXP (x, i), current_insn);
else if (fmt[i] == 'E')
{
for (j = XVECLEN (x, i) - 1; j >=0; j--)
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
delete_address_reloads_1 (dead_insn, XVECEXP (x, i, j),
current_insn);
}
......@@ -7723,7 +7720,7 @@ inc_for_reload (reloadreg, in, value, inc_amount)
reg_last_reload_reg[REGNO (incloc)] = 0;
if (GET_CODE (value) == PRE_DEC || GET_CODE (value) == POST_DEC)
inc_amount = - inc_amount;
inc_amount = -inc_amount;
inc = GEN_INT (inc_amount);
......@@ -8075,7 +8072,7 @@ static int
reload_cse_simplify_operands (insn)
rtx insn;
{
int i,j;
int i, j;
/* For each operand, all registers that are equivalent to it. */
HARD_REG_SET equiv_regs[MAX_RECOG_OPERANDS];
......@@ -8542,7 +8539,7 @@ reload_combine ()
if (reg_state[regno].offset != const0_rtx)
/* Previous REG_EQUIV / REG_EQUAL notes for PREV
are now invalid. */
for (np = &REG_NOTES (prev); *np; )
for (np = &REG_NOTES (prev); *np;)
{
if (REG_NOTE_KIND (*np) == REG_EQUAL
|| REG_NOTE_KIND (*np) == REG_EQUIV)
......@@ -8716,7 +8713,8 @@ reload_combine_note_use (xp, insn)
case PLUS:
/* We are interested in (plus (reg) (const_int)) . */
if (GET_CODE (XEXP (x, 0)) != REG || GET_CODE (XEXP (x, 1)) != CONST_INT)
if (GET_CODE (XEXP (x, 0)) != REG
|| GET_CODE (XEXP (x, 1)) != CONST_INT)
break;
offset = XEXP (x, 1);
x = XEXP (x, 0);
......@@ -8845,7 +8843,7 @@ reload_cse_move2add (first)
rtx insn;
int last_label_luid;
for (i = FIRST_PSEUDO_REGISTER-1; i >= 0; i--)
for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
reg_set_luid[i] = 0;
last_label_luid = 0;
......@@ -8994,7 +8992,7 @@ reload_cse_move2add (first)
unknown values. */
if (GET_CODE (insn) == CALL_INSN)
{
for (i = FIRST_PSEUDO_REGISTER-1; i >= 0; i--)
for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
{
if (call_used_regs[i])
{
......
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