Commit 1d7254c5 by Kazu Hirata Committed by Jeff Law

* reload1.c: Fix formatting.

From-SVN: r35574
parent 0499c2e4
2000-08-08 Kazu Hirata <kazu@hxi.com>
* reload1.c: Fix formatting.
2000-08-08 Rodney Brown <RodneyBrown@mynd.com> 2000-08-08 Rodney Brown <RodneyBrown@mynd.com>
* alpha/alpha.c (alpha_emit_xfloating_libcall): * alpha/alpha.c (alpha_emit_xfloating_libcall):
......
...@@ -19,7 +19,6 @@ along with GNU CC; see the file COPYING. If not, write to ...@@ -19,7 +19,6 @@ along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330, the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */ Boston, MA 02111-1307, USA. */
#include "config.h" #include "config.h"
#include "system.h" #include "system.h"
...@@ -81,7 +80,6 @@ Boston, MA 02111-1307, USA. */ ...@@ -81,7 +80,6 @@ Boston, MA 02111-1307, USA. */
fixing up each insn, and generating the new insns to copy values fixing up each insn, and generating the new insns to copy values
into the reload registers. */ into the reload registers. */
#ifndef REGISTER_MOVE_COST #ifndef REGISTER_MOVE_COST
#define REGISTER_MOVE_COST(x, y) 2 #define REGISTER_MOVE_COST(x, y) 2
#endif #endif
...@@ -325,10 +323,10 @@ struct elim_table ...@@ -325,10 +323,10 @@ struct elim_table
rtx to_rtx; /* REG rtx for the replacement. */ rtx to_rtx; /* REG rtx for the replacement. */
}; };
static struct elim_table * reg_eliminate = 0; static struct elim_table *reg_eliminate = 0;
/* This is an intermediate structure to initialize the table. It has /* This is an intermediate structure to initialize the table. It has
exactly the members provided by ELIMINABLE_REGS. */ exactly the members provided by ELIMINABLE_REGS. */
static struct elim_table_1 static struct elim_table_1
{ {
int from; int from;
...@@ -1449,7 +1447,7 @@ reload_reg_class_lower (r1p, r2p) ...@@ -1449,7 +1447,7 @@ reload_reg_class_lower (r1p, r2p)
const PTR r1p; const PTR r1p;
const PTR r2p; const PTR r2p;
{ {
register int r1 = *(const short *)r1p, r2 = *(const short *)r2p; register int r1 = *(const short *) r1p, r2 = *(const short *) r2p;
register int t; register int t;
/* Consider required reloads before optional ones. */ /* Consider required reloads before optional ones. */
...@@ -1504,7 +1502,7 @@ count_pseudo (reg) ...@@ -1504,7 +1502,7 @@ count_pseudo (reg)
if (r < 0) if (r < 0)
abort (); abort ();
spill_add_cost[r] += n_refs; spill_add_cost[r] += n_refs;
nregs = HARD_REGNO_NREGS (r, PSEUDO_REGNO_MODE (reg)); nregs = HARD_REGNO_NREGS (r, PSEUDO_REGNO_MODE (reg));
...@@ -2782,7 +2780,7 @@ check_eliminable_occurrences (x) ...@@ -2782,7 +2780,7 @@ check_eliminable_occurrences (x)
if (x == 0) if (x == 0)
return; return;
code = GET_CODE (x); code = GET_CODE (x);
if (code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER) if (code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
...@@ -2794,7 +2792,7 @@ check_eliminable_occurrences (x) ...@@ -2794,7 +2792,7 @@ check_eliminable_occurrences (x)
ep->can_eliminate = 0; ep->can_eliminate = 0;
return; return;
} }
fmt = GET_RTX_FORMAT (code); fmt = GET_RTX_FORMAT (code);
for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++) for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
{ {
...@@ -2933,7 +2931,7 @@ eliminate_regs_in_insn (insn, replace) ...@@ -2933,7 +2931,7 @@ eliminate_regs_in_insn (insn, replace)
process it since it won't be used unless something changes. */ process it since it won't be used unless something changes. */
if (replace) if (replace)
{ {
delete_dead_insn (insn); delete_dead_insn (insn);
return 1; return 1;
} }
val = 1; val = 1;
...@@ -3042,7 +3040,7 @@ eliminate_regs_in_insn (insn, replace) ...@@ -3042,7 +3040,7 @@ eliminate_regs_in_insn (insn, replace)
for (i = 0; i < recog_data.n_dups; i++) for (i = 0; i < recog_data.n_dups; i++)
*recog_data.dup_loc[i] *recog_data.dup_loc[i]
= *recog_data.operand_loc[(int)recog_data.dup_num[i]]; = *recog_data.operand_loc[(int) recog_data.dup_num[i]];
/* If any eliminable remain, they aren't eliminable anymore. */ /* If any eliminable remain, they aren't eliminable anymore. */
check_eliminable_occurrences (old_body); check_eliminable_occurrences (old_body);
...@@ -3052,7 +3050,7 @@ eliminate_regs_in_insn (insn, replace) ...@@ -3052,7 +3050,7 @@ eliminate_regs_in_insn (insn, replace)
for (i = 0; i < recog_data.n_operands; i++) for (i = 0; i < recog_data.n_operands; i++)
*recog_data.operand_loc[i] = substed_operand[i]; *recog_data.operand_loc[i] = substed_operand[i];
for (i = 0; i < recog_data.n_dups; i++) for (i = 0; i < recog_data.n_dups; i++)
*recog_data.dup_loc[i] = substed_operand[(int)recog_data.dup_num[i]]; *recog_data.dup_loc[i] = substed_operand[(int) recog_data.dup_num[i]];
/* If we are replacing a body that was a (set X (plus Y Z)), try to /* If we are replacing a body that was a (set X (plus Y Z)), try to
re-recognize the insn. We do this in case we had a simple addition re-recognize the insn. We do this in case we had a simple addition
...@@ -3061,7 +3059,7 @@ eliminate_regs_in_insn (insn, replace) ...@@ -3061,7 +3059,7 @@ eliminate_regs_in_insn (insn, replace)
If re-recognition fails, the old insn code number will still be used, If re-recognition fails, the old insn code number will still be used,
and some register operands may have changed into PLUS expressions. and some register operands may have changed into PLUS expressions.
These will be handled by find_reloads by loading them into a register These will be handled by find_reloads by loading them into a register
again.*/ again. */
if (val) if (val)
{ {
...@@ -3116,7 +3114,7 @@ eliminate_regs_in_insn (insn, replace) ...@@ -3116,7 +3114,7 @@ eliminate_regs_in_insn (insn, replace)
for (i = 0; i < recog_data.n_operands; i++) for (i = 0; i < recog_data.n_operands; i++)
*recog_data.operand_loc[i] = orig_operand[i]; *recog_data.operand_loc[i] = orig_operand[i];
for (i = 0; i < recog_data.n_dups; i++) for (i = 0; i < recog_data.n_dups; i++)
*recog_data.dup_loc[i] = orig_operand[(int)recog_data.dup_num[i]]; *recog_data.dup_loc[i] = orig_operand[(int) recog_data.dup_num[i]];
} }
/* Update all elimination pairs to reflect the status after the current /* Update all elimination pairs to reflect the status after the current
...@@ -3404,7 +3402,7 @@ init_elim_table () ...@@ -3404,7 +3402,7 @@ init_elim_table ()
if (!reg_eliminate) if (!reg_eliminate)
reg_eliminate = (struct elim_table *) reg_eliminate = (struct elim_table *)
xcalloc(sizeof(struct elim_table), NUM_ELIMINABLE_REGS); xcalloc (sizeof (struct elim_table), NUM_ELIMINABLE_REGS);
/* Does this function require a frame pointer? */ /* Does this function require a frame pointer? */
...@@ -3703,7 +3701,7 @@ scan_paradoxical_subregs (x) ...@@ -3703,7 +3701,7 @@ scan_paradoxical_subregs (x)
else if (fmt[i] == 'E') else if (fmt[i] == 'E')
{ {
register int j; register int j;
for (j = XVECLEN (x, i) - 1; j >=0; j--) for (j = XVECLEN (x, i) - 1; j >= 0; j--)
scan_paradoxical_subregs (XVECEXP (x, i, j)); scan_paradoxical_subregs (XVECEXP (x, i, j));
} }
} }
...@@ -3940,7 +3938,7 @@ reload_as_needed (live_known) ...@@ -3940,7 +3938,7 @@ reload_as_needed (live_known)
reg_has_output_reload[REGNO (XEXP (in_reg, 0))] = 1; reg_has_output_reload[REGNO (XEXP (in_reg, 0))] = 1;
} }
else else
forget_old_reloads_1 (XEXP (in_reg, 0), NULL_RTX, forget_old_reloads_1 (XEXP (in_reg, 0), NULL_RTX,
NULL); NULL);
} }
else if ((code == PRE_INC || code == PRE_DEC) else if ((code == PRE_INC || code == PRE_DEC)
...@@ -4847,7 +4845,7 @@ reload_reg_free_for_value_p (regno, opnum, type, value, out, reloadnum, ...@@ -4847,7 +4845,7 @@ reload_reg_free_for_value_p (regno, opnum, type, value, out, reloadnum,
/* Earlyclobbered outputs must conflict with inputs. */ /* Earlyclobbered outputs must conflict with inputs. */
if (earlyclobber_operand_p (rld[i].out)) if (earlyclobber_operand_p (rld[i].out))
time2 = MAX_RECOG_OPERANDS * 4 + 3; time2 = MAX_RECOG_OPERANDS * 4 + 3;
break; break;
} }
time2 = 1; time2 = 1;
...@@ -5070,7 +5068,7 @@ allocate_reload_reg (chain, r, last_reload) ...@@ -5070,7 +5068,7 @@ allocate_reload_reg (chain, r, last_reload)
if (count < n_spills) if (count < n_spills)
break; break;
} }
/* We should have found a spill register by now. */ /* We should have found a spill register by now. */
if (count >= n_spills) if (count >= n_spills)
return 0; return 0;
...@@ -5176,7 +5174,7 @@ choose_reload_regs (chain) ...@@ -5176,7 +5174,7 @@ choose_reload_regs (chain)
{ {
max_group_size = MAX (rld[j].nregs, max_group_size); max_group_size = MAX (rld[j].nregs, max_group_size);
group_class group_class
= reg_class_superunion[(int)rld[j].class][(int)group_class]; = reg_class_superunion[(int) rld[j].class][(int)group_class];
} }
save_reload_reg_rtx[j] = rld[j].reg_rtx; save_reload_reg_rtx[j] = rld[j].reg_rtx;
...@@ -5329,7 +5327,7 @@ choose_reload_regs (chain) ...@@ -5329,7 +5327,7 @@ choose_reload_regs (chain)
#ifdef CLASS_CANNOT_CHANGE_MODE #ifdef CLASS_CANNOT_CHANGE_MODE
(TEST_HARD_REG_BIT (TEST_HARD_REG_BIT
(reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE], i) (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE], i)
? ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (last_reg), ? ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (last_reg),
need_mode) need_mode)
: (GET_MODE_SIZE (GET_MODE (last_reg)) : (GET_MODE_SIZE (GET_MODE (last_reg))
>= GET_MODE_SIZE (need_mode))) >= GET_MODE_SIZE (need_mode)))
...@@ -5368,8 +5366,7 @@ choose_reload_regs (chain) ...@@ -5368,8 +5366,7 @@ choose_reload_regs (chain)
{ {
/* If a group is needed, verify that all the subsequent /* If a group is needed, verify that all the subsequent
registers still have their values intact. */ registers still have their values intact. */
int nr int nr = HARD_REGNO_NREGS (i, rld[r].mode);
= HARD_REGNO_NREGS (i, rld[r].mode);
int k; int k;
for (k = 1; k < nr; k++) for (k = 1; k < nr; k++)
...@@ -5406,7 +5403,8 @@ choose_reload_regs (chain) ...@@ -5406,7 +5403,8 @@ choose_reload_regs (chain)
&& rld[r].out && rld[r].out
&& ! TEST_HARD_REG_BIT (reg_reloaded_dead, i)) && ! TEST_HARD_REG_BIT (reg_reloaded_dead, i))
/* Don't clobber the frame pointer. */ /* Don't clobber the frame pointer. */
|| (i == HARD_FRAME_POINTER_REGNUM && rld[r].out) || (i == HARD_FRAME_POINTER_REGNUM
&& rld[r].out)
/* Don't really use the inherited spill reg /* Don't really use the inherited spill reg
if we need it wider than we've got it. */ if we need it wider than we've got it. */
|| (GET_MODE_SIZE (rld[r].mode) || (GET_MODE_SIZE (rld[r].mode)
...@@ -5545,7 +5543,7 @@ choose_reload_regs (chain) ...@@ -5545,7 +5543,7 @@ choose_reload_regs (chain)
case RELOAD_FOR_INPUT: case RELOAD_FOR_INPUT:
case RELOAD_FOR_OPERAND_ADDRESS: case RELOAD_FOR_OPERAND_ADDRESS:
reload_override_in[r] = equiv; reload_override_in[r] = equiv;
/* Fall through. */ /* Fall through. */
default: default:
equiv = 0; equiv = 0;
break; break;
...@@ -5589,8 +5587,9 @@ choose_reload_regs (chain) ...@@ -5589,8 +5587,9 @@ choose_reload_regs (chain)
if (rld[r].reg_rtx != 0 || rld[r].optional != 0) if (rld[r].reg_rtx != 0 || rld[r].optional != 0)
continue; continue;
#if 0 /* No longer needed for correct operation. Might or might not #if 0
give better code on the average. Want to experiment? */ /* No longer needed for correct operation. Might or might
not give better code on the average. Want to experiment? */
/* See if there is a later reload that has a class different from our /* See if there is a later reload that has a class different from our
class that intersects our class or that requires less register class that intersects our class or that requires less register
...@@ -5920,7 +5919,6 @@ merge_assigned_reloads (insn) ...@@ -5920,7 +5919,6 @@ merge_assigned_reloads (insn)
} }
} }
} }
/* These arrays are filled by emit_reload_insns and its subroutines. */ /* These arrays are filled by emit_reload_insns and its subroutines. */
static rtx input_reload_insns[MAX_RECOG_OPERANDS]; static rtx input_reload_insns[MAX_RECOG_OPERANDS];
...@@ -6548,7 +6546,7 @@ emit_output_reload_insns (chain, rl, j) ...@@ -6548,7 +6546,7 @@ emit_output_reload_insns (chain, rl, j)
rtx set; rtx set;
/* Don't output the last reload if OLD is not the dest of /* Don't output the last reload if OLD is not the dest of
INSN and is in the src and is clobbered by INSN. */ INSN and is in the src and is clobbered by INSN. */
if (! flag_expensive_optimizations if (! flag_expensive_optimizations
|| GET_CODE (old) != REG || GET_CODE (old) != REG
|| !(set = single_set (insn)) || !(set = single_set (insn))
...@@ -6593,9 +6591,10 @@ emit_output_reload_insns (chain, rl, j) ...@@ -6593,9 +6591,10 @@ emit_output_reload_insns (chain, rl, j)
register, the secondary reload does the actual register, the secondary reload does the actual
store. */ store. */
if (s >= 0 && set == NULL_RTX) if (s >= 0 && set == NULL_RTX)
; /* We can't tell what function the secondary reload /* We can't tell what function the secondary reload
has and where the actual store to the pseudo is has and where the actual store to the pseudo is
made; leave new_spill_reg_store alone. */ made; leave new_spill_reg_store alone. */
;
else if (s >= 0 else if (s >= 0
&& SET_SRC (set) == rl->reg_rtx && SET_SRC (set) == rl->reg_rtx
&& SET_DEST (set) == rld[s].reg_rtx) && SET_DEST (set) == rld[s].reg_rtx)
...@@ -6631,7 +6630,7 @@ emit_output_reload_insns (chain, rl, j) ...@@ -6631,7 +6630,7 @@ emit_output_reload_insns (chain, rl, j)
else else
output_reload_insns[rl->opnum] = get_insns (); output_reload_insns[rl->opnum] = get_insns ();
end_sequence (); end_sequence ();
} }
/* Do input reloading for reload RL, which is for the insn described by CHAIN /* Do input reloading for reload RL, which is for the insn described by CHAIN
...@@ -6666,8 +6665,7 @@ do_input_reload (chain, rl, j) ...@@ -6666,8 +6665,7 @@ do_input_reload (chain, rl, j)
{ {
expect_occurrences expect_occurrences
= count_occurrences (PATTERN (insn), rl->in, 0) == 1 ? 0 : -1; = count_occurrences (PATTERN (insn), rl->in, 0) == 1 ? 0 : -1;
rl->in rl->in = regno_reg_rtx[reg_reloaded_contents[reload_spill_index[j]]];
= regno_reg_rtx[reg_reloaded_contents[reload_spill_index[j]]];
} }
/* If we are reloading a register that was recently stored in with an /* If we are reloading a register that was recently stored in with an
...@@ -6909,8 +6907,7 @@ emit_reload_insns (chain) ...@@ -6909,8 +6907,7 @@ emit_reload_insns (chain)
if (i >= 0 && rld[r].reg_rtx != 0) if (i >= 0 && rld[r].reg_rtx != 0)
{ {
int nr int nr = HARD_REGNO_NREGS (i, GET_MODE (rld[r].reg_rtx));
= HARD_REGNO_NREGS (i, GET_MODE (rld[r].reg_rtx));
int k; int k;
int part_reaches_end = 0; int part_reaches_end = 0;
int all_reaches_end = 1; int all_reaches_end = 1;
...@@ -7136,7 +7133,7 @@ emit_reload_insns (chain) ...@@ -7136,7 +7133,7 @@ emit_reload_insns (chain)
} }
else else
{ {
int num_regs = HARD_REGNO_NREGS (nregno,GET_MODE (rld[r].out)); int num_regs = HARD_REGNO_NREGS (nregno, GET_MODE (rld[r].out));
while (num_regs-- > 0) while (num_regs-- > 0)
reg_last_reload_reg[nregno + num_regs] = 0; reg_last_reload_reg[nregno + num_regs] = 0;
...@@ -7569,7 +7566,7 @@ delete_address_reloads (dead_insn, current_insn) ...@@ -7569,7 +7566,7 @@ delete_address_reloads (dead_insn, current_insn)
|| ! rtx_equal_p (dst, XEXP (SET_SRC (set), 0)) || ! rtx_equal_p (dst, XEXP (SET_SRC (set), 0))
|| ! rtx_equal_p (dst, XEXP (SET_SRC (set2), 0)) || ! rtx_equal_p (dst, XEXP (SET_SRC (set2), 0))
|| (INTVAL (XEXP (SET_SRC (set), 1)) || (INTVAL (XEXP (SET_SRC (set), 1))
!= - INTVAL (XEXP (SET_SRC (set2), 1)))) != -INTVAL (XEXP (SET_SRC (set2), 1))))
return; return;
delete_insn (prev); delete_insn (prev);
delete_insn (next); delete_insn (next);
...@@ -7586,14 +7583,14 @@ delete_address_reloads_1 (dead_insn, x, current_insn) ...@@ -7586,14 +7583,14 @@ delete_address_reloads_1 (dead_insn, x, current_insn)
if (code != REG) if (code != REG)
{ {
const char *fmt= GET_RTX_FORMAT (code); const char *fmt = GET_RTX_FORMAT (code);
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{ {
if (fmt[i] == 'e') if (fmt[i] == 'e')
delete_address_reloads_1 (dead_insn, XEXP (x, i), current_insn); delete_address_reloads_1 (dead_insn, XEXP (x, i), current_insn);
else if (fmt[i] == 'E') else if (fmt[i] == 'E')
{ {
for (j = XVECLEN (x, i) - 1; j >=0; j--) for (j = XVECLEN (x, i) - 1; j >= 0; j--)
delete_address_reloads_1 (dead_insn, XVECEXP (x, i, j), delete_address_reloads_1 (dead_insn, XVECEXP (x, i, j),
current_insn); current_insn);
} }
...@@ -7723,7 +7720,7 @@ inc_for_reload (reloadreg, in, value, inc_amount) ...@@ -7723,7 +7720,7 @@ inc_for_reload (reloadreg, in, value, inc_amount)
reg_last_reload_reg[REGNO (incloc)] = 0; reg_last_reload_reg[REGNO (incloc)] = 0;
if (GET_CODE (value) == PRE_DEC || GET_CODE (value) == POST_DEC) if (GET_CODE (value) == PRE_DEC || GET_CODE (value) == POST_DEC)
inc_amount = - inc_amount; inc_amount = -inc_amount;
inc = GEN_INT (inc_amount); inc = GEN_INT (inc_amount);
...@@ -7965,7 +7962,7 @@ reload_cse_regs_1 (first) ...@@ -7965,7 +7962,7 @@ reload_cse_regs_1 (first)
{ {
rtx insn; rtx insn;
cselib_init (); cselib_init ();
init_alias_analysis (); init_alias_analysis ();
for (insn = first; insn; insn = NEXT_INSN (insn)) for (insn = first; insn; insn = NEXT_INSN (insn))
...@@ -8053,7 +8050,7 @@ reload_cse_simplify_set (set, insn) ...@@ -8053,7 +8050,7 @@ reload_cse_simplify_set (set, insn)
|| (this_cost == old_cost || (this_cost == old_cost
&& GET_CODE (l->loc) == REG && GET_CODE (l->loc) == REG
&& GET_CODE (SET_SRC (set)) != REG)) && GET_CODE (SET_SRC (set)) != REG))
&& validate_change (insn, &SET_SRC (set), copy_rtx (l->loc), 1)) && validate_change (insn, &SET_SRC (set), copy_rtx (l->loc), 1))
old_cost = this_cost, did_change = 1; old_cost = this_cost, did_change = 1;
} }
...@@ -8075,7 +8072,7 @@ static int ...@@ -8075,7 +8072,7 @@ static int
reload_cse_simplify_operands (insn) reload_cse_simplify_operands (insn)
rtx insn; rtx insn;
{ {
int i,j; int i, j;
/* For each operand, all registers that are equivalent to it. */ /* For each operand, all registers that are equivalent to it. */
HARD_REG_SET equiv_regs[MAX_RECOG_OPERANDS]; HARD_REG_SET equiv_regs[MAX_RECOG_OPERANDS];
...@@ -8103,7 +8100,7 @@ reload_cse_simplify_operands (insn) ...@@ -8103,7 +8100,7 @@ reload_cse_simplify_operands (insn)
/* Figure out which alternative currently matches. */ /* Figure out which alternative currently matches. */
if (! constrain_operands (1)) if (! constrain_operands (1))
fatal_insn_not_found (insn); fatal_insn_not_found (insn);
alternative_reject = (int *) alloca (recog_data.n_alternatives * sizeof (int)); alternative_reject = (int *) alloca (recog_data.n_alternatives * sizeof (int));
alternative_nregs = (int *) alloca (recog_data.n_alternatives * sizeof (int)); alternative_nregs = (int *) alloca (recog_data.n_alternatives * sizeof (int));
alternative_order = (int *) alloca (recog_data.n_alternatives * sizeof (int)); alternative_order = (int *) alloca (recog_data.n_alternatives * sizeof (int));
...@@ -8218,7 +8215,7 @@ reload_cse_simplify_operands (insn) ...@@ -8218,7 +8215,7 @@ reload_cse_simplify_operands (insn)
/* See if REGNO fits this alternative, and set it up as the /* See if REGNO fits this alternative, and set it up as the
replacement register if we don't have one for this replacement register if we don't have one for this
alternative yet and the operand being replaced is not alternative yet and the operand being replaced is not
a cheap CONST_INT. */ a cheap CONST_INT. */
if (op_alt_regno[i][j] == -1 if (op_alt_regno[i][j] == -1
&& reg_fits_class_p (reg, class, 0, mode) && reg_fits_class_p (reg, class, 0, mode)
&& (GET_CODE (recog_data.operand[i]) != CONST_INT && (GET_CODE (recog_data.operand[i]) != CONST_INT
...@@ -8542,7 +8539,7 @@ reload_combine () ...@@ -8542,7 +8539,7 @@ reload_combine ()
if (reg_state[regno].offset != const0_rtx) if (reg_state[regno].offset != const0_rtx)
/* Previous REG_EQUIV / REG_EQUAL notes for PREV /* Previous REG_EQUIV / REG_EQUAL notes for PREV
are now invalid. */ are now invalid. */
for (np = &REG_NOTES (prev); *np; ) for (np = &REG_NOTES (prev); *np;)
{ {
if (REG_NOTE_KIND (*np) == REG_EQUAL if (REG_NOTE_KIND (*np) == REG_EQUAL
|| REG_NOTE_KIND (*np) == REG_EQUIV) || REG_NOTE_KIND (*np) == REG_EQUIV)
...@@ -8559,7 +8556,7 @@ reload_combine () ...@@ -8559,7 +8556,7 @@ reload_combine ()
} }
} }
note_stores (PATTERN (insn), reload_combine_note_store, NULL); note_stores (PATTERN (insn), reload_combine_note_store, NULL);
if (GET_CODE (insn) == CALL_INSN) if (GET_CODE (insn) == CALL_INSN)
{ {
...@@ -8716,7 +8713,8 @@ reload_combine_note_use (xp, insn) ...@@ -8716,7 +8713,8 @@ reload_combine_note_use (xp, insn)
case PLUS: case PLUS:
/* We are interested in (plus (reg) (const_int)) . */ /* We are interested in (plus (reg) (const_int)) . */
if (GET_CODE (XEXP (x, 0)) != REG || GET_CODE (XEXP (x, 1)) != CONST_INT) if (GET_CODE (XEXP (x, 0)) != REG
|| GET_CODE (XEXP (x, 1)) != CONST_INT)
break; break;
offset = XEXP (x, 1); offset = XEXP (x, 1);
x = XEXP (x, 0); x = XEXP (x, 0);
...@@ -8845,7 +8843,7 @@ reload_cse_move2add (first) ...@@ -8845,7 +8843,7 @@ reload_cse_move2add (first)
rtx insn; rtx insn;
int last_label_luid; int last_label_luid;
for (i = FIRST_PSEUDO_REGISTER-1; i >= 0; i--) for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
reg_set_luid[i] = 0; reg_set_luid[i] = 0;
last_label_luid = 0; last_label_luid = 0;
...@@ -8994,7 +8992,7 @@ reload_cse_move2add (first) ...@@ -8994,7 +8992,7 @@ reload_cse_move2add (first)
unknown values. */ unknown values. */
if (GET_CODE (insn) == CALL_INSN) if (GET_CODE (insn) == CALL_INSN)
{ {
for (i = FIRST_PSEUDO_REGISTER-1; i >= 0; i--) for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
{ {
if (call_used_regs[i]) if (call_used_regs[i])
{ {
......
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