Commit 1d328b19 by Geoff Keating Committed by Geoffrey Keating

rs6000.md: Correct order of operands for DImode boolean patterns.

* config/rs6000/rs6000.md: Correct order of operands for DImode
boolean patterns.

* config/rs6000/rs6000.c (boolean_or_operator): New function.
* config/rs6000/rs6000-protos.h (boolean_or_operator): Prototype it.
* config/rs6000/rs6000.h (PREDICATE_CODES): Add boolean_or_operator.
* config/rs6000/rs6000.md: Use boolean_or_operator instead of
boolean_operator for the boolean patterns without NOTs.

* config/rs6000/rs6000.c (reg_or_logical_cint_operand): Rename
from reg_or_u_cint_operand.  Change comment and behaviour.
(logical_operand): Clean up, add assertion.
(non_logical_cint_operand): Also check for
reg_or_logical_cint_operand.
* config/rs6000/rs6000.h (PREDICATE_CODES): Update.
* config/rs6000/rs6000.md (iorsi3): Use reg_or_logical_cint_operand
in the expander.
(xorsi3): Likewise.
(iordi3): Likewise.
(xordi3): Likewise.

From-SVN: r34200
parent defd0dea
2000-05-26 Geoffrey Keating <geoffk@cygnus.com>
* config/rs6000/rs6000.md: Correct order of operands for DImode
boolean patterns.
* config/rs6000/rs6000.c (boolean_or_operator): New function.
* config/rs6000/rs6000-protos.h (boolean_or_operator): Prototype it.
* config/rs6000/rs6000.h (PREDICATE_CODES): Add boolean_or_operator.
* config/rs6000/rs6000.md: Use boolean_or_operator instead of
boolean_operator for the boolean patterns without NOTs.
* config/rs6000/rs6000.c (reg_or_logical_cint_operand): Rename
from reg_or_u_cint_operand. Change comment and behaviour.
(logical_operand): Clean up, add assertion.
(non_logical_cint_operand): Also check for
reg_or_logical_cint_operand.
* config/rs6000/rs6000.h (PREDICATE_CODES): Update.
* config/rs6000/rs6000.md (iorsi3): Use reg_or_logical_cint_operand
in the expander.
(xorsi3): Likewise.
(iordi3): Likewise.
(xordi3): Likewise.
2000-05-26 Mark Mitchell <mark@codesourcery.com> 2000-05-26 Mark Mitchell <mark@codesourcery.com>
* tree.h (struct record_layout_info): Rename to (struct * tree.h (struct record_layout_info): Rename to (struct
...@@ -41,7 +41,7 @@ extern int reg_or_short_operand PARAMS ((rtx, enum machine_mode)); ...@@ -41,7 +41,7 @@ extern int reg_or_short_operand PARAMS ((rtx, enum machine_mode));
extern int reg_or_neg_short_operand PARAMS ((rtx, enum machine_mode)); extern int reg_or_neg_short_operand PARAMS ((rtx, enum machine_mode));
extern int reg_or_u_short_operand PARAMS ((rtx, enum machine_mode)); extern int reg_or_u_short_operand PARAMS ((rtx, enum machine_mode));
extern int reg_or_cint_operand PARAMS ((rtx, enum machine_mode)); extern int reg_or_cint_operand PARAMS ((rtx, enum machine_mode));
extern int reg_or_u_cint_operand PARAMS ((rtx, enum machine_mode)); extern int reg_or_logical_cint_operand PARAMS ((rtx, enum machine_mode));
extern int got_operand PARAMS ((rtx, enum machine_mode)); extern int got_operand PARAMS ((rtx, enum machine_mode));
extern int got_no_const_operand PARAMS ((rtx, enum machine_mode)); extern int got_no_const_operand PARAMS ((rtx, enum machine_mode));
extern int num_insns_constant PARAMS ((rtx, enum machine_mode)); extern int num_insns_constant PARAMS ((rtx, enum machine_mode));
...@@ -52,9 +52,7 @@ extern int mem_or_easy_const_operand PARAMS ((rtx, enum machine_mode)); ...@@ -52,9 +52,7 @@ extern int mem_or_easy_const_operand PARAMS ((rtx, enum machine_mode));
extern int add_operand PARAMS ((rtx, enum machine_mode)); extern int add_operand PARAMS ((rtx, enum machine_mode));
extern int non_add_cint_operand PARAMS ((rtx, enum machine_mode)); extern int non_add_cint_operand PARAMS ((rtx, enum machine_mode));
extern int non_logical_cint_operand PARAMS ((rtx, enum machine_mode)); extern int non_logical_cint_operand PARAMS ((rtx, enum machine_mode));
extern int non_logical_u_cint_operand PARAMS ((rtx, enum machine_mode));
extern int logical_operand PARAMS ((rtx, enum machine_mode)); extern int logical_operand PARAMS ((rtx, enum machine_mode));
extern int logical_u_operand PARAMS ((rtx, enum machine_mode));
extern int mask_operand PARAMS ((rtx, enum machine_mode)); extern int mask_operand PARAMS ((rtx, enum machine_mode));
extern int mask64_operand PARAMS ((rtx, enum machine_mode)); extern int mask64_operand PARAMS ((rtx, enum machine_mode));
extern int and64_operand PARAMS ((rtx, enum machine_mode)); extern int and64_operand PARAMS ((rtx, enum machine_mode));
...@@ -76,6 +74,7 @@ extern int branch_comparison_operator PARAMS ((rtx, enum machine_mode)); ...@@ -76,6 +74,7 @@ extern int branch_comparison_operator PARAMS ((rtx, enum machine_mode));
extern int scc_comparison_operator PARAMS ((rtx, enum machine_mode)); extern int scc_comparison_operator PARAMS ((rtx, enum machine_mode));
extern int trap_comparison_operator PARAMS ((rtx, enum machine_mode)); extern int trap_comparison_operator PARAMS ((rtx, enum machine_mode));
extern int boolean_operator PARAMS ((rtx, enum machine_mode)); extern int boolean_operator PARAMS ((rtx, enum machine_mode));
extern int boolean_or_operator PARAMS ((rtx, enum machine_mode));
extern int includes_lshift_p PARAMS ((rtx, rtx)); extern int includes_lshift_p PARAMS ((rtx, rtx));
extern int includes_rshift_p PARAMS ((rtx, rtx)); extern int includes_rshift_p PARAMS ((rtx, rtx));
extern int registers_ok_for_quad_peep PARAMS ((rtx, rtx)); extern int registers_ok_for_quad_peep PARAMS ((rtx, rtx));
......
...@@ -658,21 +658,34 @@ reg_or_cint_operand (op, mode) ...@@ -658,21 +658,34 @@ reg_or_cint_operand (op, mode)
32-bit unsigned constant integer. */ 32-bit unsigned constant integer. */
int int
reg_or_u_cint_operand (op, mode) reg_or_logical_cint_operand (op, mode)
register rtx op; register rtx op;
enum machine_mode mode; enum machine_mode mode;
{ {
return (gpc_reg_operand (op, mode) if (GET_CODE (op) == CONST_INT)
|| (GET_CODE (op) == CONST_INT {
#if HOST_BITS_PER_WIDE_INT != 32 if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
&& INTVAL (op) < ((HOST_WIDE_INT) 1 << 32) {
#endif if (GET_MODE_BITSIZE (mode) <= 32)
&& INTVAL (op) > 0) abort();
#if HOST_BITS_PER_WIDE_INT == 32
|| (GET_CODE (op) == CONST_DOUBLE if (INTVAL (op) < 0)
&& CONST_DOUBLE_HIGH (op) == 0) return 0;
#endif }
);
return ((INTVAL (op) & GET_MODE_MASK (mode)
& (~ (unsigned HOST_WIDE_INT) 0xffffffffu)) == 0);
}
else if (GET_CODE (op) == CONST_DOUBLE)
{
if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
|| mode != DImode)
abort();
return CONST_DOUBLE_HIGH (op) == 0;
}
else
return gpc_reg_operand (op, mode);
} }
/* Return 1 if the operand is an operand that can be loaded via the GOT */ /* Return 1 if the operand is an operand that can be loaded via the GOT */
...@@ -949,26 +962,38 @@ logical_operand (op, mode) ...@@ -949,26 +962,38 @@ logical_operand (op, mode)
register rtx op; register rtx op;
enum machine_mode mode; enum machine_mode mode;
{ {
/* an unsigned representation of 'op'. */
unsigned HOST_WIDE_INT opl, oph;
if (gpc_reg_operand (op, mode)) if (gpc_reg_operand (op, mode))
return 1; return 1;
if (GET_CODE (op) == CONST_INT) if (GET_CODE (op) == CONST_INT)
{ {
unsigned HOST_WIDE_INT cval = INTVAL (op) & GET_MODE_MASK (mode); opl = INTVAL (op) & GET_MODE_MASK (mode);
return ((cval & (~ (HOST_WIDE_INT) 0xffff)) == 0 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
|| (cval & (~ (HOST_WIDE_INT) 0xffff0000u)) == 0); oph = 0;
else
oph = INTVAL (op) >> (HOST_BITS_PER_WIDE_INT - 1);
} }
else if (GET_CODE (op) == CONST_DOUBLE) else if (GET_CODE (op) == CONST_DOUBLE)
{ {
return (CONST_DOUBLE_HIGH (op) == 0 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
&& ((CONST_DOUBLE_LOW (op) abort();
& (~ (unsigned HOST_WIDE_INT) 0xffff0000u)) == 0));
opl = CONST_DOUBLE_LOW (op);
oph = CONST_DOUBLE_HIGH (op);
} }
else else
return 0; return 0;
return (oph == 0
&& ((opl & ~ (unsigned HOST_WIDE_INT) 0xffff) == 0
|| (opl & ~ (unsigned HOST_WIDE_INT) 0xffff0000u) == 0));
} }
/* Return 1 if C is a constant that is not a logical operand (as /* Return 1 if C is a constant that is not a logical operand (as
above). */ above), but could be split into one. */
int int
non_logical_cint_operand (op, mode) non_logical_cint_operand (op, mode)
...@@ -976,7 +1001,8 @@ non_logical_cint_operand (op, mode) ...@@ -976,7 +1001,8 @@ non_logical_cint_operand (op, mode)
enum machine_mode mode; enum machine_mode mode;
{ {
return ((GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_DOUBLE) return ((GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_DOUBLE)
&& ! logical_operand (op, mode)); && ! logical_operand (op, mode)
&& reg_or_logical_cint_operand (op, mode));
} }
/* Return 1 if C is a constant that can be encoded in a 32-bit mask on the /* Return 1 if C is a constant that can be encoded in a 32-bit mask on the
...@@ -2932,6 +2958,15 @@ boolean_operator (op, mode) ...@@ -2932,6 +2958,15 @@ boolean_operator (op, mode)
enum rtx_code code = GET_CODE (op); enum rtx_code code = GET_CODE (op);
return (code == AND || code == IOR || code == XOR); return (code == AND || code == IOR || code == XOR);
} }
int
boolean_or_operator (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
enum rtx_code code = GET_CODE (op);
return (code == IOR || code == XOR);
}
/* Return 1 if ANDOP is a mask that has no bits on that are not in the /* Return 1 if ANDOP is a mask that has no bits on that are not in the
mask required to convert the result of a rotate insn into a shift mask required to convert the result of a rotate insn into a shift
......
...@@ -2713,7 +2713,7 @@ do { \ ...@@ -2713,7 +2713,7 @@ do { \
{"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \ {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \
{"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \ {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \
{"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \ {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
{"reg_or_u_cint_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \ {"reg_or_logical_cint_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \
{"got_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \ {"got_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
{"got_no_const_operand", {SYMBOL_REF, LABEL_REF}}, \ {"got_no_const_operand", {SYMBOL_REF, LABEL_REF}}, \
{"easy_fp_constant", {CONST_DOUBLE}}, \ {"easy_fp_constant", {CONST_DOUBLE}}, \
...@@ -2747,7 +2747,8 @@ do { \ ...@@ -2747,7 +2747,8 @@ do { \
GT, LEU, LTU, GEU, GTU}}, \ GT, LEU, LTU, GEU, GTU}}, \
{"trap_comparison_operator", {EQ, NE, LE, LT, GE, \ {"trap_comparison_operator", {EQ, NE, LE, LT, GE, \
GT, LEU, LTU, GEU, GTU}}, \ GT, LEU, LTU, GEU, GTU}}, \
{"boolean_operator", {AND, IOR, XOR}}, {"boolean_operator", {AND, IOR, XOR}}, \
{"boolean_or_operator", {IOR, XOR}},
/* uncomment for disabling the corresponding default options */ /* uncomment for disabling the corresponding default options */
/* #define MACHINE_no_sched_interblock */ /* #define MACHINE_no_sched_interblock */
......
...@@ -2642,7 +2642,7 @@ ...@@ -2642,7 +2642,7 @@
(define_expand "iorsi3" (define_expand "iorsi3"
[(set (match_operand:SI 0 "gpc_reg_operand" "") [(set (match_operand:SI 0 "gpc_reg_operand" "")
(ior:SI (match_operand:SI 1 "gpc_reg_operand" "") (ior:SI (match_operand:SI 1 "gpc_reg_operand" "")
(match_operand:SI 2 "reg_or_cint_operand" "")))] (match_operand:SI 2 "reg_or_logical_cint_operand" "")))]
"" ""
" "
{ {
...@@ -2663,7 +2663,7 @@ ...@@ -2663,7 +2663,7 @@
(define_expand "xorsi3" (define_expand "xorsi3"
[(set (match_operand:SI 0 "gpc_reg_operand" "") [(set (match_operand:SI 0 "gpc_reg_operand" "")
(xor:SI (match_operand:SI 1 "gpc_reg_operand" "") (xor:SI (match_operand:SI 1 "gpc_reg_operand" "")
(match_operand:SI 2 "reg_or_cint_operand" "")))] (match_operand:SI 2 "reg_or_logical_cint_operand" "")))]
"" ""
" "
{ {
...@@ -2683,7 +2683,7 @@ ...@@ -2683,7 +2683,7 @@
(define_insn "*boolsi3_internal1" (define_insn "*boolsi3_internal1"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r") [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r")
(match_operator:SI 3 "boolean_operator" (match_operator:SI 3 "boolean_or_operator"
[(match_operand:SI 1 "gpc_reg_operand" "%r,r,r") [(match_operand:SI 1 "gpc_reg_operand" "%r,r,r")
(match_operand:SI 2 "logical_operand" "r,K,L")]))] (match_operand:SI 2 "logical_operand" "r,K,L")]))]
"" ""
...@@ -2694,7 +2694,7 @@ ...@@ -2694,7 +2694,7 @@
(define_insn "*boolsi3_internal2" (define_insn "*boolsi3_internal2"
[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y") [(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
(compare:CC (match_operator:SI 4 "boolean_operator" (compare:CC (match_operator:SI 4 "boolean_or_operator"
[(match_operand:SI 1 "gpc_reg_operand" "%r,r") [(match_operand:SI 1 "gpc_reg_operand" "%r,r")
(match_operand:SI 2 "gpc_reg_operand" "r,r")]) (match_operand:SI 2 "gpc_reg_operand" "r,r")])
(const_int 0))) (const_int 0)))
...@@ -2755,7 +2755,7 @@ ...@@ -2755,7 +2755,7 @@
(define_split (define_split
[(set (match_operand:SI 0 "gpc_reg_operand" "") [(set (match_operand:SI 0 "gpc_reg_operand" "")
(match_operator:SI 3 "boolean_operator" (match_operator:SI 3 "boolean_or_operator"
[(match_operand:SI 1 "gpc_reg_operand" "") [(match_operand:SI 1 "gpc_reg_operand" "")
(match_operand:SI 2 "non_logical_cint_operand" "")]))] (match_operand:SI 2 "non_logical_cint_operand" "")]))]
"" ""
...@@ -7060,7 +7060,7 @@ ...@@ -7060,7 +7060,7 @@
(define_expand "iordi3" (define_expand "iordi3"
[(set (match_operand:DI 0 "gpc_reg_operand" "") [(set (match_operand:DI 0 "gpc_reg_operand" "")
(ior:DI (match_operand:DI 1 "gpc_reg_operand" "") (ior:DI (match_operand:DI 1 "gpc_reg_operand" "")
(match_operand:DI 2 "reg_or_cint_operand" "")))] (match_operand:DI 2 "reg_or_logical_cint_operand" "")))]
"TARGET_POWERPC64" "TARGET_POWERPC64"
" "
{ {
...@@ -7092,7 +7092,7 @@ ...@@ -7092,7 +7092,7 @@
(define_expand "xordi3" (define_expand "xordi3"
[(set (match_operand:DI 0 "gpc_reg_operand" "") [(set (match_operand:DI 0 "gpc_reg_operand" "")
(xor:DI (match_operand:DI 1 "gpc_reg_operand" "") (xor:DI (match_operand:DI 1 "gpc_reg_operand" "")
(match_operand:DI 2 "reg_or_cint_operand" "")))] (match_operand:DI 2 "reg_or_logical_cint_operand" "")))]
"TARGET_POWERPC64" "TARGET_POWERPC64"
" "
{ {
...@@ -7123,7 +7123,7 @@ ...@@ -7123,7 +7123,7 @@
(define_insn "*booldi3_internal1" (define_insn "*booldi3_internal1"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r") [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r")
(match_operator:DI 3 "boolean_operator" (match_operator:DI 3 "boolean_or_operator"
[(match_operand:DI 1 "gpc_reg_operand" "%r,r,r") [(match_operand:DI 1 "gpc_reg_operand" "%r,r,r")
(match_operand:DI 2 "logical_operand" "r,K,JF")]))] (match_operand:DI 2 "logical_operand" "r,K,JF")]))]
"TARGET_POWERPC64" "TARGET_POWERPC64"
...@@ -7134,7 +7134,7 @@ ...@@ -7134,7 +7134,7 @@
(define_insn "*booldi3_internal2" (define_insn "*booldi3_internal2"
[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y") [(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
(compare:CC (match_operator:DI 4 "boolean_operator" (compare:CC (match_operator:DI 4 "boolean_or_operator"
[(match_operand:DI 1 "gpc_reg_operand" "%r,r") [(match_operand:DI 1 "gpc_reg_operand" "%r,r")
(match_operand:DI 2 "gpc_reg_operand" "r,r")]) (match_operand:DI 2 "gpc_reg_operand" "r,r")])
(const_int 0))) (const_int 0)))
...@@ -7195,7 +7195,7 @@ ...@@ -7195,7 +7195,7 @@
(define_split (define_split
[(set (match_operand:DI 0 "gpc_reg_operand" "") [(set (match_operand:DI 0 "gpc_reg_operand" "")
(match_operator:DI 3 "boolean_operator" (match_operator:DI 3 "boolean_or_operator"
[(match_operand:DI 1 "gpc_reg_operand" "") [(match_operand:DI 1 "gpc_reg_operand" "")
(match_operand:DI 2 "non_logical_cint_operand" "")]))] (match_operand:DI 2 "non_logical_cint_operand" "")]))]
"TARGET_POWERPC64" "TARGET_POWERPC64"
...@@ -7230,7 +7230,7 @@ ...@@ -7230,7 +7230,7 @@
[(not:DI (match_operand:DI 1 "gpc_reg_operand" "r")) [(not:DI (match_operand:DI 1 "gpc_reg_operand" "r"))
(match_operand:DI 2 "logical_operand" "r")]))] (match_operand:DI 2 "logical_operand" "r")]))]
"TARGET_POWERPC64" "TARGET_POWERPC64"
"%q3 %0,%1,%2") "%q3 %0,%2,%1")
(define_insn "*boolcdi3_internal2" (define_insn "*boolcdi3_internal2"
[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y") [(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
...@@ -7241,7 +7241,7 @@ ...@@ -7241,7 +7241,7 @@
(clobber (match_scratch:DI 3 "=r,r"))] (clobber (match_scratch:DI 3 "=r,r"))]
"TARGET_POWERPC64" "TARGET_POWERPC64"
"@ "@
%q4. %3,%1,%2 %q4. %3,%2,%1
#" #"
[(set_attr "type" "compare") [(set_attr "type" "compare")
(set_attr "length" "4,8")]) (set_attr "length" "4,8")])
...@@ -7270,7 +7270,7 @@ ...@@ -7270,7 +7270,7 @@
(match_dup 4))] (match_dup 4))]
"TARGET_POWERPC64" "TARGET_POWERPC64"
"@ "@
%q4. %0,%1,%2 %q4. %0,%2,%1
#" #"
[(set_attr "type" "compare") [(set_attr "type" "compare")
(set_attr "length" "4,8")]) (set_attr "length" "4,8")])
......
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