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riscv-gcc-1
Commit 1d0eabee by Venkataramanan Kumar Committed by Venkataramanan Kumar
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Fix integer load reservation for -march=znver1 

2016-10-11  Venkataramanan Kumar  <Venkataramanan.kumar@amd.com>

	* config/i386/znver1.md : Fix imov/imovx load type reservations.

From-SVN: r240990
parent 8e8c2744
Showing with 8 additions and 4 deletions
gcc/ChangeLog
2016-10-11 Venkataramanan Kumar <Venkataramanan.kumar@amd.com>
* config/i386/znver1.md : Fix imov/imovx load type reservations.
2016-10-11 Eric Botcazou <ebotcazou@adacore.com>
* config/sparc/sparc.opt (msubxc): New option.
......
gcc/config/i386/znver1.md
......@@ -228,18 +228,18 @@
(eq_attr "memory" "store")))
"znver1-direct,znver1-ieu,znver1-store")
(define_insn_reservation "znver1_load_imov_double_load" 6
(define_insn_reservation "znver1_load_imov_double_load" 5
(and (eq_attr "cpu" "znver1")
(and (eq_attr "znver1_decode" "double")
(and (eq_attr "type" "imovx")
(eq_attr "memory" "load"))))
"znver1-double,znver1-load,znver1-ieu")
"znver1-double,znver1-load")
(define_insn_reservation "znver1_load_imov_direct_load" 5
(define_insn_reservation "znver1_load_imov_direct_load" 4
(and (eq_attr "cpu" "znver1")
(and (eq_attr "type" "imov,imovx")
(eq_attr "memory" "load")))
"znver1-direct,znver1-load,znver1-ieu")
"znver1-direct,znver1-load")
;; INTEGER/GENERAL instructions
;; register/imm operands only: ALU, ICMP, NEG, NOT, ROTATE, ISHIFT, TEST
......
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