Commit 1d08f955 by Richard Guenther Committed by Richard Biener

i386.md (asindf2, [...]): Conditionalize expansion on !optimize_size.

2006-10-31  Richard Guenther  <rguenther@suse.de>

	* config/i386/i386.md (asindf2, asinsf2, asinxf2, acosdf2,
	acossf2, acosxf2, log1psf2, log1pdf2, log1pxf2, ilogbsi2,
	expsf2, expdf2, expxf2, exp10sf2, exp10df2, exp10xf2,
	exp2sf2, exp2df2, exp2xf2, expm1df2, expm1sf2, expm1xf2,
	ldexpdf3, ldexpsf3, ldexpxf3, rintxf2, rintdf2, rintsf2,
	lround<mode>di2, lround<mode>si2, floorxf2, floordf2, floorsf2,
	lfloor<mode>di2, lfloor<mode>si2, ceilxf2, ceildf2, ceilsf2,
	btruncxf2, btruncdf2, btruncsf2): Conditionalize expansion on
	!optimize_size.

From-SVN: r118221
parent dd5797cc
2006-10-31 Richard Guenther <rguenther@suse.de>
* config/i386/i386.md (asindf2, asinsf2, asinxf2, acosdf2,
acossf2, acosxf2, log1psf2, log1pdf2, log1pxf2, ilogbsi2,
expsf2, expdf2, expxf2, exp10sf2, exp10df2, exp10xf2,
exp2sf2, exp2df2, exp2xf2, expm1df2, expm1sf2, expm1xf2,
ldexpdf3, ldexpsf3, ldexpxf3, rintxf2, rintdf2, rintsf2,
lround<mode>di2, lround<mode>si2, floorxf2, floordf2, floorsf2,
lfloor<mode>di2, lfloor<mode>si2, ceilxf2, ceildf2, ceilsf2,
btruncxf2, btruncdf2, btruncsf2): Conditionalize expansion on
!optimize_size.
2006-10-31 Steven Bosscher <steven@gcc.gnu.org> 2006-10-31 Steven Bosscher <steven@gcc.gnu.org>
* opts.c (decode_options): Disable CSE skip blocks. * opts.c (decode_options): Disable CSE skip blocks.
......
...@@ -16262,7 +16262,7 @@ ...@@ -16262,7 +16262,7 @@
(float_truncate:DF (match_dup 7)))] (float_truncate:DF (match_dup 7)))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387) && (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
int i; int i;
...@@ -16286,7 +16286,7 @@ ...@@ -16286,7 +16286,7 @@
(float_truncate:SF (match_dup 7)))] (float_truncate:SF (match_dup 7)))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
int i; int i;
...@@ -16307,7 +16307,7 @@ ...@@ -16307,7 +16307,7 @@
UNSPEC_FPATAN)) UNSPEC_FPATAN))
(clobber (match_scratch:XF 6 ""))])] (clobber (match_scratch:XF 6 ""))])]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
int i; int i;
...@@ -16331,7 +16331,7 @@ ...@@ -16331,7 +16331,7 @@
(float_truncate:DF (match_dup 7)))] (float_truncate:DF (match_dup 7)))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387) && (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
int i; int i;
...@@ -16355,7 +16355,7 @@ ...@@ -16355,7 +16355,7 @@
(float_truncate:SF (match_dup 7)))] (float_truncate:SF (match_dup 7)))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
int i; int i;
...@@ -16376,7 +16376,7 @@ ...@@ -16376,7 +16376,7 @@
UNSPEC_FPATAN)) UNSPEC_FPATAN))
(clobber (match_scratch:XF 6 ""))])] (clobber (match_scratch:XF 6 ""))])]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
int i; int i;
...@@ -16589,7 +16589,7 @@ ...@@ -16589,7 +16589,7 @@
(use (match_operand:SF 1 "register_operand" ""))] (use (match_operand:SF 1 "register_operand" ""))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
rtx op0 = gen_reg_rtx (XFmode); rtx op0 = gen_reg_rtx (XFmode);
rtx op1 = gen_reg_rtx (XFmode); rtx op1 = gen_reg_rtx (XFmode);
...@@ -16605,7 +16605,7 @@ ...@@ -16605,7 +16605,7 @@
(use (match_operand:DF 1 "register_operand" ""))] (use (match_operand:DF 1 "register_operand" ""))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387) && (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
rtx op0 = gen_reg_rtx (XFmode); rtx op0 = gen_reg_rtx (XFmode);
rtx op1 = gen_reg_rtx (XFmode); rtx op1 = gen_reg_rtx (XFmode);
...@@ -16620,7 +16620,7 @@ ...@@ -16620,7 +16620,7 @@
[(use (match_operand:XF 0 "register_operand" "")) [(use (match_operand:XF 0 "register_operand" ""))
(use (match_operand:XF 1 "register_operand" ""))] (use (match_operand:XF 1 "register_operand" ""))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
ix86_emit_i387_log1p (operands[0], operands[1]); ix86_emit_i387_log1p (operands[0], operands[1]);
DONE; DONE;
...@@ -16697,7 +16697,7 @@ ...@@ -16697,7 +16697,7 @@
(clobber (reg:CC FLAGS_REG))])] (clobber (reg:CC FLAGS_REG))])]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
operands[2] = gen_reg_rtx (XFmode); operands[2] = gen_reg_rtx (XFmode);
operands[3] = gen_reg_rtx (XFmode); operands[3] = gen_reg_rtx (XFmode);
...@@ -16745,7 +16745,7 @@ ...@@ -16745,7 +16745,7 @@
(float_truncate:SF (match_dup 10)))] (float_truncate:SF (match_dup 10)))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
rtx temp; rtx temp;
int i; int i;
...@@ -16775,7 +16775,7 @@ ...@@ -16775,7 +16775,7 @@
(float_truncate:DF (match_dup 10)))] (float_truncate:DF (match_dup 10)))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387) && (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
rtx temp; rtx temp;
int i; int i;
...@@ -16801,7 +16801,7 @@ ...@@ -16801,7 +16801,7 @@
(unspec:XF [(match_dup 8) (match_dup 4)] (unspec:XF [(match_dup 8) (match_dup 4)]
UNSPEC_FSCALE_EXP))])] UNSPEC_FSCALE_EXP))])]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
rtx temp; rtx temp;
int i; int i;
...@@ -16831,7 +16831,7 @@ ...@@ -16831,7 +16831,7 @@
(float_truncate:SF (match_dup 10)))] (float_truncate:SF (match_dup 10)))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
rtx temp; rtx temp;
int i; int i;
...@@ -16861,7 +16861,7 @@ ...@@ -16861,7 +16861,7 @@
(float_truncate:DF (match_dup 10)))] (float_truncate:DF (match_dup 10)))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387) && (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
rtx temp; rtx temp;
int i; int i;
...@@ -16887,7 +16887,7 @@ ...@@ -16887,7 +16887,7 @@
(unspec:XF [(match_dup 8) (match_dup 4)] (unspec:XF [(match_dup 8) (match_dup 4)]
UNSPEC_FSCALE_EXP))])] UNSPEC_FSCALE_EXP))])]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
rtx temp; rtx temp;
int i; int i;
...@@ -16916,7 +16916,7 @@ ...@@ -16916,7 +16916,7 @@
(float_truncate:SF (match_dup 8)))] (float_truncate:SF (match_dup 8)))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
int i; int i;
...@@ -16942,7 +16942,7 @@ ...@@ -16942,7 +16942,7 @@
(float_truncate:DF (match_dup 8)))] (float_truncate:DF (match_dup 8)))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387) && (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
int i; int i;
...@@ -16964,7 +16964,7 @@ ...@@ -16964,7 +16964,7 @@
(unspec:XF [(match_dup 7) (match_dup 3)] (unspec:XF [(match_dup 7) (match_dup 3)]
UNSPEC_FSCALE_EXP))])] UNSPEC_FSCALE_EXP))])]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
int i; int i;
...@@ -16998,7 +16998,7 @@ ...@@ -16998,7 +16998,7 @@
(float_truncate:DF (match_dup 14)))] (float_truncate:DF (match_dup 14)))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387) && (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
rtx temp; rtx temp;
int i; int i;
...@@ -17035,7 +17035,7 @@ ...@@ -17035,7 +17035,7 @@
(float_truncate:SF (match_dup 14)))] (float_truncate:SF (match_dup 14)))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
rtx temp; rtx temp;
int i; int i;
...@@ -17069,7 +17069,7 @@ ...@@ -17069,7 +17069,7 @@
(set (match_operand:XF 0 "register_operand" "") (set (match_operand:XF 0 "register_operand" "")
(plus:XF (match_dup 12) (match_dup 7)))] (plus:XF (match_dup 12) (match_dup 7)))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
rtx temp; rtx temp;
int i; int i;
...@@ -17096,7 +17096,7 @@ ...@@ -17096,7 +17096,7 @@
(float_truncate:DF (match_dup 5)))] (float_truncate:DF (match_dup 5)))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387) && (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
int i; int i;
...@@ -17119,7 +17119,7 @@ ...@@ -17119,7 +17119,7 @@
(float_truncate:SF (match_dup 5)))] (float_truncate:SF (match_dup 5)))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
int i; int i;
...@@ -17138,7 +17138,7 @@ ...@@ -17138,7 +17138,7 @@
(unspec:XF [(match_dup 1) (match_dup 3)] (unspec:XF [(match_dup 1) (match_dup 3)]
UNSPEC_FSCALE_EXP))])] UNSPEC_FSCALE_EXP))])]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
int i; int i;
...@@ -17164,20 +17164,22 @@ ...@@ -17164,20 +17164,22 @@
&& (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387) && (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations) && flag_unsafe_math_optimizations)
|| (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH
&& !flag_trapping_math)" && !flag_trapping_math
&& !optimize_size)"
{ {
if (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH if (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH
&& !flag_trapping_math) && !flag_trapping_math
&& !optimize_size)
ix86_expand_rint (operand0, operand1); ix86_expand_rint (operand0, operand1);
else else
{ {
rtx op0 = gen_reg_rtx (XFmode); rtx op0 = gen_reg_rtx (XFmode);
rtx op1 = gen_reg_rtx (XFmode); rtx op1 = gen_reg_rtx (XFmode);
emit_insn (gen_extenddfxf2 (op1, operands[1])); emit_insn (gen_extenddfxf2 (op1, operands[1]));
emit_insn (gen_frndintxf2 (op0, op1)); emit_insn (gen_frndintxf2 (op0, op1));
emit_insn (gen_truncxfdf2_i387_noop (operands[0], op0)); emit_insn (gen_truncxfdf2_i387_noop (operands[0], op0));
} }
DONE; DONE;
}) })
...@@ -17189,20 +17191,22 @@ ...@@ -17189,20 +17191,22 @@
&& (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations) && flag_unsafe_math_optimizations)
|| (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH
&& !flag_trapping_math)" && !flag_trapping_math
&& !optimize_size)"
{ {
if (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH if (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH
&& !flag_trapping_math) && !flag_trapping_math
&& !optimize_size)
ix86_expand_rint (operand0, operand1); ix86_expand_rint (operand0, operand1);
else else
{ {
rtx op0 = gen_reg_rtx (XFmode); rtx op0 = gen_reg_rtx (XFmode);
rtx op1 = gen_reg_rtx (XFmode); rtx op1 = gen_reg_rtx (XFmode);
emit_insn (gen_extendsfxf2 (op1, operands[1])); emit_insn (gen_extendsfxf2 (op1, operands[1]));
emit_insn (gen_frndintxf2 (op0, op1)); emit_insn (gen_frndintxf2 (op0, op1));
emit_insn (gen_truncxfsf2_i387_noop (operands[0], op0)); emit_insn (gen_truncxfsf2_i387_noop (operands[0], op0));
} }
DONE; DONE;
}) })
...@@ -17211,7 +17215,7 @@ ...@@ -17211,7 +17215,7 @@
[(use (match_operand:XF 0 "register_operand" "")) [(use (match_operand:XF 0 "register_operand" ""))
(use (match_operand:XF 1 "register_operand" ""))] (use (match_operand:XF 1 "register_operand" ""))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
emit_insn (gen_frndintxf2 (operands[0], operands[1])); emit_insn (gen_frndintxf2 (operands[0], operands[1]));
DONE; DONE;
...@@ -17392,7 +17396,8 @@ ...@@ -17392,7 +17396,8 @@
[(match_operand:DI 0 "nonimmediate_operand" "") [(match_operand:DI 0 "nonimmediate_operand" "")
(match_operand:SSEMODEF 1 "register_operand" "")] (match_operand:SSEMODEF 1 "register_operand" "")]
"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH && TARGET_64BIT "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH && TARGET_64BIT
&& !flag_trapping_math && !flag_rounding_math" && !flag_trapping_math && !flag_rounding_math
&& !optimize_size"
{ {
ix86_expand_lround (operand0, operand1); ix86_expand_lround (operand0, operand1);
DONE; DONE;
...@@ -17402,7 +17407,8 @@ ...@@ -17402,7 +17407,8 @@
[(match_operand:SI 0 "nonimmediate_operand" "") [(match_operand:SI 0 "nonimmediate_operand" "")
(match_operand:SSEMODEF 1 "register_operand" "")] (match_operand:SSEMODEF 1 "register_operand" "")]
"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
&& !flag_trapping_math && !flag_rounding_math" && !flag_trapping_math && !flag_rounding_math
&& !optimize_size"
{ {
ix86_expand_lround (operand0, operand1); ix86_expand_lround (operand0, operand1);
DONE; DONE;
...@@ -17451,7 +17457,7 @@ ...@@ -17451,7 +17457,7 @@
[(use (match_operand:XF 0 "register_operand" "")) [(use (match_operand:XF 0 "register_operand" ""))
(use (match_operand:XF 1 "register_operand" ""))] (use (match_operand:XF 1 "register_operand" ""))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
emit_insn (gen_frndintxf2_floor (operands[0], operands[1])); emit_insn (gen_frndintxf2_floor (operands[0], operands[1]));
DONE; DONE;
...@@ -17460,16 +17466,15 @@ ...@@ -17460,16 +17466,15 @@
(define_expand "floordf2" (define_expand "floordf2"
[(use (match_operand:DF 0 "register_operand" "")) [(use (match_operand:DF 0 "register_operand" ""))
(use (match_operand:DF 1 "register_operand" ""))] (use (match_operand:DF 1 "register_operand" ""))]
"(TARGET_USE_FANCY_MATH_387 "((TARGET_USE_FANCY_MATH_387
&& (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387) && (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations) && flag_unsafe_math_optimizations)
|| (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH
&& !flag_trapping_math && !flag_trapping_math))
&& !optimize_size)" && !optimize_size"
{ {
if (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH if (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH
&& !flag_trapping_math && !flag_trapping_math)
&& !optimize_size)
{ {
if (TARGET_64BIT) if (TARGET_64BIT)
ix86_expand_floorceil (operand0, operand1, true); ix86_expand_floorceil (operand0, operand1, true);
...@@ -17492,16 +17497,15 @@ ...@@ -17492,16 +17497,15 @@
(define_expand "floorsf2" (define_expand "floorsf2"
[(use (match_operand:SF 0 "register_operand" "")) [(use (match_operand:SF 0 "register_operand" ""))
(use (match_operand:SF 1 "register_operand" ""))] (use (match_operand:SF 1 "register_operand" ""))]
"(TARGET_USE_FANCY_MATH_387 "((TARGET_USE_FANCY_MATH_387
&& (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations) && flag_unsafe_math_optimizations)
|| (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH
&& !flag_trapping_math && !flag_trapping_math))
&& !optimize_size)" && !optimize_size"
{ {
if (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH if (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH
&& !flag_trapping_math && !flag_trapping_math)
&& !optimize_size)
ix86_expand_floorceil (operand0, operand1, true); ix86_expand_floorceil (operand0, operand1, true);
else else
{ {
...@@ -17678,7 +17682,8 @@ ...@@ -17678,7 +17682,8 @@
[(match_operand:DI 0 "nonimmediate_operand" "") [(match_operand:DI 0 "nonimmediate_operand" "")
(match_operand:SSEMODEF 1 "register_operand" "")] (match_operand:SSEMODEF 1 "register_operand" "")]
"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH && TARGET_64BIT "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH && TARGET_64BIT
&& !flag_trapping_math" && !flag_trapping_math
&& !optimize_size"
{ {
ix86_expand_lfloorceil (operand0, operand1, true); ix86_expand_lfloorceil (operand0, operand1, true);
DONE; DONE;
...@@ -17688,7 +17693,8 @@ ...@@ -17688,7 +17693,8 @@
[(match_operand:SI 0 "nonimmediate_operand" "") [(match_operand:SI 0 "nonimmediate_operand" "")
(match_operand:SSEMODEF 1 "register_operand" "")] (match_operand:SSEMODEF 1 "register_operand" "")]
"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
&& !flag_trapping_math" && !flag_trapping_math
&& (!optimize_size || !TARGET_64BIT)"
{ {
ix86_expand_lfloorceil (operand0, operand1, true); ix86_expand_lfloorceil (operand0, operand1, true);
DONE; DONE;
...@@ -17737,7 +17743,7 @@ ...@@ -17737,7 +17743,7 @@
[(use (match_operand:XF 0 "register_operand" "")) [(use (match_operand:XF 0 "register_operand" ""))
(use (match_operand:XF 1 "register_operand" ""))] (use (match_operand:XF 1 "register_operand" ""))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
emit_insn (gen_frndintxf2_ceil (operands[0], operands[1])); emit_insn (gen_frndintxf2_ceil (operands[0], operands[1]));
DONE; DONE;
...@@ -17746,16 +17752,15 @@ ...@@ -17746,16 +17752,15 @@
(define_expand "ceildf2" (define_expand "ceildf2"
[(use (match_operand:DF 0 "register_operand" "")) [(use (match_operand:DF 0 "register_operand" ""))
(use (match_operand:DF 1 "register_operand" ""))] (use (match_operand:DF 1 "register_operand" ""))]
"(TARGET_USE_FANCY_MATH_387 "((TARGET_USE_FANCY_MATH_387
&& (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387) && (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations) && flag_unsafe_math_optimizations)
|| (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH
&& !flag_trapping_math && !flag_trapping_math))
&& !optimize_size)" && !optimize_size"
{ {
if (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH if (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH
&& !flag_trapping_math && !flag_trapping_math)
&& !optimize_size)
{ {
if (TARGET_64BIT) if (TARGET_64BIT)
ix86_expand_floorceil (operand0, operand1, false); ix86_expand_floorceil (operand0, operand1, false);
...@@ -17778,16 +17783,15 @@ ...@@ -17778,16 +17783,15 @@
(define_expand "ceilsf2" (define_expand "ceilsf2"
[(use (match_operand:SF 0 "register_operand" "")) [(use (match_operand:SF 0 "register_operand" ""))
(use (match_operand:SF 1 "register_operand" ""))] (use (match_operand:SF 1 "register_operand" ""))]
"(TARGET_USE_FANCY_MATH_387 "((TARGET_USE_FANCY_MATH_387
&& (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations) && flag_unsafe_math_optimizations)
|| (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH
&& !flag_trapping_math && !flag_trapping_math))
&& !optimize_size)" && !optimize_size"
{ {
if (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH if (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH
&& !flag_trapping_math && !flag_trapping_math)
&& !optimize_size)
ix86_expand_floorceil (operand0, operand1, false); ix86_expand_floorceil (operand0, operand1, false);
else else
{ {
...@@ -18023,7 +18027,7 @@ ...@@ -18023,7 +18027,7 @@
[(use (match_operand:XF 0 "register_operand" "")) [(use (match_operand:XF 0 "register_operand" ""))
(use (match_operand:XF 1 "register_operand" ""))] (use (match_operand:XF 1 "register_operand" ""))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations && !optimize_size"
{ {
emit_insn (gen_frndintxf2_trunc (operands[0], operands[1])); emit_insn (gen_frndintxf2_trunc (operands[0], operands[1]));
DONE; DONE;
...@@ -18032,16 +18036,15 @@ ...@@ -18032,16 +18036,15 @@
(define_expand "btruncdf2" (define_expand "btruncdf2"
[(use (match_operand:DF 0 "register_operand" "")) [(use (match_operand:DF 0 "register_operand" ""))
(use (match_operand:DF 1 "register_operand" ""))] (use (match_operand:DF 1 "register_operand" ""))]
"(TARGET_USE_FANCY_MATH_387 "((TARGET_USE_FANCY_MATH_387
&& (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387) && (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations) && flag_unsafe_math_optimizations)
|| (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH
&& !flag_trapping_math && !flag_trapping_math))
&& !optimize_size)" && !optimize_size"
{ {
if (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH if (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH
&& !flag_trapping_math && !flag_trapping_math)
&& !optimize_size)
{ {
if (TARGET_64BIT) if (TARGET_64BIT)
ix86_expand_trunc (operand0, operand1); ix86_expand_trunc (operand0, operand1);
...@@ -18064,16 +18067,15 @@ ...@@ -18064,16 +18067,15 @@
(define_expand "btruncsf2" (define_expand "btruncsf2"
[(use (match_operand:SF 0 "register_operand" "")) [(use (match_operand:SF 0 "register_operand" ""))
(use (match_operand:SF 1 "register_operand" ""))] (use (match_operand:SF 1 "register_operand" ""))]
"(TARGET_USE_FANCY_MATH_387 "((TARGET_USE_FANCY_MATH_387
&& (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations) && flag_unsafe_math_optimizations)
|| (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH
&& !flag_trapping_math && !flag_trapping_math))
&& !optimize_size)" && !optimize_size"
{ {
if (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH if (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH
&& !flag_trapping_math && !flag_trapping_math)
&& !optimize_size)
ix86_expand_trunc (operand0, operand1); ix86_expand_trunc (operand0, operand1);
else else
{ {
......
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