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riscv-gcc-1
Commit 1c0751d9 by Richard Kenner
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*** empty log message *** 

From-SVN: r337
parent 7e860cf7
Showing with 9 additions and 17 deletions
gcc/config/a29k/a29k.md
...@@ -405,17 +405,13 @@ ...@@ -405,17 +405,13 @@
[(set (match_dup 4) [(set (match_dup 4)
(ashiftrt:SI (match_operand:SI 1 "gen_reg_operand" "") (ashiftrt:SI (match_operand:SI 1 "gen_reg_operand" "")
(const_int 31))) (const_int 31)))
(set (reg:SI 180)
(match_dup 4))
(parallel [(set (match_operand:SI 0 "gen_reg_operand" "") (parallel [(set (match_operand:SI 0 "gen_reg_operand" "")
(div:SI (match_dup 1) (div:SI (match_dup 1)
(match_operand:SI 2 "gen_reg_operand" ""))) (match_operand:SI 2 "gen_reg_operand" "")))
(set (reg:SI 180) (set (match_operand:SI 3 "gen_reg_operand" "")
(mod:SI (match_dup 1) (mod:SI (match_dup 1)
(match_dup 2))) (match_dup 2)))
(use (reg:SI 180))]) (use (match_dup 4))])]
(set (match_operand:SI 3 "gen_reg_operand" "")
(reg:SI 180))]
"" ""
" "
{ {
...@@ -426,10 +422,10 @@ ...@@ -426,10 +422,10 @@
[(set (match_operand:SI 0 "gen_reg_operand" "=r") [(set (match_operand:SI 0 "gen_reg_operand" "=r")
(div:SI (match_operand:SI 1 "gen_reg_operand" "r") (div:SI (match_operand:SI 1 "gen_reg_operand" "r")
(match_operand:SI 2 "gen_reg_operand" "r"))) (match_operand:SI 2 "gen_reg_operand" "r")))
(set (reg:SI 180) (set (match_operand:SI 3 "register_operand" "=q")
(mod:SI (match_dup 1) (mod:SI (match_dup 1)
(match_dup 2))) (match_dup 2)))
(use (reg:SI 180))] (use (match_operand:SI 4 "register_operand" "3"))]
"" ""
"divide %0,%1,%2") "divide %0,%1,%2")
...@@ -437,17 +433,13 @@ ...@@ -437,17 +433,13 @@
;; ;;
;; Similar to DIVIDE. ;; Similar to DIVIDE.
(define_expand "udivmodsi4" (define_expand "udivmodsi4"
[(set (reg:SI 180) [(parallel [(set (match_operand:SI 0 "gen_reg_operand" "")
(const_int 0))
(parallel [(set (match_operand:SI 0 "gen_reg_operand" "")
(udiv:SI (match_operand:SI 1 "gen_reg_operand" "") (udiv:SI (match_operand:SI 1 "gen_reg_operand" "")
(match_operand:SI 2 "gen_reg_operand" ""))) (match_operand:SI 2 "gen_reg_operand" "")))
(set (reg:SI 180) (set (match_operand:SI 3 "gen_reg_operand" "")
(umod:SI (match_dup 1) (umod:SI (match_dup 1)
(match_dup 2))) (match_dup 2)))
(use (reg:SI 180))]) (use (const_int 0))])]
(set (match_operand:SI 3 "gen_reg_operand" "")
(reg:SI 180))]
"" ""
"") "")
...@@ -455,10 +447,10 @@ ...@@ -455,10 +447,10 @@
[(set (match_operand:SI 0 "gen_reg_operand" "=r") [(set (match_operand:SI 0 "gen_reg_operand" "=r")
(udiv:SI (match_operand:SI 1 "gen_reg_operand" "r") (udiv:SI (match_operand:SI 1 "gen_reg_operand" "r")
(match_operand:SI 2 "gen_reg_operand" "r"))) (match_operand:SI 2 "gen_reg_operand" "r")))
(set (reg:SI 180) (set (match_operand:SI 3 "register_operand" "=q")
(umod:SI (match_dup 1) (umod:SI (match_dup 1)
(match_dup 2))) (match_dup 2)))
(use (reg:SI 180))] (use (match_operand:SI 4 "const_int_operand" "3"))]
"" ""
"dividu %0,%1,%2") "dividu %0,%1,%2")
......
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