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riscv-gcc-1
Commit 1ba62f90 by Richard Sandiford Committed by Richard Sandiford
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Sorry, committed the wrong version of the last patch. 

From-SVN: r142376
parent 0767b03f
Showing with 5 additions and 6 deletions
gcc/ChangeLog
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* config/mips/mips.md (IMOVE32): New mode iterator. * config/mips/mips.md (IMOVE32): New mode iterator.
(movsi): Generalize with IMOVE32. (movsi): Generalize with IMOVE32.
(*movsi_internal): Likewise. (*movsi_internal): Likewise.
(*mov<mode>_mips16): Likewise, and its define_splits. (*mov<mode>_mips16): Likewise.
(*lwxs): Likewise. (*lwxs): Likewise.
2008-12-02 Nathan Sidwell <nathan@codesourcery.com> 2008-12-02 Nathan Sidwell <nathan@codesourcery.com>
gcc/config/mips/mips.md
...@@ -3985,8 +3985,8 @@ ...@@ -3985,8 +3985,8 @@
;; load are 2 2 byte instructions. ;; load are 2 2 byte instructions.
(define_split (define_split
[(set (match_operand:IMOVE32 0 "d_operand") [(set (match_operand:SI 0 "d_operand")
(mem:IMOVE32 (plus:SI (match_dup 0) (mem:SI (plus:SI (match_dup 0)
(match_operand:SI 1 "const_int_operand"))))] (match_operand:SI 1 "const_int_operand"))))]
"TARGET_MIPS16 && reload_completed && !TARGET_DEBUG_D_MODE "TARGET_MIPS16 && reload_completed && !TARGET_DEBUG_D_MODE
&& ((INTVAL (operands[1]) < 0 && ((INTVAL (operands[1]) < 0
...@@ -3996,8 +3996,8 @@ ...@@ -3996,8 +3996,8 @@
|| (INTVAL (operands[1]) >= 0 || (INTVAL (operands[1]) >= 0
&& INTVAL (operands[1]) < 32 * 4 && INTVAL (operands[1]) < 32 * 4
&& (INTVAL (operands[1]) & 3) != 0))" && (INTVAL (operands[1]) & 3) != 0))"
[(set (match_dup 3) (plus:SI (match_dup 0) (match_dup 1))) [(set (match_dup 0) (plus:SI (match_dup 0) (match_dup 1)))
(set (match_dup 0) (mem:IMOVE32 (plus:SI (match_dup 3) (match_dup 2))))] (set (match_dup 0) (mem:SI (plus:SI (match_dup 0) (match_dup 2))))]
{ {
HOST_WIDE_INT val = INTVAL (operands[1]); HOST_WIDE_INT val = INTVAL (operands[1]);
...@@ -4017,7 +4017,6 @@ ...@@ -4017,7 +4017,6 @@
operands[1] = GEN_INT (off); operands[1] = GEN_INT (off);
operands[2] = GEN_INT (val - off); operands[2] = GEN_INT (val - off);
} }
operands[3] = gen_rtx_REG (SImode, REGNO (operands[0]));
}) })
;; On the mips16, we can split a load of certain constants into a load ;; On the mips16, we can split a load of certain constants into a load
......
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