c-family: Tighten vector handling in type_for_mode [PR94072]

In this PR we had a 512-bit VECTOR_TYPE whose mode is XImode
(an integer mode used for four 128-bit vectors).  When trying
to expand a zero constant for it, we hit code in expand_expr_real_1
that tries to use the associated integer type instead.  The code used
type_for_mode (XImode, 1) to get this integer type.

However, the c-family implementation of type_for_mode checks for
any registered built-in type that matches the mode and has the
right signedness.  This meant that it could return a built-in
vector type when given an integer mode (particularly if, as here,
the vector type isn't supported by the current subtarget and so
TYPE_MODE != TYPE_MODE_RAW).  The expand code would then cycle
endlessly trying to use this "new" type instead of the original
vector type.

2020-03-20  Richard Sandiford  <richard.sandiford@arm.com>

gcc/c-family/
	PR middle-end/94072
	* c-common.c (c_common_type_for_mode): Before using a registered
	built-in type, check that the vectorness of the type matches
	the vectorness of the mode.

gcc/testsuite/
	PR middle-end/94072
	* gcc.target/aarch64/pr94072.c: New test.

gcc/c-family/ChangeLog

+2020-03-20  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR middle-end/94072
+	* c-common.c (c_common_type_for_mode): Before using a registered
+	built-in type, check that the vectorness of the type matches
+	the vectorness of the mode.
+
 2020-03-17  Jakub Jelinek  <jakub@redhat.com>
 
 	* c-common.c (resolve_overloaded_builtin): Fix up duplicated word

gcc/c-family/c-common.c

@@ -2387,10 +2387,13 @@ c_common_type_for_mode (machine_mode mode, int unsignedp)
     }
 
   for (t = registered_builtin_types; t; t = TREE_CHAIN (t))
-    if (TYPE_MODE (TREE_VALUE (t)) == mode
-	&& !!unsignedp == !!TYPE_UNSIGNED (TREE_VALUE (t)))
-      return TREE_VALUE (t);
-
+    {
+      tree type = TREE_VALUE (t);
+      if (TYPE_MODE (type) == mode
+	  && VECTOR_TYPE_P (type) == VECTOR_MODE_P (mode)
+	  && !!unsignedp == !!TYPE_UNSIGNED (type))
+	return type;
+    }
   return NULL_TREE;
 }
 

gcc/testsuite/ChangeLog

+2020-03-20  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR middle-end/94072
+	* gcc.target/aarch64/pr94072.c: New test.
+
 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
             Andre Vieira  <andre.simoesdiasvieira@arm.com>
             Mihail Ionescu  <mihail.ionescu@arm.com>

gcc/testsuite/gcc.target/aarch64/pr94072.c

+/* { dg-options "-msve-vector-bits=512" } */
+
+#pragma GCC target "+nosve"
+
+void
+foo (void)
+{
+  (int __attribute__ ((__vector_size__ (64)))){};
+}