Commit 1a63219b by Kazu Hirata Committed by Jeff Law

h8300.c: Fix formatting.

        * h8300.c: Fix formatting.
        * h8300.h: Likewise.
        * h8300.md: Likewise.
        (movsi_h8300hs): Fix formatting of the resulting assembly code.

From-SVN: r35575
parent 1d7254c5
2000-08-08 Kazu Hirata <kazu@hxi.com> 2000-08-08 Kazu Hirata <kazu@hxi.com>
* h8300.c: Fix formatting.
* h8300.h: Likewise.
* h8300.md: Likewise.
(movsi_h8300hs): Fix formatting of the resulting assembly code.
* reload1.c: Fix formatting. * reload1.c: Fix formatting.
2000-08-08 Rodney Brown <RodneyBrown@mynd.com> 2000-08-08 Rodney Brown <RodneyBrown@mynd.com>
......
...@@ -167,7 +167,7 @@ dosize (file, op, size) ...@@ -167,7 +167,7 @@ dosize (file, op, size)
amount > 0; amount > 0;
amount /= 2) amount /= 2)
{ {
for(; size >= amount; size -= amount) for (; size >= amount; size -= amount)
fprintf (file, "\t%ss\t#%d,sp\n", op, amount); fprintf (file, "\t%ss\t#%d,sp\n", op, amount);
} }
} }
...@@ -612,7 +612,7 @@ split_adds_subs (mode, operands) ...@@ -612,7 +612,7 @@ split_adds_subs (mode, operands)
amount > 0; amount > 0;
amount /= 2) amount /= 2)
{ {
for(; val >= amount; val -= amount) for (; val >= amount; val -= amount)
{ {
rtx tmp = gen_rtx_PLUS (mode, reg, GEN_INT (sign * amount)); rtx tmp = gen_rtx_PLUS (mode, reg, GEN_INT (sign * amount));
emit_insn (gen_rtx_SET (VOIDmode, reg, tmp)); emit_insn (gen_rtx_SET (VOIDmode, reg, tmp));
...@@ -1773,16 +1773,16 @@ enum shift_alg ...@@ -1773,16 +1773,16 @@ enum shift_alg
/* Symbols of the various shifts which can be used as indices. */ /* Symbols of the various shifts which can be used as indices. */
enum shift_type enum shift_type
{ {
SHIFT_ASHIFT, SHIFT_LSHIFTRT, SHIFT_ASHIFTRT SHIFT_ASHIFT, SHIFT_LSHIFTRT, SHIFT_ASHIFTRT
}; };
/* Symbols of the various modes which can be used as indices. */ /* Symbols of the various modes which can be used as indices. */
enum shift_mode enum shift_mode
{ {
QIshift, HIshift, SIshift QIshift, HIshift, SIshift
}; };
/* For single bit shift insns, record assembler and what bits of the /* For single bit shift insns, record assembler and what bits of the
condition code are valid afterwards (represented as various CC_FOO condition code are valid afterwards (represented as various CC_FOO
...@@ -2680,7 +2680,8 @@ fix_bit_operand (operands, what, type) ...@@ -2680,7 +2680,8 @@ fix_bit_operand (operands, what, type)
if (CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), what)) if (CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), what))
{ {
/* Ok to have a memory dest. */ /* Ok to have a memory dest. */
if (GET_CODE (operands[0]) == MEM && !EXTRA_CONSTRAINT (operands[0], 'U')) if (GET_CODE (operands[0]) == MEM
&& !EXTRA_CONSTRAINT (operands[0], 'U'))
{ {
rtx mem = gen_rtx_MEM (GET_MODE (operands[0]), rtx mem = gen_rtx_MEM (GET_MODE (operands[0]),
copy_to_mode_reg (Pmode, copy_to_mode_reg (Pmode,
...@@ -2689,7 +2690,8 @@ fix_bit_operand (operands, what, type) ...@@ -2689,7 +2690,8 @@ fix_bit_operand (operands, what, type)
operands[0] = mem; operands[0] = mem;
} }
if (GET_CODE (operands[1]) == MEM && !EXTRA_CONSTRAINT (operands[1], 'U')) if (GET_CODE (operands[1]) == MEM
&& !EXTRA_CONSTRAINT (operands[1], 'U'))
{ {
rtx mem = gen_rtx_MEM (GET_MODE (operands[1]), rtx mem = gen_rtx_MEM (GET_MODE (operands[1]),
copy_to_mode_reg (Pmode, copy_to_mode_reg (Pmode,
......
...@@ -144,11 +144,11 @@ ...@@ -144,11 +144,11 @@
"" ""
" "
{ {
/* One of the ops has to be in a register */ /* One of the ops has to be in a register. */
if (!register_operand(operand0, QImode) if (!register_operand (operand0, QImode)
&& !register_operand(operand1, QImode)) && !register_operand (operand1, QImode))
{ {
operands[1] = copy_to_mode_reg(QImode, operand1); operands[1] = copy_to_mode_reg (QImode, operand1);
} }
}") }")
...@@ -208,11 +208,11 @@ ...@@ -208,11 +208,11 @@
"" ""
" "
{ {
/* One of the ops has to be in a register */ /* One of the ops has to be in a register. */
if (!register_operand(operand1, HImode) if (!register_operand (operand1, HImode)
&& !register_operand(operand0, HImode)) && !register_operand (operand0, HImode))
{ {
operands[1] = copy_to_mode_reg(HImode, operand1); operands[1] = copy_to_mode_reg (HImode, operand1);
} }
}") }")
...@@ -426,13 +426,13 @@ ...@@ -426,13 +426,13 @@
if (val == (val & 0xff)) if (val == (val & 0xff))
{ {
operands[1] = GEN_INT ((char) val & 0xff); operands[1] = GEN_INT ((char) val & 0xff);
return \"sub.l %S0,%S0\;add.b %1,%w0\"; return \"sub.l\\t%S0,%S0\;add.b\\t%1,%w0\";
} }
if (val == (val & 0xff00)) if (val == (val & 0xff00))
{ {
operands[1] = GEN_INT ((char) (val >> 8) & 0xff); operands[1] = GEN_INT ((char) (val >> 8) & 0xff);
return \"sub.l %S0,%S0\;add.b %1,%x0\"; return \"sub.l\\t%S0,%S0\;add.b\\t%1,%x0\";
} }
/* Now look for small negative numbers. We can subtract them /* Now look for small negative numbers. We can subtract them
...@@ -440,7 +440,7 @@ ...@@ -440,7 +440,7 @@
if (val == -4 || val == -2 || val == -1) if (val == -4 || val == -2 || val == -1)
{ {
operands[1] = GEN_INT (-INTVAL (operands[1])); operands[1] = GEN_INT (-INTVAL (operands[1]));
return \"sub.l %S0,%S0\;subs %1,%S0\"; return \"sub.l\\t%S0,%S0\;subs\\t%1,%S0\";
} }
} }
} }
...@@ -2257,4 +2257,3 @@ ...@@ -2257,4 +2257,3 @@
"mov.w %T0,@-%T1" "mov.w %T0,@-%T1"
[(set_attr "length" "2") [(set_attr "length" "2")
(set_attr "cc" "set_znv")]) (set_attr "cc" "set_znv")])
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