Commit 19af6455 by Bernd Schmidt Committed by Bernd Schmidt

Delete !REGISTER_CONSTRAINTS code

From-SVN: r29753
parent 39d6e3d7
Fri Oct 1 10:56:06 1999 Bernd Schmidt <bernds@cygnus.co.uk>
* Makefile.in (genattrtab.o): Don't depend on "insn-config.h".
* final.c (final_scan_insn): We always have register constraints.
* genattrtab.c: Don't include "insn-config.h".
(write_attr_case): We always have register constraints.
* genconfig.c (register_constraint_flag): Delete.
(walk_insn_part): Don't check whether we have register constraints.
(main): Don't write out "#define REGISTER_CONSTRAINTS".
* genoutput.c (have_constraints): Delete.
(main): Don't set it.
(output_operand_data): We always have constraints.
(scan_operands): Likewise.
(compare_operands): Likewise.
* local-alloc.c (block_alloc): We always have constraints.
(requires_inout): Always compile this function.
* recog.c (extract_insn): We always have constraints.
(constrain_operands, reg_fits_class_p): Always compile these
functions.
* recog.h (struct recog_data): Delete non-REGISTER_CONSTRAINTS
fields.
(struct insn_operand_data): Likewise.
* regclass.c (regclass): We always have constraints.
(record_reg_classes, copy_cost, record_address_regs,
auto_inc_dec_reg_p): Always compile these functions.
* regmove.c (regmove_optimize): We always have constraints.
* reload.c (find_reloads): Likewise.
* reload1.c (reload): Likewise.
(reload_cse_simplify_operands): Likewise.
* i860.c (output_delay_insn): Likewise.
Thu Sep 30 23:04:41 1999 Mark P. Mitchell <mark@codesourcery.com> Thu Sep 30 23:04:41 1999 Mark P. Mitchell <mark@codesourcery.com>
* iris6.h (BUILD_VA_LIST_TYPE): Define. * iris6.h (BUILD_VA_LIST_TYPE): Define.
......
...@@ -1844,7 +1844,7 @@ genattrtab : genattrtab.o $(HOST_RTL) $(HOST_PRINT) $(HOST_ERRORS) $(HOST_RTLANA ...@@ -1844,7 +1844,7 @@ genattrtab : genattrtab.o $(HOST_RTL) $(HOST_PRINT) $(HOST_ERRORS) $(HOST_RTLANA
$(HOST_CC) $(HOST_CFLAGS) $(HOST_LDFLAGS) -o $@ \ $(HOST_CC) $(HOST_CFLAGS) $(HOST_LDFLAGS) -o $@ \
genattrtab.o $(HOST_RTL) $(HOST_PRINT) $(HOST_ERRORS) $(HOST_RTLANAL) $(HOST_LIBS) genattrtab.o $(HOST_RTL) $(HOST_PRINT) $(HOST_ERRORS) $(HOST_RTLANAL) $(HOST_LIBS)
genattrtab.o : genattrtab.c $(RTL_H) $(build_xm_file) system.h insn-config.h errors.h ggc.h genattrtab.o : genattrtab.c $(RTL_H) $(build_xm_file) system.h errors.h ggc.h
$(HOST_CC) -c $(HOST_CFLAGS) $(HOST_CPPFLAGS) $(INCLUDES) $(srcdir)/genattrtab.c $(HOST_CC) -c $(HOST_CFLAGS) $(HOST_CPPFLAGS) $(INCLUDES) $(srcdir)/genattrtab.c
genoutput : genoutput.o $(HOST_RTL) $(HOST_PRINT) $(HOST_ERRORS) $(HOST_LIBDEPS) genoutput : genoutput.o $(HOST_RTL) $(HOST_PRINT) $(HOST_ERRORS) $(HOST_LIBDEPS)
......
...@@ -1493,10 +1493,8 @@ output_delay_insn (delay_insn) ...@@ -1493,10 +1493,8 @@ output_delay_insn (delay_insn)
recog_data.operand[i] = alter_subreg (recog_data.operand[i]); recog_data.operand[i] = alter_subreg (recog_data.operand[i]);
} }
#ifdef REGISTER_CONSTRAINTS
if (! constrain_operands (1)) if (! constrain_operands (1))
abort (); abort ();
#endif
cc_prev_status = cc_status; cc_prev_status = cc_status;
......
...@@ -2886,10 +2886,8 @@ final_scan_insn (insn, file, optimize, prescan, nopeepholes) ...@@ -2886,10 +2886,8 @@ final_scan_insn (insn, file, optimize, prescan, nopeepholes)
extract_insn (insn); extract_insn (insn);
cleanup_subreg_operands (insn); cleanup_subreg_operands (insn);
#ifdef REGISTER_CONSTRAINTS
if (! constrain_operands (1)) if (! constrain_operands (1))
fatal_insn_not_found (insn); fatal_insn_not_found (insn);
#endif
/* Some target machines need to prescan each insn before /* Some target machines need to prescan each insn before
it is output. */ it is output. */
......
...@@ -98,7 +98,6 @@ Boston, MA 02111-1307, USA. */ ...@@ -98,7 +98,6 @@ Boston, MA 02111-1307, USA. */
#include "hconfig.h" #include "hconfig.h"
#include "system.h" #include "system.h"
#include "rtl.h" #include "rtl.h"
#include "insn-config.h" /* For REGISTER_CONSTRAINTS */
#include "ggc.h" #include "ggc.h"
#ifdef HAVE_SYS_RESOURCE_H #ifdef HAVE_SYS_RESOURCE_H
...@@ -5128,12 +5127,10 @@ write_attr_case (attr, av, write_case_lines, prefix, suffix, indent, ...@@ -5128,12 +5127,10 @@ write_attr_case (attr, av, write_case_lines, prefix, suffix, indent,
if (must_constrain) if (must_constrain)
{ {
#ifdef REGISTER_CONSTRAINTS
write_indent (indent + 2); write_indent (indent + 2);
printf ("if (! constrain_operands (reload_completed))\n"); printf ("if (! constrain_operands (reload_completed))\n");
write_indent (indent + 2); write_indent (indent + 2);
printf (" fatal_insn_not_found (insn);\n"); printf (" fatal_insn_not_found (insn);\n");
#endif
} }
write_attr_set (attr, indent + 2, av->value, prefix, suffix, write_attr_set (attr, indent + 2, av->value, prefix, suffix,
......
...@@ -36,7 +36,6 @@ struct obstack *rtl_obstack = &obstack; ...@@ -36,7 +36,6 @@ struct obstack *rtl_obstack = &obstack;
static int max_recog_operands; /* Largest operand number seen. */ static int max_recog_operands; /* Largest operand number seen. */
static int max_dup_operands; /* Largest number of match_dup in any insn. */ static int max_dup_operands; /* Largest number of match_dup in any insn. */
static int max_clobbers_per_insn; static int max_clobbers_per_insn;
static int register_constraint_flag;
static int have_cc0_flag; static int have_cc0_flag;
static int have_cmove_flag; static int have_cmove_flag;
static int have_cond_arith_flag; static int have_cond_arith_flag;
...@@ -85,8 +84,6 @@ walk_insn_part (part, recog_p, non_pc_set_src) ...@@ -85,8 +84,6 @@ walk_insn_part (part, recog_p, non_pc_set_src)
case MATCH_OPERAND: case MATCH_OPERAND:
if (XINT (part, 0) > max_recog_operands) if (XINT (part, 0) > max_recog_operands)
max_recog_operands = XINT (part, 0); max_recog_operands = XINT (part, 0);
if (XSTR (part, 2) && *XSTR (part, 2))
register_constraint_flag = 1;
return; return;
case MATCH_OP_DUP: case MATCH_OP_DUP:
...@@ -345,9 +342,6 @@ from the machine description file `md'. */\n\n"); ...@@ -345,9 +342,6 @@ from the machine description file `md'. */\n\n");
printf ("#ifndef MAX_INSNS_PER_SPLIT\n#define MAX_INSNS_PER_SPLIT %d\n#endif\n", printf ("#ifndef MAX_INSNS_PER_SPLIT\n#define MAX_INSNS_PER_SPLIT %d\n#endif\n",
max_insns_per_split); max_insns_per_split);
if (register_constraint_flag)
printf ("#define REGISTER_CONSTRAINTS\n");
if (have_cc0_flag) if (have_cc0_flag)
printf ("#define HAVE_cc0\n"); printf ("#define HAVE_cc0\n");
......
...@@ -170,12 +170,6 @@ struct data ...@@ -170,12 +170,6 @@ struct data
static struct data *idata, **idata_end = &idata; static struct data *idata, **idata_end = &idata;
/* Nonzero if any match_operand has a constraint string; implies that
REGISTER_CONSTRAINTS will be defined for this machine description. */
static int have_constraints;
static void output_prologue PROTO((void)); static void output_prologue PROTO((void));
static void output_predicate_decls PROTO((void)); static void output_predicate_decls PROTO((void));
static void output_operand_data PROTO((void)); static void output_operand_data PROTO((void));
...@@ -289,17 +283,10 @@ output_operand_data () ...@@ -289,17 +283,10 @@ output_operand_data ()
printf (" %s,\n", printf (" %s,\n",
d->predicate && d->predicate[0] ? d->predicate : "0"); d->predicate && d->predicate[0] ? d->predicate : "0");
if (have_constraints) printf (" \"%s\",\n", d->constraint ? d->constraint : "");
{
printf (" \"%s\",\n",
d->constraint ? d->constraint : "");
}
printf (" %smode,\n", GET_MODE_NAME (d->mode)); printf (" %smode,\n", GET_MODE_NAME (d->mode));
if (! have_constraints)
printf (" %d,\n", d->address_p);
printf (" %d\n", d->strict_low); printf (" %d\n", d->strict_low);
printf(" },\n"); printf(" },\n");
...@@ -446,11 +433,8 @@ scan_operands (d, part, this_address_p, this_strict_low) ...@@ -446,11 +433,8 @@ scan_operands (d, part, this_address_p, this_strict_low)
d->operand[opno].predicate = XSTR (part, 1); d->operand[opno].predicate = XSTR (part, 1);
d->operand[opno].constraint = XSTR (part, 2); d->operand[opno].constraint = XSTR (part, 2);
if (XSTR (part, 2) != 0 && *XSTR (part, 2) != 0) if (XSTR (part, 2) != 0 && *XSTR (part, 2) != 0)
{
d->operand[opno].n_alternatives d->operand[opno].n_alternatives
= n_occurrences (',', XSTR (part, 2)) + 1; = n_occurrences (',', XSTR (part, 2)) + 1;
have_constraints = 1;
}
d->operand[opno].address_p = this_address_p; d->operand[opno].address_p = this_address_p;
return; return;
...@@ -473,11 +457,8 @@ scan_operands (d, part, this_address_p, this_strict_low) ...@@ -473,11 +457,8 @@ scan_operands (d, part, this_address_p, this_strict_low)
d->operand[opno].predicate = "scratch_operand"; d->operand[opno].predicate = "scratch_operand";
d->operand[opno].constraint = XSTR (part, 1); d->operand[opno].constraint = XSTR (part, 1);
if (XSTR (part, 1) != 0 && *XSTR (part, 1) != 0) if (XSTR (part, 1) != 0 && *XSTR (part, 1) != 0)
{
d->operand[opno].n_alternatives d->operand[opno].n_alternatives
= n_occurrences (',', XSTR (part, 1)) + 1; = n_occurrences (',', XSTR (part, 1)) + 1;
have_constraints = 1;
}
d->operand[opno].address_p = 0; d->operand[opno].address_p = 0;
return; return;
...@@ -557,8 +538,6 @@ compare_operands (d0, d1) ...@@ -557,8 +538,6 @@ compare_operands (d0, d1)
if (strcmp (p0, p1) != 0) if (strcmp (p0, p1) != 0)
return 0; return 0;
if (have_constraints)
{
p0 = d0->constraint; p0 = d0->constraint;
if (!p0) if (!p0)
p0 = ""; p0 = "";
...@@ -567,15 +546,10 @@ compare_operands (d0, d1) ...@@ -567,15 +546,10 @@ compare_operands (d0, d1)
p1 = ""; p1 = "";
if (strcmp (p0, p1) != 0) if (strcmp (p0, p1) != 0)
return 0; return 0;
}
if (d0->mode != d1->mode) if (d0->mode != d1->mode)
return 0; return 0;
if (!have_constraints)
if (d0->address_p != d1->address_p)
return 0;
if (d0->strict_low != d1->strict_low) if (d0->strict_low != d1->strict_low)
return 0; return 0;
...@@ -937,7 +911,6 @@ main (argc, argv) ...@@ -937,7 +911,6 @@ main (argc, argv)
output_prologue (); output_prologue ();
next_code_number = 0; next_code_number = 0;
next_index_number = 0; next_index_number = 0;
have_constraints = 0;
/* Read the machine description. */ /* Read the machine description. */
......
...@@ -1082,9 +1082,6 @@ block_alloc (b) ...@@ -1082,9 +1082,6 @@ block_alloc (b)
register rtx r0, r1; register rtx r0, r1;
int combined_regno = -1; int combined_regno = -1;
int i; int i;
#ifndef REGISTER_CONSTRAINTS
register rtx body = PATTERN (insn);
#endif
this_insn_number = insn_number; this_insn_number = insn_number;
this_insn = insn; this_insn = insn;
...@@ -1110,18 +1107,10 @@ block_alloc (b) ...@@ -1110,18 +1107,10 @@ block_alloc (b)
If tying is done, WIN is set nonzero. */ If tying is done, WIN is set nonzero. */
if (1 if (recog_data.n_operands > 1
#ifdef REGISTER_CONSTRAINTS
&& recog_data.n_operands > 1
&& recog_data.constraints[0][0] == '=' && recog_data.constraints[0][0] == '='
&& recog_data.constraints[0][1] != '&' && recog_data.constraints[0][1] != '&')
#else
&& GET_CODE (PATTERN (insn)) == SET
&& rtx_equal_p (SET_DEST (PATTERN (insn)), recog_data.operand[0])
#endif
)
{ {
#ifdef REGISTER_CONSTRAINTS
/* If non-negative, is an operand that must match operand 0. */ /* If non-negative, is an operand that must match operand 0. */
int must_match_0 = -1; int must_match_0 = -1;
/* Counts number of alternatives that require a match with /* Counts number of alternatives that require a match with
...@@ -1137,12 +1126,10 @@ block_alloc (b) ...@@ -1137,12 +1126,10 @@ block_alloc (b)
if (this_match == recog_data.n_alternatives) if (this_match == recog_data.n_alternatives)
must_match_0 = i; must_match_0 = i;
} }
#endif
r0 = recog_data.operand[0]; r0 = recog_data.operand[0];
for (i = 1; i < recog_data.n_operands; i++) for (i = 1; i < recog_data.n_operands; i++)
{ {
#ifdef REGISTER_CONSTRAINTS
/* Skip this operand if we found an operand that /* Skip this operand if we found an operand that
must match operand 0 and this operand isn't it must match operand 0 and this operand isn't it
and can't be made to be it by commutativity. */ and can't be made to be it by commutativity. */
...@@ -1162,20 +1149,13 @@ block_alloc (b) ...@@ -1162,20 +1149,13 @@ block_alloc (b)
if (n_matching_alts == recog_data.n_alternatives if (n_matching_alts == recog_data.n_alternatives
&& 0 == requires_inout (recog_data.constraints[i])) && 0 == requires_inout (recog_data.constraints[i]))
continue; continue;
#endif
r1 = recog_data.operand[i]; r1 = recog_data.operand[i];
/* If the operand is an address, find a register in it. /* If the operand is an address, find a register in it.
There may be more than one register, but we only try one There may be more than one register, but we only try one
of them. */ of them. */
if ( if (recog_data.constraints[i][0] == 'p')
#ifdef REGISTER_CONSTRAINTS
recog_data.constraints[i][0] == 'p'
#else
recog_data.operand_address_p[i]
#endif
)
while (GET_CODE (r1) == PLUS || GET_CODE (r1) == MULT) while (GET_CODE (r1) == PLUS || GET_CODE (r1) == MULT)
r1 = XEXP (r1, 0); r1 = XEXP (r1, 0);
...@@ -1186,11 +1166,7 @@ block_alloc (b) ...@@ -1186,11 +1166,7 @@ block_alloc (b)
can only be in the same register as the output, give can only be in the same register as the output, give
priority to an equivalence found from that insn. */ priority to an equivalence found from that insn. */
int may_save_copy int may_save_copy
#ifdef REGISTER_CONSTRAINTS
= (r1 == recog_data.operand[i] && must_match_0 >= 0); = (r1 == recog_data.operand[i] && must_match_0 >= 0);
#else
= (SET_DEST (body) == r0 && SET_SRC (body) == r1);
#endif
if (GET_CODE (r1) == REG || GET_CODE (r1) == SUBREG) if (GET_CODE (r1) == REG || GET_CODE (r1) == SUBREG)
win = combine_regs (r1, r0, may_save_copy, win = combine_regs (r1, r0, may_save_copy,
...@@ -2199,8 +2175,6 @@ no_conflict_p (insn, r0, r1) ...@@ -2199,8 +2175,6 @@ no_conflict_p (insn, r0, r1)
return ok; return ok;
} }
#ifdef REGISTER_CONSTRAINTS
/* Return the number of alternatives for which the constraint string P /* Return the number of alternatives for which the constraint string P
indicates that the operand must be equal to operand 0 and that no register indicates that the operand must be equal to operand 0 and that no register
is acceptable. */ is acceptable. */
...@@ -2257,7 +2231,6 @@ requires_inout (p) ...@@ -2257,7 +2231,6 @@ requires_inout (p)
return num_matching_alts; return num_matching_alts;
} }
#endif /* REGISTER_CONSTRAINTS */
void void
dump_local_alloc (file) dump_local_alloc (file)
......
...@@ -2012,10 +2012,6 @@ extract_insn (insn) ...@@ -2012,10 +2012,6 @@ extract_insn (insn)
while (*p) while (*p)
recog_data.n_alternatives += (*p++ == ','); recog_data.n_alternatives += (*p++ == ',');
} }
#ifndef REGISTER_CONSTRAINTS
bzero (recog_data.operand_address_p,
sizeof recog_data.operand_address_p);
#endif
break; break;
} }
...@@ -2037,12 +2033,7 @@ extract_insn (insn) ...@@ -2037,12 +2033,7 @@ extract_insn (insn)
for (i = 0; i < noperands; i++) for (i = 0; i < noperands; i++)
{ {
#ifdef REGISTER_CONSTRAINTS
recog_data.constraints[i] = insn_data[icode].operand[i].constraint; recog_data.constraints[i] = insn_data[icode].operand[i].constraint;
#else
recog_data.operand_address_p[i]
= insn_data[icode].operand[i].address_p;
#endif
recog_data.operand_mode[i] = insn_data[icode].operand[i].mode; recog_data.operand_mode[i] = insn_data[icode].operand[i].mode;
} }
} }
...@@ -2161,8 +2152,6 @@ preprocess_constraints () ...@@ -2161,8 +2152,6 @@ preprocess_constraints ()
} }
} }
#ifdef REGISTER_CONSTRAINTS
/* Check the operands of an insn against the insn's operand constraints /* Check the operands of an insn against the insn's operand constraints
and return 1 if they are valid. and return 1 if they are valid.
The information about the insn's operands, constraints, operand modes The information about the insn's operands, constraints, operand modes
...@@ -2573,8 +2562,6 @@ reg_fits_class_p (operand, class, offset, mode) ...@@ -2573,8 +2562,6 @@ reg_fits_class_p (operand, class, offset, mode)
return 0; return 0;
} }
#endif /* REGISTER_CONSTRAINTS */
/* Do the splitting of insns in the block B. Only try to actually split if /* Do the splitting of insns in the block B. Only try to actually split if
DO_SPLIT is true; otherwise, just remove nops. */ DO_SPLIT is true; otherwise, just remove nops. */
......
...@@ -158,11 +158,6 @@ struct recog_data ...@@ -158,11 +158,6 @@ struct recog_data
duplicate-appearance of an operand. */ duplicate-appearance of an operand. */
char dup_num[MAX_DUP_OPERANDS]; char dup_num[MAX_DUP_OPERANDS];
#ifndef REGISTER_CONSTRAINTS
/* Nonzero if operand N should be an address. */
char operand_address_p[MAX_RECOG_OPERANDS];
#endif
/* ??? Note that these are `char' instead of `unsigned char' to (try to) /* ??? Note that these are `char' instead of `unsigned char' to (try to)
avoid certain lossage from K&R C, wherein `unsigned char' default avoid certain lossage from K&R C, wherein `unsigned char' default
promotes to `unsigned int' instead of `int' as in ISO C. As of 1999, promotes to `unsigned int' instead of `int' as in ISO C. As of 1999,
...@@ -208,16 +203,10 @@ struct insn_operand_data ...@@ -208,16 +203,10 @@ struct insn_operand_data
{ {
insn_operand_predicate_fn predicate; insn_operand_predicate_fn predicate;
#ifdef REGISTER_CONSTRAINTS
const char *constraint; const char *constraint;
#endif
enum machine_mode mode; enum machine_mode mode;
#ifndef REGISTER_CONSTRAINTS
char address_p;
#endif
char strict_low; char strict_low;
}; };
......
...@@ -955,7 +955,6 @@ regclass (f, nregs) ...@@ -955,7 +955,6 @@ regclass (f, nregs)
rtx f; rtx f;
int nregs; int nregs;
{ {
#ifdef REGISTER_CONSTRAINTS
register rtx insn; register rtx insn;
register int i; register int i;
int pass; int pass;
...@@ -1109,13 +1108,10 @@ regclass (f, nregs) ...@@ -1109,13 +1108,10 @@ regclass (f, nregs)
altclass[i] = (int) alt; altclass[i] = (int) alt;
} }
} }
#endif /* REGISTER_CONSTRAINTS */
free (costs); free (costs);
} }
#ifdef REGISTER_CONSTRAINTS
/* Record the cost of using memory or registers of various classes for /* Record the cost of using memory or registers of various classes for
the operands in INSN. the operands in INSN.
...@@ -1818,8 +1814,6 @@ auto_inc_dec_reg_p (reg, mode) ...@@ -1818,8 +1814,6 @@ auto_inc_dec_reg_p (reg, mode)
} }
#endif #endif
#endif /* REGISTER_CONSTRAINTS */
static short *renumber = (short *)0; static short *renumber = (short *)0;
static size_t regno_allocated = 0; static size_t regno_allocated = 0;
......
...@@ -1166,7 +1166,6 @@ regmove_optimize (f, nregs, regmove_dump_file) ...@@ -1166,7 +1166,6 @@ regmove_optimize (f, nregs, regmove_dump_file)
if (! flag_regmove) if (! flag_regmove)
continue; continue;
#ifdef REGISTER_CONSTRAINTS
if (! find_matches (insn, &match)) if (! find_matches (insn, &match))
continue; continue;
...@@ -1556,7 +1555,6 @@ regmove_optimize (f, nregs, regmove_dump_file) ...@@ -1556,7 +1555,6 @@ regmove_optimize (f, nregs, regmove_dump_file)
} }
} }
#endif /* REGISTER_CONSTRAINTS */
/* In fixup_match_1, some insns may have been inserted after basic block /* In fixup_match_1, some insns may have been inserted after basic block
ends. Fix that here. */ ends. Fix that here. */
......
...@@ -2353,8 +2353,6 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) ...@@ -2353,8 +2353,6 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
int live_known; int live_known;
short *reload_reg_p; short *reload_reg_p;
{ {
#ifdef REGISTER_CONSTRAINTS
register int insn_code_number; register int insn_code_number;
register int i, j; register int i, j;
int noperands; int noperands;
...@@ -4175,74 +4173,6 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) ...@@ -4175,74 +4173,6 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
} }
} }
#else /* no REGISTER_CONSTRAINTS */
int noperands;
int insn_code_number;
int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
register int i;
rtx body = PATTERN (insn);
int retval = 0;
n_reloads = 0;
n_replacements = 0;
n_earlyclobbers = 0;
replace_reloads = replace;
this_insn = insn;
extract_insn (insn);
noperands = reload_n_operands = recog_data.n_operands;
/* Return if the insn needs no reload processing. */
if (noperands == 0)
return;
for (i = 0; i < noperands; i++)
{
register RTX_CODE code = GET_CODE (recog_data.operand[i]);
int is_set_dest = GET_CODE (body) == SET && (i == 0);
if (insn_code_number >= 0)
if (insn_data[insn_code_number].operand[i].address_p)
find_reloads_address (VOIDmode, NULL_PTR,
recog_data.operand[i],
recog_data.operand_loc[i],
i, RELOAD_FOR_INPUT, ind_levels, insn);
/* In these cases, we can't tell if the operand is an input
or an output, so be conservative. In practice it won't be
problem. */
if (code == MEM)
find_reloads_address (GET_MODE (recog_data.operand[i]),
recog_data.operand_loc[i],
XEXP (recog_data.operand[i], 0),
&XEXP (recog_data.operand[i], 0),
i, RELOAD_OTHER, ind_levels, insn);
if (code == SUBREG)
recog_data.operand[i] = *recog_data.operand_loc[i]
= find_reloads_toplev (recog_data.operand[i], i, RELOAD_OTHER,
ind_levels, is_set_dest);
if (code == REG)
{
register int regno = REGNO (recog_data.operand[i]);
if (reg_equiv_constant[regno] != 0 && !is_set_dest)
recog_data.operand[i] = *recog_data.operand_loc[i]
= reg_equiv_constant[regno];
#if 0 /* This might screw code in reload1.c to delete prior output-reload
that feeds this insn. */
if (reg_equiv_mem[regno] != 0)
recog_data.operand[i] = *recog_data.operand_loc[i]
= reg_equiv_mem[regno];
#endif
}
}
/* Perhaps an output reload can be combined with another
to reduce needs by one. */
if (!goal_earlyclobber)
combine_reloads ();
#endif /* no REGISTER_CONSTRAINTS */
return retval; return retval;
} }
......
...@@ -801,34 +801,6 @@ reload (first, global, dumpfile) ...@@ -801,34 +801,6 @@ reload (first, global, dumpfile)
|| GET_CODE (insn) == CALL_INSN) || GET_CODE (insn) == CALL_INSN)
note_stores (PATTERN (insn), mark_not_eliminable); note_stores (PATTERN (insn), mark_not_eliminable);
#ifndef REGISTER_CONSTRAINTS
/* If all the pseudo regs have hard regs,
except for those that are never referenced,
we know that no reloads are needed. */
/* But that is not true if there are register constraints, since
in that case some pseudos might be in the wrong kind of hard reg. */
for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
if (reg_renumber[i] == -1 && REG_N_REFS (i) != 0)
break;
if (i == max_regno && num_eliminable == 0 && ! caller_save_needed)
{
free (real_known_ptr);
free (real_at_ptr);
free (reg_equiv_constant);
free (reg_equiv_memory_loc);
free (reg_equiv_mem);
free (reg_equiv_init);
free (reg_equiv_address);
free (reg_max_ref_width);
free (reg_old_renumber);
free (pseudo_previous_regs);
free (pseudo_forbidden_regs);
return 0;
}
#endif
maybe_fix_stack_asms (); maybe_fix_stack_asms ();
insns_need_reload = 0; insns_need_reload = 0;
...@@ -9126,7 +9098,6 @@ static int ...@@ -9126,7 +9098,6 @@ static int
reload_cse_simplify_operands (insn) reload_cse_simplify_operands (insn)
rtx insn; rtx insn;
{ {
#ifdef REGISTER_CONSTRAINTS
int i,j; int i,j;
const char *constraints[MAX_RECOG_OPERANDS]; const char *constraints[MAX_RECOG_OPERANDS];
...@@ -9334,9 +9305,6 @@ reload_cse_simplify_operands (insn) ...@@ -9334,9 +9305,6 @@ reload_cse_simplify_operands (insn)
push_obstacks (&reload_obstack, &reload_obstack); push_obstacks (&reload_obstack, &reload_obstack);
return apply_change_group (); return apply_change_group ();
#else
return 0;
#endif
} }
/* These two variables are used to pass information from /* These two variables are used to pass information from
......
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