Add loongson3a integer mul/div patterns

From-SVN: r167107

gcc/ChangeLog

+2010-11-24  Mingjie Xing  <mingjie.xing@gmail.com>
+
+	* config/mips/loongson.md: Change the description comment of the file
+	and update the copyright years.
+	(define_insn "<u>div<mode>3): Add loongson3a support.
+	(define_insn "<u>mod<mode>3"): Likewise.
+	* config/mips/mips.md: Rename mul<mode>3_mul3_ls2ef to
+	mul<mode>3_mul3_loongson.
+	(define_expand "mul<mode>3"): Add TARGET_LOONGSON_3A.
+	(define_insn "mul<mode>3_mul3_loongson"): Add loongson3a support.
+
 2010-11-23  Joseph Myers  <joseph@codesourcery.com>
 
 	* common.opt (initial_max_fld_align, flag_debug_asm,

gcc/config/mips/loongson.md

-;; Machine description for ST Microelectronics Loongson-2E/2F.
-;; Copyright (C) 2008, 2009 Free Software Foundation, Inc.
+;; Machine description for Loongson-specific patterns, such as
+;; ST Microelectronics Loongson-2E/2F etc.
+;; Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
 ;; Contributed by CodeSourcery.
 ;;
 ;; This file is part of GCC.
@@ -497,14 +498,19 @@
   "punpckl<V_stretch_half_suffix>\t%0,%1,%2"
   [(set_attr "type" "fdiv")])
 
-;; Integer division and modulus.
+;; Integer division and modulus.  For integer multiplication, see mips.md.
 
 (define_insn "<u>div<mode>3"
   [(set (match_operand:GPR 0 "register_operand" "=&d")
 	(any_div:GPR (match_operand:GPR 1 "register_operand" "d")
 		     (match_operand:GPR 2 "register_operand" "d")))]
-  "TARGET_LOONGSON_2EF"
-  { return mips_output_division ("<d>div<u>.g\t%0,%1,%2", operands); }
+  "TARGET_LOONGSON_2EF || TARGET_LOONGSON_3A"
+  {
+    if (TARGET_LOONGSON_2EF)
+      return mips_output_division ("<d>div<u>.g\t%0,%1,%2", operands);
+    else
+      return mips_output_division ("gs<d>div<u>\t%0,%1,%2", operands);
+  }
   [(set_attr "type" "idiv3")
    (set_attr "mode" "<MODE>")])
 
@@ -512,7 +518,12 @@
   [(set (match_operand:GPR 0 "register_operand" "=&d")
 	(any_mod:GPR (match_operand:GPR 1 "register_operand" "d")
 		     (match_operand:GPR 2 "register_operand" "d")))]
-  "TARGET_LOONGSON_2EF"
-  { return mips_output_division ("<d>mod<u>.g\t%0,%1,%2", operands); }
+  "TARGET_LOONGSON_2EF || TARGET_LOONGSON_3A"
+  {
+    if (TARGET_LOONGSON_2EF)
+      return mips_output_division ("<d>mod<u>.g\t%0,%1,%2", operands);
+    else
+      return mips_output_division ("gs<d>mod<u>\t%0,%1,%2", operands);
+  }
   [(set_attr "type" "idiv3")
    (set_attr "mode" "<MODE>")])

gcc/config/mips/mips.md

@@ -1324,8 +1324,8 @@
 		  (match_operand:GPR 2 "register_operand")))]
   ""
 {
-  if (TARGET_LOONGSON_2EF)
-    emit_insn (gen_mul<mode>3_mul3_ls2ef (operands[0], operands[1],
+  if (TARGET_LOONGSON_2EF || TARGET_LOONGSON_3A)
+    emit_insn (gen_mul<mode>3_mul3_loongson (operands[0], operands[1],
                                              operands[2]));
   else if (ISA_HAS_<D>MUL3)
     emit_insn (gen_mul<mode>3_mul3 (operands[0], operands[1], operands[2]));
@@ -1337,12 +1337,17 @@
   DONE;
 })
 
-(define_insn "mul<mode>3_mul3_ls2ef"
+(define_insn "mul<mode>3_mul3_loongson"
   [(set (match_operand:GPR 0 "register_operand" "=d")
         (mult:GPR (match_operand:GPR 1 "register_operand" "d")
                   (match_operand:GPR 2 "register_operand" "d")))]
-  "TARGET_LOONGSON_2EF"
-  "<d>multu.g\t%0,%1,%2"
+  "TARGET_LOONGSON_2EF || TARGET_LOONGSON_3A"
+{
+  if (TARGET_LOONGSON_2EF)
+    return "<d>multu.g\t%0,%1,%2";
+  else
+    return "gs<d>multu\t%0,%1,%2";
+}
   [(set_attr "type" "imul3nc")
    (set_attr "mode" "<MODE>")])
 

gcc/testsuite/ChangeLog

+2010-11-24  Mingjie Xing  <mingjie.xing@gmail.com>
+
+	* gcc.target/mips/loongson3a-muldiv-1.c: New test.
+	* gcc.target/mips/loongson3a-muldiv-2.c: New test.
+
 2010-11-23  Joseph Myers  <joseph@codesourcery.com>
 
 	* gcc.dg/opts-5.c: New test.

gcc/testsuite/gcc.target/mips/loongson3a-muldiv-1.c

+/* { dg-options "-O2 -march=loongson3a" } */
+
+typedef int st;
+typedef unsigned int ut;
+
+NOMIPS16 st smul (st x, st y) { return x * y; }
+NOMIPS16 st sdiv (st x, st y) { return x / y + x % y; }
+
+NOMIPS16 ut umul (ut x, ut y) { return x * y; }
+NOMIPS16 ut udiv (ut x, ut y) { return x / y + x % y; }
+
+/* { dg-final { scan-assembler-times "\tgsmultu\t" 2 } } */
+/* { dg-final { scan-assembler-times "\tgsdivu\t" 1 } } */
+/* { dg-final { scan-assembler-times "\tgsmodu\t" 1 } } */
+/* { dg-final { scan-assembler-times "\tgsdiv\t" 1 } } */
+/* { dg-final { scan-assembler-times "\tgsmod\t" 1 } } */

gcc/testsuite/gcc.target/mips/loongson3a-muldiv-2.c

+/* { dg-options "-O2 -march=loongson3a -mgp64" } */
+
+typedef long long st;
+typedef unsigned long long ut;
+
+NOMIPS16 st smul (st x, st y) { return x * y; }
+NOMIPS16 st sdiv (st x, st y) { return x / y + x % y; }
+
+NOMIPS16 ut umul (ut x, ut y) { return x * y; }
+NOMIPS16 ut udiv (ut x, ut y) { return x / y + x % y; }
+
+/* { dg-final { scan-assembler-times "\tgsdmultu\t" 2 } } */
+/* { dg-final { scan-assembler-times "\tgsddivu\t" 1 } } */
+/* { dg-final { scan-assembler-times "\tgsdmodu\t" 1 } } */
+/* { dg-final { scan-assembler-times "\tgsddiv\t" 1 } } */
+/* { dg-final { scan-assembler-times "\tgsdmod\t" 1 } } */