Commit 16cc4440 by Uros Bizjak

i386.md (float<SSEMODEI24:mode><X87MODEF:mode>2): Rewrite using indirect functions.

	* config/i386/i386.md (float<SSEMODEI24:mode><X87MODEF:mode>2):
	Rewrite using indirect functions.
	(lwp_slwpcb): Ditto.
	* config/i386/sse.md (avx_vextractf128<mode>): Ditto.
	(avx_vinsertf128<mode>): Ditto.

From-SVN: r171169
parent f2c779bb
2011-03-18 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (float<SSEMODEI24:mode><X87MODEF:mode>2):
Rewrite using indirect functions.
(lwp_slwpcb): Ditto.
* config/i386/sse.md (avx_vextractf128<mode>): Ditto.
(avx_vinsertf128<mode>): Ditto.
2011-03-18 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 2011-03-18 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/s390/s390.c (s390_delegitimize_address): Handle GOTOFF * config/s390/s390.c (s390_delegitimize_address): Handle GOTOFF
...@@ -214,8 +222,7 @@ ...@@ -214,8 +222,7 @@
2011-03-16 Jeff Law <law@redhat.com> 2011-03-16 Jeff Law <law@redhat.com>
* tree-vrp.c (identify_jump_threads): Slightly simplify type * tree-vrp.c (identify_jump_threads): Slightly simplify type
check for operands of conditional. Allow type to be a check for operands of conditional. Allow type to be a pointer.
pointer.
2011-03-16 Richard Guenther <rguenther@suse.de> 2011-03-16 Richard Guenther <rguenther@suse.de>
...@@ -470,8 +477,7 @@ ...@@ -470,8 +477,7 @@
2011-03-15 Richard Guenther <rguenther@suse.de> 2011-03-15 Richard Guenther <rguenther@suse.de>
* config/i386/i386.c (ix86_emit_swdivsf): Implement more * config/i386/i386.c (ix86_emit_swdivsf): Implement more efficiently.
efficiently.
2011-03-15 Alan Modra <amodra@gmail.com> 2011-03-15 Alan Modra <amodra@gmail.com>
...@@ -499,8 +505,7 @@ ...@@ -499,8 +505,7 @@
2011-03-14 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> 2011-03-14 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* config/sol2.c (solaris_assemble_visibility): Remove obsolete * config/sol2.c (solaris_assemble_visibility): Remove obsolete URLs.
URLs.
2011-03-14 Jakub Jelinek <jakub@redhat.com> 2011-03-14 Jakub Jelinek <jakub@redhat.com>
......
...@@ -4959,18 +4959,18 @@ ...@@ -4959,18 +4959,18 @@
&& !X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, <SSEMODEI24:MODE>mode)) && !X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, <SSEMODEI24:MODE>mode))
{ {
rtx reg = gen_reg_rtx (XFmode); rtx reg = gen_reg_rtx (XFmode);
rtx insn; rtx (*insn)(rtx, rtx);
emit_insn (gen_float<SSEMODEI24:mode>xf2 (reg, operands[1])); emit_insn (gen_float<SSEMODEI24:mode>xf2 (reg, operands[1]));
if (<X87MODEF:MODE>mode == SFmode) if (<X87MODEF:MODE>mode == SFmode)
insn = gen_truncxfsf2 (operands[0], reg); insn = gen_truncxfsf2;
else if (<X87MODEF:MODE>mode == DFmode) else if (<X87MODEF:MODE>mode == DFmode)
insn = gen_truncxfdf2 (operands[0], reg); insn = gen_truncxfdf2;
else else
gcc_unreachable (); gcc_unreachable ();
emit_insn (insn); emit_insn (insn (operands[0], reg));
DONE; DONE;
} }
}) })
...@@ -18216,10 +18216,13 @@ ...@@ -18216,10 +18216,13 @@
(unspec_volatile [(const_int 0)] UNSPECV_SLWP_INTRINSIC))] (unspec_volatile [(const_int 0)] UNSPECV_SLWP_INTRINSIC))]
"TARGET_LWP" "TARGET_LWP"
{ {
if (TARGET_64BIT) rtx (*insn)(rtx);
emit_insn (gen_lwp_slwpcbdi (operands[0]));
else insn = (TARGET_64BIT
emit_insn (gen_lwp_slwpcbsi (operands[0])); ? gen_lwp_slwpcbdi
: gen_lwp_slwpcbsi);
emit_insn (insn (operands[0]));
DONE; DONE;
}) })
......
...@@ -4122,17 +4122,21 @@ ...@@ -4122,17 +4122,21 @@
(match_operand:SI 2 "const_0_to_1_operand" "")] (match_operand:SI 2 "const_0_to_1_operand" "")]
"TARGET_AVX" "TARGET_AVX"
{ {
rtx (*insn)(rtx, rtx);
switch (INTVAL (operands[2])) switch (INTVAL (operands[2]))
{ {
case 0: case 0:
emit_insn (gen_vec_extract_lo_<mode> (operands[0], operands[1])); insn = gen_vec_extract_lo_<mode>;
break; break;
case 1: case 1:
emit_insn (gen_vec_extract_hi_<mode> (operands[0], operands[1])); insn = gen_vec_extract_hi_<mode>;
break; break;
default: default:
gcc_unreachable (); gcc_unreachable ();
} }
emit_insn (insn (operands[0], operands[1]));
DONE; DONE;
}) })
...@@ -11776,19 +11780,21 @@ ...@@ -11776,19 +11780,21 @@
(match_operand:SI 3 "const_0_to_1_operand" "")] (match_operand:SI 3 "const_0_to_1_operand" "")]
"TARGET_AVX" "TARGET_AVX"
{ {
rtx (*insn)(rtx, rtx, rtx);
switch (INTVAL (operands[3])) switch (INTVAL (operands[3]))
{ {
case 0: case 0:
emit_insn (gen_vec_set_lo_<mode> (operands[0], operands[1], insn = gen_vec_set_lo_<mode>;
operands[2]));
break; break;
case 1: case 1:
emit_insn (gen_vec_set_hi_<mode> (operands[0], operands[1], insn = gen_vec_set_hi_<mode>;
operands[2]));
break; break;
default: default:
gcc_unreachable (); gcc_unreachable ();
} }
emit_insn (insn (operands[0], operands[1], operands[2]));
DONE; DONE;
}) })
......
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