Commit 14bc6742 by Kazu Hirata Committed by Kazu Hirata

lib1.asm: Fix comment formatting.

	* config/mcore/lib1.asm: Fix comment formatting.
	* config/mcore/mcore-elf.h: Likewise.
	* config/mcore/mcore.c: Likewise.
	* config/mcore/mcore.h: Likewise.
	* config/mcore/mcore.md: Likewise.

From-SVN: r75668
parent 3c6e6fbf
2004-01-11 Kazu Hirata <kazu@cs.umass.edu>
* config/mcore/lib1.asm: Fix comment formatting.
* config/mcore/mcore-elf.h: Likewise.
* config/mcore/mcore.c: Likewise.
* config/mcore/mcore.h: Likewise.
* config/mcore/mcore.md: Likewise.
2004-01-10 Zack Weinberg <zack@codesourcery.com> 2004-01-10 Zack Weinberg <zack@codesourcery.com>
* c-decl.c (duplicate_decls): Break apart into... * c-decl.c (duplicate_decls): Break apart into...
......
...@@ -139,7 +139,7 @@ exports_section () \ ...@@ -139,7 +139,7 @@ exports_section () \
#define ENDFILE_SPEC "%{!mno-lsim:-lsim} crtend.o%s crtn.o%s" #define ENDFILE_SPEC "%{!mno-lsim:-lsim} crtend.o%s crtn.o%s"
/* The subroutine calls in the .init and .fini sections create literal /* The subroutine calls in the .init and .fini sections create literal
pools which must be jumped around... */ pools which must be jumped around.... */
#define FORCE_CODE_SECTION_ALIGN asm ("br 1f ; .literals ; 1:"); #define FORCE_CODE_SECTION_ALIGN asm ("br 1f ; .literals ; 1:");
#undef CTORS_SECTION_ASM_OP #undef CTORS_SECTION_ASM_OP
......
...@@ -2570,7 +2570,7 @@ is_cond_candidate (rtx insn) ...@@ -2570,7 +2570,7 @@ is_cond_candidate (rtx insn)
GET_MODE (XEXP (src, 0)) == SImode) GET_MODE (XEXP (src, 0)) == SImode)
return COND_DEC_INSN; return COND_DEC_INSN;
/* some insns that we don't bother with: /* Some insns that we don't bother with:
(set (rx:DI) (ry:DI)) (set (rx:DI) (ry:DI))
(set (rx:DI) (const_int 0)) (set (rx:DI) (const_int 0))
*/ */
......
...@@ -367,7 +367,7 @@ extern int mcore_stack_increment; ...@@ -367,7 +367,7 @@ extern int mcore_stack_increment;
Aside from that, you can include as many other registers as you like. */ Aside from that, you can include as many other registers as you like. */
/* RBE: r15 {link register} not available across calls, /* RBE: r15 {link register} not available across calls,
But we don't mark it that way here... */ But we don't mark it that way here.... */
#define CALL_USED_REGISTERS \ #define CALL_USED_REGISTERS \
/* r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 ap c fp x19 */ \ /* r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 ap c fp x19 */ \
{ 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1} { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1}
...@@ -959,7 +959,7 @@ extern const enum reg_class reg_class_from_letter[]; ...@@ -959,7 +959,7 @@ extern const enum reg_class reg_class_from_letter[];
shouldn't be put through pseudo regs where they can be cse'd. shouldn't be put through pseudo regs where they can be cse'd.
Desirable on machines where ordinary constants are expensive Desirable on machines where ordinary constants are expensive
but a CALL with constant address is cheap. */ but a CALL with constant address is cheap. */
/* why is this defined??? -- dac */ /* Why is this defined??? -- dac */
#define NO_FUNCTION_CSE 1 #define NO_FUNCTION_CSE 1
/* Chars and shorts should be passed as ints. */ /* Chars and shorts should be passed as ints. */
...@@ -1177,7 +1177,7 @@ extern long mcore_current_compilation_timestamp; ...@@ -1177,7 +1177,7 @@ extern long mcore_current_compilation_timestamp;
/* This says how to output an assembler line /* This says how to output an assembler line
to define a local common symbol... */ to define a local common symbol.... */
#undef ASM_OUTPUT_LOCAL #undef ASM_OUTPUT_LOCAL
#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
(fputs ("\t.lcomm\t", FILE), \ (fputs ("\t.lcomm\t", FILE), \
......
...@@ -2650,8 +2650,8 @@ ...@@ -2650,8 +2650,8 @@
{ {
if (INTVAL (operands[2]) == 8 && INTVAL (operands[3]) % 8 == 0) if (INTVAL (operands[2]) == 8 && INTVAL (operands[3]) % 8 == 0)
{ {
/* 8 bit field, aligned properly, use the xtrb[0123]+sext sequence */ /* 8 bit field, aligned properly, use the xtrb[0123]+sext sequence. */
/* not DONE, not FAIL, but let the RTL get generated... */ /* not DONE, not FAIL, but let the RTL get generated.... */
} }
else if (TARGET_W_FIELD) else if (TARGET_W_FIELD)
{ {
...@@ -2671,7 +2671,7 @@ ...@@ -2671,7 +2671,7 @@
} }
else else
{ {
/* let the caller choose an alternate sequence */ /* Let the caller choose an alternate sequence. */
FAIL; FAIL;
} }
}") }")
...@@ -2687,8 +2687,8 @@ ...@@ -2687,8 +2687,8 @@
{ {
if (INTVAL (operands[2]) == 8 && INTVAL (operands[3]) % 8 == 0) if (INTVAL (operands[2]) == 8 && INTVAL (operands[3]) % 8 == 0)
{ {
/* 8 bit field, aligned properly, use the xtrb[0123] sequence */ /* 8 bit field, aligned properly, use the xtrb[0123] sequence. */
/* let the template generate some RTL.... */ /* Let the template generate some RTL.... */
} }
else if (CONST_OK_FOR_K ((1 << INTVAL (operands[2])) - 1)) else if (CONST_OK_FOR_K ((1 << INTVAL (operands[2])) - 1))
{ {
...@@ -2829,7 +2829,7 @@ ...@@ -2829,7 +2829,7 @@
"xtrb2 %0,%1" "xtrb2 %0,%1"
[(set_attr "type" "shift")]) [(set_attr "type" "shift")])
;; this can be peepholed if it follows a ldb ... ;; This can be peepholed if it follows a ldb ...
(define_insn "" (define_insn ""
[(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r,b") [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r,b")
(zero_extract:SI (match_operand:SI 1 "mcore_arith_reg_operand" "0,r") (const_int 8) (const_int 0)))] (zero_extract:SI (match_operand:SI 1 "mcore_arith_reg_operand" "0,r") (const_int 8) (const_int 0)))]
...@@ -3006,7 +3006,7 @@ ...@@ -3006,7 +3006,7 @@
output_asm_insn (\"mov\\t%2,%3\", operands); output_asm_insn (\"mov\\t%2,%3\", operands);
return mcore_output_bclri (operands[2], INTVAL (operands[1]) | 0xffffff00);") return mcore_output_bclri (operands[2], INTVAL (operands[1]) | 0xffffff00);")
/* do not fold these together -- mode is lost at final output phase */ /* Do not fold these together -- mode is lost at final output phase. */
(define_peephole (define_peephole
[(set (match_operand:SI 0 "mcore_arith_reg_operand" "") [(set (match_operand:SI 0 "mcore_arith_reg_operand" "")
...@@ -3263,7 +3263,7 @@ ...@@ -3263,7 +3263,7 @@
"" ""
" "
{ {
/* if he wants no probing, just do it for him. */ /* If he wants no probing, just do it for him. */
if (mcore_stack_increment == 0) if (mcore_stack_increment == 0)
{ {
emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx,operands[1])); emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx,operands[1]));
...@@ -3271,13 +3271,13 @@ ...@@ -3271,13 +3271,13 @@
DONE; DONE;
} }
/* for small constant growth, we unroll the code */ /* For small constant growth, we unroll the code. */
if (GET_CODE (operands[1]) == CONST_INT if (GET_CODE (operands[1]) == CONST_INT
&& INTVAL (operands[1]) < 8 * STACK_UNITS_MAXSTEP) && INTVAL (operands[1]) < 8 * STACK_UNITS_MAXSTEP)
{ {
int left = INTVAL(operands[1]); int left = INTVAL(operands[1]);
/* if it's a long way, get close enough for a last shot */ /* If it's a long way, get close enough for a last shot. */
if (left >= STACK_UNITS_MAXSTEP) if (left >= STACK_UNITS_MAXSTEP)
{ {
rtx tmp = gen_reg_rtx (Pmode); rtx tmp = gen_reg_rtx (Pmode);
...@@ -3293,7 +3293,7 @@ ...@@ -3293,7 +3293,7 @@
} }
while (left > STACK_UNITS_MAXSTEP); while (left > STACK_UNITS_MAXSTEP);
} }
/* performs the final adjustment */ /* Perform the final adjustment. */
emit_insn (gen_addsi3 (stack_pointer_rtx,stack_pointer_rtx,GEN_INT(-left))); emit_insn (gen_addsi3 (stack_pointer_rtx,stack_pointer_rtx,GEN_INT(-left)));
;; emit_move_insn (operands[0], virtual_stack_dynamic_rtx); ;; emit_move_insn (operands[0], virtual_stack_dynamic_rtx);
DONE; DONE;
...@@ -3317,30 +3317,30 @@ ...@@ -3317,30 +3317,30 @@
emit_jump_insn (gen_bgeu (out_label)); emit_jump_insn (gen_bgeu (out_label));
} }
/* run a loop that steps it incrementally */ /* Run a loop that steps it incrementally. */
emit_label (loop_label); emit_label (loop_label);
/* extend a step, probe, and adjust remaining count */ /* Extend a step, probe, and adjust remaining count. */
emit_insn(gen_subsi3(stack_pointer_rtx, stack_pointer_rtx, step)); emit_insn(gen_subsi3(stack_pointer_rtx, stack_pointer_rtx, step));
memref = gen_rtx (MEM, SImode, stack_pointer_rtx); memref = gen_rtx (MEM, SImode, stack_pointer_rtx);
MEM_VOLATILE_P (memref) = 1; MEM_VOLATILE_P (memref) = 1;
emit_insn(gen_movsi(memref, stack_pointer_rtx)); emit_insn(gen_movsi(memref, stack_pointer_rtx));
emit_insn(gen_subsi3(tmp, tmp, step)); emit_insn(gen_subsi3(tmp, tmp, step));
/* loop condition -- going back up */ /* Loop condition -- going back up. */
emit_insn (gen_cmpsi (step, tmp)); emit_insn (gen_cmpsi (step, tmp));
emit_jump_insn (gen_bltu (loop_label)); emit_jump_insn (gen_bltu (loop_label));
if (out_label) if (out_label)
emit_label (out_label); emit_label (out_label);
/* bump the residual */ /* Bump the residual. */
emit_insn (gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx, tmp)); emit_insn (gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx, tmp));
;; emit_move_insn (operands[0], virtual_stack_dynamic_rtx); ;; emit_move_insn (operands[0], virtual_stack_dynamic_rtx);
DONE; DONE;
#else #else
/* simple one-shot -- ensure register and do a subtract. /* simple one-shot -- ensure register and do a subtract.
* this does NOT comply with the ABI. */ * This does NOT comply with the ABI. */
emit_insn (gen_movsi (tmp, operands[1])); emit_insn (gen_movsi (tmp, operands[1]));
emit_insn (gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx, tmp)); emit_insn (gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx, tmp));
;; emit_move_insn (operands[0], virtual_stack_dynamic_rtx); ;; emit_move_insn (operands[0], virtual_stack_dynamic_rtx);
......
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